530 lines
11 KiB
Text
530 lines
11 KiB
Text
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2020 MediaTek Inc.
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* Author: Chun-Hung Wu <chun-hung.wu@mediatek.com>
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/pinctrl/mt6873-pinfunc.h>
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#include <dt-bindings/clock/mt6873-clk.h>
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&gpio_usage_mapping {
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GPIO_SIM1_HOT_PLUG = <&pio 43 0>;
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GPIO_SIM2_SCLK = <&pio 45 0>;
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GPIO_SIM2_SRST = <&pio 46 0>;
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GPIO_SIM2_SIO = <&pio 47 0>;
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GPIO_SIM1_SIO = <&pio 48 0>;
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GPIO_SIM1_SRST = <&pio 49 0>;
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GPIO_SIM1_SCLK = <&pio 50 0>;
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GPIO_FDD_BAND_SUPPORT_DETECT_1ST_PIN = <&pio 63 0>;
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GPIO_FDD_BAND_SUPPORT_DETECT_2ND_PIN = <&pio 64 0>;
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GPIO_FDD_BAND_SUPPORT_DETECT_3RD_PIN = <&pio 65 0>;
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GPIO_FDD_BAND_SUPPORT_DETECT_4TH_PIN = <&pio 66 0>;
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};
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&gpio{
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gpio_init_default = <0 0 0 0 1 1 1>,
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<1 0 0 0 1 0 1>,
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<2 0 0 0 1 0 1>,
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<3 0 0 0 1 0 1>,
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<4 0 0 0 1 1 1>,
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<5 0 1 0 1 0 1>,
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<6 0 1 0 1 0 1>,
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<7 0 1 0 1 0 1>,
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<8 0 1 0 1 0 1>,
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<9 0 1 0 1 0 1>,
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<10 0 1 0 1 0 0>,
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<11 0 0 0 1 0 0>,
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<12 0 0 0 1 1 0>,
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<13 0 0 0 1 0 0>,
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<14 0 1 0 1 0 0>,
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<15 0 0 0 1 0 0>,
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<16 6 0 0 1 0 1>,
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<17 6 0 0 0 0 1>,
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<18 1 0 0 1 0 1>,
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<19 0 0 0 1 0 1>,
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<20 0 1 0 1 0 1>,
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<21 0 0 0 1 1 1>,
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<22 0 0 0 1 0 1>,
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<23 0 0 0 1 1 1>,
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<24 0 0 0 1 1 1>,
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<25 0 0 0 1 1 1>,
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<26 0 1 0 1 0 1>,
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<27 0 1 1 1 0 1>,
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<28 0 1 0 1 0 1>,
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<29 0 1 0 1 0 1>,
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<30 0 1 0 1 0 1>,
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<31 0 0 0 1 1 1>,
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<32 1 0 0 0 0 1>,
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<33 1 0 0 0 0 1>,
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<34 1 0 0 1 0 1>,
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<35 1 0 0 0 0 1>,
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<36 4 0 0 1 1 0>,
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<37 4 0 0 0 0 0>,
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<38 4 0 0 1 1 0>,
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<39 4 0 0 0 0 0>,
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<40 1 0 0 0 0 1>,
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<41 1 0 0 1 0 1>,
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<42 1 0 0 0 0 0>,
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<43 1 0 0 1 1 1>,
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<44 0 0 0 1 0 1>,
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<45 1 0 0 0 0 1>,
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<46 1 0 0 0 0 1>,
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<47 1 0 0 1 1 1>,
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<48 1 0 0 1 1 1>,
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<49 1 0 0 0 0 1>,
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<50 1 0 0 0 0 1>,
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<51 1 0 0 0 0 1>,
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<52 1 0 0 1 1 1>,
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<53 1 0 0 1 1 1>,
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<54 1 0 0 1 1 1>,
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<55 1 0 0 1 1 1>,
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<56 1 0 0 1 1 1>,
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<57 1 0 0 0 0 0>,
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<58 1 0 0 1 0 0>,
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<59 1 0 0 1 0 1>,
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<60 1 0 0 1 0 1>,
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<61 1 0 0 1 0 1>,
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<62 1 0 0 1 0 1>,
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<63 0 0 0 1 0 0>,
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<64 0 0 0 1 0 0>,
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<65 0 0 0 1 0 0>,
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<66 0 0 0 1 0 0>,
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<67 1 0 0 0 0 0>,
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<68 1 0 0 0 0 0>,
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<69 1 0 0 0 0 0>,
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<70 1 0 0 0 0 0>,
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<71 1 0 0 0 0 0>,
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<72 1 0 0 0 0 0>,
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<73 1 0 0 0 0 0>,
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<74 1 0 0 0 0 0>,
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<75 1 0 0 0 0 0>,
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<76 1 0 0 0 0 0>,
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<77 1 0 0 0 0 0>,
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<78 1 0 0 0 0 0>,
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<79 1 0 0 0 0 0>,
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<80 1 0 0 0 0 0>,
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<81 1 0 0 0 0 0>,
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<82 1 0 0 0 0 0>,
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<83 1 0 0 0 0 0>,
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<84 1 0 0 0 0 0>,
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<85 1 0 0 0 0 0>,
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<86 1 0 0 1 0 0>,
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<87 1 0 0 0 0 0>,
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<88 1 0 0 1 0 0>,
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<89 1 0 0 0 0 1>,
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<90 1 0 0 0 0 1>,
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<92 1 0 0 1 1 0>,
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<93 1 0 0 0 0 0>,
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<94 1 0 0 1 1 0>,
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<95 1 0 0 0 0 0>,
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<96 7 0 0 1 0 0>,
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<97 7 0 0 1 0 0>,
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<98 7 0 0 1 0 0>,
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<99 7 0 0 0 0 0>,
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<100 7 0 0 1 0 0>,
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<101 7 0 0 1 0 0>,
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<102 7 0 0 1 0 0>,
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<103 7 0 0 0 0 0>,
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<104 7 0 0 1 0 0>,
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<105 7 0 0 1 0 0>,
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<106 7 0 0 1 0 0>,
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<107 7 0 0 1 0 0>,
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<108 7 0 0 1 0 0>,
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<109 7 0 0 1 0 0>,
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<110 0 1 0 1 0 0>,
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<111 0 1 0 1 0 0>,
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<112 0 1 0 1 0 0>,
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<113 0 1 0 1 0 0>,
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<114 2 0 0 1 0 0>,
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<115 2 0 0 0 0 0>,
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<116 2 0 0 0 0 0>,
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<117 2 0 0 0 0 0>,
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<118 2 0 0 1 1 1>,
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<119 2 0 0 1 1 1>,
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<120 1 0 0 1 1 1>,
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<121 1 0 0 1 1 1>,
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<122 1 0 0 1 1 1>,
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<123 1 0 0 1 1 1>,
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<124 1 0 0 1 1 1>,
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<125 1 0 0 1 1 1>,
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<126 4 0 0 1 0 0>,
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<127 4 0 0 1 0 0>,
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<128 0 1 0 1 0 0>,
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<129 0 1 0 1 0 0>,
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<130 1 0 0 1 0 0>,
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<131 1 0 0 0 0 0>,
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<132 1 0 0 1 0 0>,
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<133 0 1 0 1 0 0>,
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<134 0 1 0 1 0 0>,
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<135 0 1 0 1 0 0>,
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<136 1 0 0 0 0 0>,
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<137 0 1 0 1 0 0>,
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<138 0 1 0 1 0 0>,
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<139 1 0 0 1 1 1>,
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<140 1 0 0 1 1 1>,
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<141 1 0 0 1 1 1>,
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<142 1 0 0 1 1 1>,
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<143 0 1 0 1 0 0>,
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<144 0 1 0 1 0 0>,
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<145 0 1 0 1 0 0>,
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<146 0 1 0 1 0 0>,
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<147 0 1 0 1 0 0>,
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<148 0 1 0 1 0 0>,
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<149 1 0 0 0 0 0>,
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<150 1 0 0 0 0 0>,
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<151 1 0 0 0 0 0>,
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<152 0 0 0 1 0 0>,
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<153 1 0 0 1 0 0>,
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<154 1 0 0 1 1 0>,
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<155 0 0 0 0 0 0>,
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<156 1 0 0 0 0 0>,
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<157 1 0 0 0 0 0>,
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<158 1 0 0 1 0 0>,
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<159 1 0 0 0 0 0>,
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<160 1 0 0 1 1 1>,
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<161 1 0 0 1 1 1>,
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<162 0 0 0 1 0 0>,
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<163 0 0 0 1 0 0>,
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<164 0 0 0 1 0 0>,
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<165 1 0 0 1 0 0>,
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<166 1 0 0 1 0 0>,
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<167 0 0 0 1 0 0>,
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<168 6 0 0 1 0 0>,
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<169 6 0 0 1 0 0>,
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<170 0 1 0 1 0 0>,
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<171 0 1 0 1 0 0>,
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<172 0 0 0 1 0 0>,
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<173 0 0 0 1 0 0>,
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<174 0 0 0 1 0 0>,
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<175 0 0 0 1 0 0>,
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<176 0 0 0 1 0 0>,
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<177 0 0 0 1 0 0>,
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<178 0 0 0 1 0 0>,
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<179 0 0 0 1 0 0>,
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<180 0 0 0 1 0 0>,
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<181 0 0 0 1 0 0>,
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<182 0 0 0 1 0 0>,
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<195 1 0 0 0 0 1>,
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<196 1 0 0 0 0 1>,
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<197 1 0 0 0 0 1>,
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<198 1 0 0 0 0 1>,
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<199 1 0 0 1 0 1>,
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<200 1 0 0 1 1 1>,
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<201 1 0 0 1 1 1>,
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<202 1 0 0 1 1 1>,
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<203 1 0 0 1 1 1>,
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<204 6 0 0 1 0 1>,
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<205 6 0 0 1 0 1>,
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<206 1 0 0 0 0 1>,
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<207 1 0 0 0 0 1>,
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<208 1 0 0 0 0 0>,
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<209 1 0 0 1 0 0>,
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<210 1 0 0 0 0 0>,
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<211 1 0 0 1 0 0>,
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<212 1 0 0 0 0 0>,
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<213 1 0 0 1 0 1>,
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<214 1 0 0 0 0 1>,
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<215 1 0 0 0 0 1>,
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<216 1 0 0 0 0 1>,
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<217 1 0 0 0 0 1>,
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<218 1 0 0 1 0 1>,
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<219 1 0 0 1 0 1>,
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<220 0 0 0 1 0 0>,
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<221 0 0 0 1 0 0>,
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<222 0 0 0 1 0 0>,
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<223 0 0 0 1 0 0>,
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<224 0 0 0 1 0 0>,
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<225 0 0 0 1 0 0>,
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<226 0 0 0 1 0 0>,
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<227 0 0 0 1 0 0>;
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};
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#include "mediatek/cust_mt6873_touch_1080x2280.dtsi"
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&chosen {
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atag,videolfb-fb_base_l = <0x7e605000>;
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atag,videolfb-fb_base_h = <0x0>;
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atag,videolfb-islcmfound = <1>;
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atag,videolfb-islcm_inited = <0>;
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atag,videolfb-fps= <6000>;
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atag,videolfb-vramSize= <0x1be0000>;
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atag,videolfb-lcmname=
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"td4330_fhdp_dsi_vdo_auo_rt5081_drv";
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};
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&pio {
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mtkfb_pins_lcd_bias_enp1: lcd_bias_enp1_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO28__FUNC_GPIO28>;
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slew-rate = <1>;
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output-high;
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};
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};
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mtkfb_pins_lcd_bias_enp0: lcd_bias_enp0_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO28__FUNC_GPIO28>;
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slew-rate = <1>;
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output-low;
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};
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};
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mtkfb_pins_lcd_bias_enn1: lcd_bias_enn1_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO29__FUNC_GPIO29>;
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slew-rate = <1>;
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output-high;
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};
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};
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mtkfb_pins_lcd_bias_enn0: lcd_bias_enn0_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO29__FUNC_GPIO29>;
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slew-rate = <1>;
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output-low;
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};
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};
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mtkfb_pins_lcm_rst_out1_gpio: lcm_rst_out1_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO42__FUNC_GPIO42>;
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slew-rate = <1>;
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output-high;
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};
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};
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mtkfb_pins_lcm_rst_out0_gpio: lcm_rst_out0_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO42__FUNC_GPIO42>;
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slew-rate = <1>;
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output-low;
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};
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};
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mtkfb_pins_lcm_dsi_te: lcm_dsi_te {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO41__FUNC_DSI_TE>;
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};
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};
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};
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&mtkfb {
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pinctrl-names = "lcd_bias_enp1_gpio", "lcd_bias_enp0_gpio",
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"lcd_bias_enn1_gpio", "lcd_bias_enn0_gpio",
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"lcm_rst_out1_gpio", "lcm_rst_out0_gpio",
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"mode_te_te";
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pinctrl-0 = <&mtkfb_pins_lcd_bias_enp1>;
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pinctrl-1 = <&mtkfb_pins_lcd_bias_enp0>;
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pinctrl-2 = <&mtkfb_pins_lcd_bias_enn1>;
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pinctrl-3 = <&mtkfb_pins_lcd_bias_enn0>;
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pinctrl-4 = <&mtkfb_pins_lcm_rst_out1_gpio>;
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pinctrl-5 = <&mtkfb_pins_lcm_rst_out0_gpio>;
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pinctrl-6 = <&mtkfb_pins_lcm_dsi_te>;
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status = "okay";
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};
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&dispsys_config {
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pinctrl-names =
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"lcm_rst_out1_gpio", "lcm_rst_out0_gpio",
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"mode_te_te";
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pinctrl-0 = <&mtkfb_pins_lcm_rst_out1_gpio>;
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pinctrl-1 = <&mtkfb_pins_lcm_rst_out0_gpio>;
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pinctrl-2 = <&mtkfb_pins_lcm_dsi_te>;
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status = "okay";
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};
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&dsi0 {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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panel@0 {
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compatible = "truly,td4330,vdo";
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reg = <0>;
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pm-enable-gpios = <&pio 41 0>;
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reset-gpios = <&pio 42 0>;
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bias-gpios = <&pio 28 0>,
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<&pio 29 0>;
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pinctrl-names = "default";
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port {
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panel_in: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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};
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ports {
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port {
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dsi_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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};
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&dsi_te {
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interrupt-parent = <&pio>;
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interrupts = <41 1 41 1>;
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status = "okay";
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};
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&i2c6 {
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tfa9874: tfa9874@34 {
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compatible = "goodix,tfa9874";
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#sound-dai-cells = <0>;
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reg = <0x34>;
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status = "okay";
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};
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};
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&sound {
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mediatek,speaker-codec {
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sound-dai = <&tfa9874>;
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};
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};
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&i2c3 {
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st21nfc: st21nfc@08 {
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compatible = "st,st21nfc";
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reg = <0x08>;
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interrupt-parent = <&pio>;
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interrupts = <11 0>;
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reset-gpios = <&pio 10 0x00>;
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irq-gpios = <&pio 11 0x00>;
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clkreq-gpios = <&pio 206 0x00>;
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status = "ok";
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};
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};
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&spi5 {
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st54spi: st54spi@0 {
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compatible = "st,st54spi";
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reg = <0>;
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spi-max-frequency = <1000000>;
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/* gpio used as SE_PWR_REQ or SE_nRESET */
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gpio-power_nreset = <13>;
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gpio-power_nreset-std = <&pio 13 0x00>;
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/* Power management mode: none, ST54H (default), ST54J */
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power_mode = "ST54J";
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pinctrl-names = "pinctrl_nfc_spi_csb",
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"pinctrl_nfc_spi_clk",
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"pinctrl_nfc_spi_mi",
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"pinctrl_nfc_spi_mo",
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"pinctrl_nfc_spi_csb_idle",
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"pinctrl_nfc_spi_clk_idle",
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"pinctrl_nfc_spi_mi_idle",
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"pinctrl_nfc_spi_mo_idle";
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pinctrl-0 = <&pinctrl_nfc_spi_csb>;
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pinctrl-1 = <&pinctrl_nfc_spi_clk>;
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pinctrl-2 = <&pinctrl_nfc_spi_mi>;
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pinctrl-3 = <&pinctrl_nfc_spi_mo>;
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pinctrl-4 = <&pinctrl_nfc_spi_csb_idle>;
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pinctrl-5 = <&pinctrl_nfc_spi_clk_idle>;
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pinctrl-6 = <&pinctrl_nfc_spi_mi_idle>;
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pinctrl-7 = <&pinctrl_nfc_spi_mo_idle>;
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status = "okay";
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};
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};
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&pio {
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pinctrl_nfc_spi_csb: pinctrl_nfc_spi_csb {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO37__FUNC_SPI5_A_CSB>;
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bias-disable;
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};
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};
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pinctrl_nfc_spi_clk: pinctrl_nfc_spi_clk {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO36__FUNC_SPI5_A_CLK>;
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bias-disable;
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};
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};
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pinctrl_nfc_spi_mi: pinctrl_nfc_spi_mi {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO38__FUNC_SPI5_A_MI>;
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bias-disable;
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};
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};
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pinctrl_nfc_spi_mo: pinctrl_nfc_spi_mo {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO39__FUNC_SPI5_A_MO>;
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bias-disable;
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};
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};
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pinctrl_nfc_spi_csb_idle: pinctrl_nfc_spi_csb_idle {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO37__FUNC_GPIO37>;
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bias-disable;
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};
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};
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pinctrl_nfc_spi_clk_idle: pinctrl_nfc_spi_clk_idle {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO36__FUNC_GPIO36>;
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bias-disable;
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};
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};
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pinctrl_nfc_spi_mi_idle: pinctrl_nfc_spi_mi_idle {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO38__FUNC_GPIO38>;
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bias-disable;
|
|
};
|
|
};
|
|
pinctrl_nfc_spi_mo_idle: pinctrl_nfc_spi_mo_idle {
|
|
pins_cmd0_dat {
|
|
pinmux = <PINMUX_GPIO39__FUNC_GPIO39>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
#include "mediatek/cust_mt6873_camera.dtsi"
|
|
/*End of this file, DO NOT ADD ANYTHING HERE*/
|
|
|
|
/* CONSYS GPIO standardization */
|
|
&pio {
|
|
consys_pins_default: consys_default {
|
|
};
|
|
gpslna_pins_init: gpslna@0 {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO162__FUNC_GPIO162>;
|
|
slew-rate = <0>;
|
|
bias-disable;
|
|
output-low;
|
|
};
|
|
};
|
|
gpslna_pins_oh: gpslna@1 {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO162__FUNC_GPIO162>;
|
|
slew-rate = <1>;
|
|
output-high;
|
|
};
|
|
};
|
|
gpslna_pins_ol: gpslna@2 {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO162__FUNC_GPIO162>;
|
|
slew-rate = <1>;
|
|
output-low;
|
|
};
|
|
};
|
|
};
|
|
|
|
&consys {
|
|
pinctrl-names = "default", "gps_lna_state_init",
|
|
"gps_lna_state_oh", "gps_lna_state_ol";
|
|
pinctrl-0 = <&consys_pins_default>;
|
|
pinctrl-1 = <&gpslna_pins_init>;
|
|
pinctrl-2 = <&gpslna_pins_oh>;
|
|
pinctrl-3 = <&gpslna_pins_ol>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pdc {
|
|
pd_vbus_upper_bound = <12000000>;
|
|
};
|
|
|
|
/* CONSYS end */
|