// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Copyright (C) 2020 MediaTek Inc.
 * Author: Chun-Hung Wu <chun-hung.wu@mediatek.com>
 */
/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/mt6873-pinfunc.h>
#include <dt-bindings/clock/mt6873-clk.h>

&gpio_usage_mapping {
	GPIO_SIM1_HOT_PLUG = <&pio 43 0>;
	GPIO_SIM2_SCLK = <&pio 45 0>;
	GPIO_SIM2_SRST = <&pio 46 0>;
	GPIO_SIM2_SIO = <&pio 47 0>;
	GPIO_SIM1_SIO = <&pio 48 0>;
	GPIO_SIM1_SRST = <&pio 49 0>;
	GPIO_SIM1_SCLK = <&pio 50 0>;
	GPIO_FDD_BAND_SUPPORT_DETECT_1ST_PIN = <&pio 63 0>;
	GPIO_FDD_BAND_SUPPORT_DETECT_2ND_PIN = <&pio 64 0>;
	GPIO_FDD_BAND_SUPPORT_DETECT_3RD_PIN = <&pio 65 0>;
	GPIO_FDD_BAND_SUPPORT_DETECT_4TH_PIN = <&pio 66 0>;
};

&gpio{
	gpio_init_default = <0 0 0 0 1 1 1>,
		<1 0 0 0 1 0 1>,
		<2 0 0 0 1 0 1>,
		<3 0 0 0 1 0 1>,
		<4 0 0 0 1 1 1>,
		<5 0 1 0 1 0 1>,
		<6 0 1 0 1 0 1>,
		<7 0 1 0 1 0 1>,
		<8 0 1 0 1 0 1>,
		<9 0 1 0 1 0 1>,
		<10 0 1 0 1 0 0>,
		<11 0 0 0 1 0 0>,
		<12 0 0 0 1 1 0>,
		<13 0 0 0 1 0 0>,
		<14 0 1 0 1 0 0>,
		<15 0 0 0 1 0 0>,
		<16 6 0 0 1 0 1>,
		<17 6 0 0 0 0 1>,
		<18 1 0 0 1 0 1>,
		<19 0 0 0 1 0 1>,
		<20 0 1 0 1 0 1>,
		<21 0 0 0 1 1 1>,
		<22 0 0 0 1 0 1>,
		<23 0 0 0 1 1 1>,
		<24 0 0 0 1 1 1>,
		<25 0 0 0 1 1 1>,
		<26 0 1 0 1 0 1>,
		<27 0 1 1 1 0 1>,
		<28 0 1 0 1 0 1>,
		<29 0 1 0 1 0 1>,
		<30 0 1 0 1 0 1>,
		<31 0 0 0 1 1 1>,
		<32 1 0 0 0 0 1>,
		<33 1 0 0 0 0 1>,
		<34 1 0 0 1 0 1>,
		<35 1 0 0 0 0 1>,
		<36 4 0 0 1 1 0>,
		<37 4 0 0 0 0 0>,
		<38 4 0 0 1 1 0>,
		<39 4 0 0 0 0 0>,
		<40 1 0 0 0 0 1>,
		<41 1 0 0 1 0 1>,
		<42 1 0 0 0 0 0>,
		<43 1 0 0 1 1 1>,
		<44 0 0 0 1 0 1>,
		<45 1 0 0 0 0 1>,
		<46 1 0 0 0 0 1>,
		<47 1 0 0 1 1 1>,
		<48 1 0 0 1 1 1>,
		<49 1 0 0 0 0 1>,
		<50 1 0 0 0 0 1>,
		<51 1 0 0 0 0 1>,
		<52 1 0 0 1 1 1>,
		<53 1 0 0 1 1 1>,
		<54 1 0 0 1 1 1>,
		<55 1 0 0 1 1 1>,
		<56 1 0 0 1 1 1>,
		<57 1 0 0 0 0 0>,
		<58 1 0 0 1 0 0>,
		<59 1 0 0 1 0 1>,
		<60 1 0 0 1 0 1>,
		<61 1 0 0 1 0 1>,
		<62 1 0 0 1 0 1>,
		<63 0 0 0 1 0 0>,
		<64 0 0 0 1 0 0>,
		<65 0 0 0 1 0 0>,
		<66 0 0 0 1 0 0>,
		<67 1 0 0 0 0 0>,
		<68 1 0 0 0 0 0>,
		<69 1 0 0 0 0 0>,
		<70 1 0 0 0 0 0>,
		<71 1 0 0 0 0 0>,
		<72 1 0 0 0 0 0>,
		<73 1 0 0 0 0 0>,
		<74 1 0 0 0 0 0>,
		<75 1 0 0 0 0 0>,
		<76 1 0 0 0 0 0>,
		<77 1 0 0 0 0 0>,
		<78 1 0 0 0 0 0>,
		<79 1 0 0 0 0 0>,
		<80 1 0 0 0 0 0>,
		<81 1 0 0 0 0 0>,
		<82 1 0 0 0 0 0>,
		<83 1 0 0 0 0 0>,
		<84 1 0 0 0 0 0>,
		<85 1 0 0 0 0 0>,
		<86 1 0 0 1 0 0>,
		<87 1 0 0 0 0 0>,
		<88 1 0 0 1 0 0>,
		<89 1 0 0 0 0 1>,
		<90 1 0 0 0 0 1>,
		<92 1 0 0 1 1 0>,
		<93 1 0 0 0 0 0>,
		<94 1 0 0 1 1 0>,
		<95 1 0 0 0 0 0>,
		<96 7 0 0 1 0 0>,
		<97 7 0 0 1 0 0>,
		<98 7 0 0 1 0 0>,
		<99 7 0 0 0 0 0>,
		<100 7 0 0 1 0 0>,
		<101 7 0 0 1 0 0>,
		<102 7 0 0 1 0 0>,
		<103 7 0 0 0 0 0>,
		<104 7 0 0 1 0 0>,
		<105 7 0 0 1 0 0>,
		<106 7 0 0 1 0 0>,
		<107 7 0 0 1 0 0>,
		<108 7 0 0 1 0 0>,
		<109 7 0 0 1 0 0>,
		<110 0 1 0 1 0 0>,
		<111 0 1 0 1 0 0>,
		<112 0 1 0 1 0 0>,
		<113 0 1 0 1 0 0>,
		<114 2 0 0 1 0 0>,
		<115 2 0 0 0 0 0>,
		<116 2 0 0 0 0 0>,
		<117 2 0 0 0 0 0>,
		<118 2 0 0 1 1 1>,
		<119 2 0 0 1 1 1>,
		<120 1 0 0 1 1 1>,
		<121 1 0 0 1 1 1>,
		<122 1 0 0 1 1 1>,
		<123 1 0 0 1 1 1>,
		<124 1 0 0 1 1 1>,
		<125 1 0 0 1 1 1>,
		<126 4 0 0 1 0 0>,
		<127 4 0 0 1 0 0>,
		<128 0 1 0 1 0 0>,
		<129 0 1 0 1 0 0>,
		<130 1 0 0 1 0 0>,
		<131 1 0 0 0 0 0>,
		<132 1 0 0 1 0 0>,
		<133 0 1 0 1 0 0>,
		<134 0 1 0 1 0 0>,
		<135 0 1 0 1 0 0>,
		<136 1 0 0 0 0 0>,
		<137 0 1 0 1 0 0>,
		<138 0 1 0 1 0 0>,
		<139 1 0 0 1 1 1>,
		<140 1 0 0 1 1 1>,
		<141 1 0 0 1 1 1>,
		<142 1 0 0 1 1 1>,
		<143 0 1 0 1 0 0>,
		<144 0 1 0 1 0 0>,
		<145 0 1 0 1 0 0>,
		<146 0 1 0 1 0 0>,
		<147 0 1 0 1 0 0>,
		<148 0 1 0 1 0 0>,
		<149 1 0 0 0 0 0>,
		<150 1 0 0 0 0 0>,
		<151 1 0 0 0 0 0>,
		<152 0 0 0 1 0 0>,
		<153 1 0 0 1 0 0>,
		<154 1 0 0 1 1 0>,
		<155 0 0 0 0 0 0>,
		<156 1 0 0 0 0 0>,
		<157 1 0 0 0 0 0>,
		<158 1 0 0 1 0 0>,
		<159 1 0 0 0 0 0>,
		<160 1 0 0 1 1 1>,
		<161 1 0 0 1 1 1>,
		<162 0 0 0 1 0 0>,
		<163 0 0 0 1 0 0>,
		<164 0 0 0 1 0 0>,
		<165 1 0 0 1 0 0>,
		<166 1 0 0 1 0 0>,
		<167 0 0 0 1 0 0>,
		<168 6 0 0 1 0 0>,
		<169 6 0 0 1 0 0>,
		<170 0 1 0 1 0 0>,
		<171 0 1 0 1 0 0>,
		<172 0 0 0 1 0 0>,
		<173 0 0 0 1 0 0>,
		<174 0 0 0 1 0 0>,
		<175 0 0 0 1 0 0>,
		<176 0 0 0 1 0 0>,
		<177 0 0 0 1 0 0>,
		<178 0 0 0 1 0 0>,
		<179 0 0 0 1 0 0>,
		<180 0 0 0 1 0 0>,
		<181 0 0 0 1 0 0>,
		<182 0 0 0 1 0 0>,
		<195 1 0 0 0 0 1>,
		<196 1 0 0 0 0 1>,
		<197 1 0 0 0 0 1>,
		<198 1 0 0 0 0 1>,
		<199 1 0 0 1 0 1>,
		<200 1 0 0 1 1 1>,
		<201 1 0 0 1 1 1>,
		<202 1 0 0 1 1 1>,
		<203 1 0 0 1 1 1>,
		<204 6 0 0 1 0 1>,
		<205 6 0 0 1 0 1>,
		<206 1 0 0 0 0 1>,
		<207 1 0 0 0 0 1>,
		<208 1 0 0 0 0 0>,
		<209 1 0 0 1 0 0>,
		<210 1 0 0 0 0 0>,
		<211 1 0 0 1 0 0>,
		<212 1 0 0 0 0 0>,
		<213 1 0 0 1 0 1>,
		<214 1 0 0 0 0 1>,
		<215 1 0 0 0 0 1>,
		<216 1 0 0 0 0 1>,
		<217 1 0 0 0 0 1>,
		<218 1 0 0 1 0 1>,
		<219 1 0 0 1 0 1>,
		<220 0 0 0 1 0 0>,
		<221 0 0 0 1 0 0>,
		<222 0 0 0 1 0 0>,
		<223 0 0 0 1 0 0>,
		<224 0 0 0 1 0 0>,
		<225 0 0 0 1 0 0>,
		<226 0 0 0 1 0 0>,
		<227 0 0 0 1 0 0>;
};

#include "mediatek/cust_mt6873_touch_1080x2280.dtsi"

&chosen {
	atag,videolfb-fb_base_l = <0x7e605000>;
	atag,videolfb-fb_base_h = <0x0>;
	atag,videolfb-islcmfound = <1>;
	atag,videolfb-islcm_inited = <0>;
	atag,videolfb-fps= <6000>;
	atag,videolfb-vramSize= <0x1be0000>;
	atag,videolfb-lcmname=
		"td4330_fhdp_dsi_vdo_auo_rt5081_drv";
};

&pio {
	mtkfb_pins_lcd_bias_enp1: lcd_bias_enp1_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO28__FUNC_GPIO28>;
			slew-rate = <1>;
			output-high;
		};
	};

	mtkfb_pins_lcd_bias_enp0: lcd_bias_enp0_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO28__FUNC_GPIO28>;
			slew-rate = <1>;
			output-low;
		};
	};

	mtkfb_pins_lcd_bias_enn1: lcd_bias_enn1_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO29__FUNC_GPIO29>;
			slew-rate = <1>;
			output-high;
		};
	};

	mtkfb_pins_lcd_bias_enn0: lcd_bias_enn0_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO29__FUNC_GPIO29>;
			slew-rate = <1>;
			output-low;
		};
	};

	mtkfb_pins_lcm_rst_out1_gpio: lcm_rst_out1_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO42__FUNC_GPIO42>;
			slew-rate = <1>;
			output-high;
		};
	};

	mtkfb_pins_lcm_rst_out0_gpio: lcm_rst_out0_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO42__FUNC_GPIO42>;
			slew-rate = <1>;
			output-low;
		};
	};
	mtkfb_pins_lcm_dsi_te: lcm_dsi_te {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO41__FUNC_DSI_TE>;
		};
	};
};

&mtkfb {
	pinctrl-names = "lcd_bias_enp1_gpio", "lcd_bias_enp0_gpio",
			"lcd_bias_enn1_gpio", "lcd_bias_enn0_gpio",
			"lcm_rst_out1_gpio", "lcm_rst_out0_gpio",
			"mode_te_te";
	pinctrl-0 = <&mtkfb_pins_lcd_bias_enp1>;
	pinctrl-1 = <&mtkfb_pins_lcd_bias_enp0>;
	pinctrl-2 = <&mtkfb_pins_lcd_bias_enn1>;
	pinctrl-3 = <&mtkfb_pins_lcd_bias_enn0>;
	pinctrl-4 = <&mtkfb_pins_lcm_rst_out1_gpio>;
	pinctrl-5 = <&mtkfb_pins_lcm_rst_out0_gpio>;
	pinctrl-6 = <&mtkfb_pins_lcm_dsi_te>;
	status = "okay";
};

&dispsys_config {
	pinctrl-names =
			"lcm_rst_out1_gpio", "lcm_rst_out0_gpio",
			"mode_te_te";
	pinctrl-0 = <&mtkfb_pins_lcm_rst_out1_gpio>;
	pinctrl-1 = <&mtkfb_pins_lcm_rst_out0_gpio>;
	pinctrl-2 = <&mtkfb_pins_lcm_dsi_te>;
	status = "okay";
};

&dsi0 {
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;
	panel@0 {
		compatible = "truly,td4330,vdo";
		reg = <0>;
		pm-enable-gpios = <&pio 41 0>;
		reset-gpios = <&pio 42 0>;
		bias-gpios = <&pio 28 0>,
			<&pio 29 0>;
		pinctrl-names = "default";
		port {
			panel_in: endpoint {
				remote-endpoint = <&dsi_out>;
			};
		};
	};
	ports {
		port {
			dsi_out: endpoint {
				remote-endpoint = <&panel_in>;
			};
		};
	};
};

&dsi_te {
	interrupt-parent = <&pio>;
	interrupts = <41 1 41 1>;
	status = "okay";
};

&i2c6 {
	tfa9874: tfa9874@34 {
		compatible = "goodix,tfa9874";
		#sound-dai-cells = <0>;
		reg = <0x34>;
		status = "okay";
	};
};

&sound {
	mediatek,speaker-codec {
		sound-dai = <&tfa9874>;
	};
};

&i2c3 {
	st21nfc: st21nfc@08 {
		compatible = "st,st21nfc";
		reg = <0x08>;
		interrupt-parent = <&pio>;
		interrupts = <11 0>;
		reset-gpios = <&pio 10 0x00>;
		irq-gpios = <&pio 11 0x00>;
		clkreq-gpios = <&pio 206 0x00>;
		status = "ok";
	};
};

&spi5 {
	st54spi: st54spi@0 {
		compatible = "st,st54spi";
		reg = <0>;
		spi-max-frequency = <1000000>;

		/* gpio used as SE_PWR_REQ or SE_nRESET */
		gpio-power_nreset = <13>;
		gpio-power_nreset-std = <&pio 13 0x00>;

		/* Power management mode: none, ST54H (default), ST54J */
		power_mode = "ST54J";

		pinctrl-names = "pinctrl_nfc_spi_csb",
				"pinctrl_nfc_spi_clk",
				"pinctrl_nfc_spi_mi",
				"pinctrl_nfc_spi_mo",
				"pinctrl_nfc_spi_csb_idle",
				"pinctrl_nfc_spi_clk_idle",
				"pinctrl_nfc_spi_mi_idle",
				"pinctrl_nfc_spi_mo_idle";

		pinctrl-0 = <&pinctrl_nfc_spi_csb>;
		pinctrl-1 = <&pinctrl_nfc_spi_clk>;
		pinctrl-2 = <&pinctrl_nfc_spi_mi>;
		pinctrl-3 = <&pinctrl_nfc_spi_mo>;
		pinctrl-4 = <&pinctrl_nfc_spi_csb_idle>;
		pinctrl-5 = <&pinctrl_nfc_spi_clk_idle>;
		pinctrl-6 = <&pinctrl_nfc_spi_mi_idle>;
		pinctrl-7 = <&pinctrl_nfc_spi_mo_idle>;

		status = "okay";
	};
};

&pio {
	pinctrl_nfc_spi_csb: pinctrl_nfc_spi_csb {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO37__FUNC_SPI5_A_CSB>;
			bias-disable;
		};
	};
	pinctrl_nfc_spi_clk: pinctrl_nfc_spi_clk {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO36__FUNC_SPI5_A_CLK>;
			bias-disable;
		};
	};
	pinctrl_nfc_spi_mi: pinctrl_nfc_spi_mi {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO38__FUNC_SPI5_A_MI>;
			bias-disable;
		};
	};
	pinctrl_nfc_spi_mo: pinctrl_nfc_spi_mo {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO39__FUNC_SPI5_A_MO>;
			bias-disable;
		};
	};
	pinctrl_nfc_spi_csb_idle: pinctrl_nfc_spi_csb_idle {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO37__FUNC_GPIO37>;
			bias-disable;
		};
	};
	pinctrl_nfc_spi_clk_idle: pinctrl_nfc_spi_clk_idle {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO36__FUNC_GPIO36>;
			bias-disable;
		};
	};
	pinctrl_nfc_spi_mi_idle: pinctrl_nfc_spi_mi_idle {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO38__FUNC_GPIO38>;
			bias-disable;
		};
	};
	pinctrl_nfc_spi_mo_idle: pinctrl_nfc_spi_mo_idle {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO39__FUNC_GPIO39>;
			bias-disable;
		};
	};
};

#include "mediatek/cust_mt6873_camera.dtsi"
/*End of this file, DO NOT ADD ANYTHING HERE*/

/* CONSYS GPIO standardization */
&pio {
	consys_pins_default: consys_default {
	};
	gpslna_pins_init: gpslna@0 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO162__FUNC_GPIO162>;
			slew-rate = <0>;
			bias-disable;
			output-low;
		};
	};
	gpslna_pins_oh: gpslna@1 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO162__FUNC_GPIO162>;
			slew-rate = <1>;
			output-high;
		};
	};
	gpslna_pins_ol: gpslna@2 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO162__FUNC_GPIO162>;
			slew-rate = <1>;
			output-low;
		};
	};
};

&consys {
	pinctrl-names = "default", "gps_lna_state_init",
		"gps_lna_state_oh", "gps_lna_state_ol";
	pinctrl-0 = <&consys_pins_default>;
	pinctrl-1 = <&gpslna_pins_init>;
	pinctrl-2 = <&gpslna_pins_oh>;
	pinctrl-3 = <&gpslna_pins_ol>;
	status = "okay";
};

&pdc {
	pd_vbus_upper_bound = <12000000>;
};

/* CONSYS end */