105 lines
2.4 KiB
Text
105 lines
2.4 KiB
Text
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2020 MediaTek Inc.
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* Author: Chun-Hung Wu <chun-hung.wu@mediatek.com>
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*/
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#include "k6873v1_64_gki.dts"
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&i2c3 {
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st21nfc: st21nfc@08 {
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compatible = "st,st21nfc";
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reg = <0x08>;
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interrupt-parent = <&pio>;
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interrupts = <11 0>;
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reset-gpios = <&pio 10 0x00>;
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irq-gpios = <&pio 11 0x00>;
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clkreq-gpios = <&pio 206 0x00>;
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status = "ok";
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};
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};
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&spi5 {
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st54spi: st54spi@0 {
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compatible = "st,st54spi";
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reg = <0>;
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spi-max-frequency = <1000000>;
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/* gpio used as SE_PWR_REQ or SE_nRESET */
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gpio-power_nreset = <13>;
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gpio-power_nreset-std = <&pio 13 0x00>;
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/* Power management mode: none, ST54H (default), ST54J */
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power_mode = "ST54J";
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pinctrl-names = "pinctrl_nfc_spi_csb",
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"pinctrl_nfc_spi_clk",
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"pinctrl_nfc_spi_mi",
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"pinctrl_nfc_spi_mo",
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"pinctrl_nfc_spi_csb_idle",
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"pinctrl_nfc_spi_clk_idle",
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"pinctrl_nfc_spi_mi_idle",
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"pinctrl_nfc_spi_mo_idle";
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pinctrl-0 = <&pinctrl_nfc_spi_csb>;
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pinctrl-1 = <&pinctrl_nfc_spi_clk>;
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pinctrl-2 = <&pinctrl_nfc_spi_mi>;
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pinctrl-3 = <&pinctrl_nfc_spi_mo>;
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pinctrl-4 = <&pinctrl_nfc_spi_csb_idle>;
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pinctrl-5 = <&pinctrl_nfc_spi_clk_idle>;
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pinctrl-6 = <&pinctrl_nfc_spi_mi_idle>;
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pinctrl-7 = <&pinctrl_nfc_spi_mo_idle>;
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status = "okay";
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};
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};
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&pio {
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pinctrl_nfc_spi_csb: pinctrl_nfc_spi_csb {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO37__FUNC_SPI5_A_CSB>;
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bias-disable;
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};
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};
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pinctrl_nfc_spi_clk: pinctrl_nfc_spi_clk {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO36__FUNC_SPI5_A_CLK>;
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bias-disable;
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};
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};
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pinctrl_nfc_spi_mi: pinctrl_nfc_spi_mi {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO38__FUNC_SPI5_A_MI>;
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bias-disable;
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};
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};
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pinctrl_nfc_spi_mo: pinctrl_nfc_spi_mo {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO39__FUNC_SPI5_A_MO>;
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bias-disable;
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};
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};
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pinctrl_nfc_spi_csb_idle: pinctrl_nfc_spi_csb_idle {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO37__FUNC_GPIO37>;
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bias-disable;
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};
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};
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pinctrl_nfc_spi_clk_idle: pinctrl_nfc_spi_clk_idle {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO36__FUNC_GPIO36>;
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bias-disable;
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};
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};
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pinctrl_nfc_spi_mi_idle: pinctrl_nfc_spi_mi_idle {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO38__FUNC_GPIO38>;
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bias-disable;
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};
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};
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pinctrl_nfc_spi_mo_idle: pinctrl_nfc_spi_mo_idle {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO39__FUNC_GPIO39>;
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bias-disable;
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};
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};
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};
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