// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Copyright (C) 2020 MediaTek Inc.
 * Author: Chun-Hung Wu <chun-hung.wu@mediatek.com>
 */
#include "k6873v1_64_gki.dts"

&i2c3 {
	st21nfc: st21nfc@08 {
		compatible = "st,st21nfc";
		reg = <0x08>;
		interrupt-parent = <&pio>;
		interrupts = <11 0>;
		reset-gpios = <&pio 10 0x00>;
		irq-gpios = <&pio 11 0x00>;
		clkreq-gpios = <&pio 206 0x00>;
		status = "ok";
	};
};

&spi5 {
	st54spi: st54spi@0 {
		compatible = "st,st54spi";
		reg = <0>;
		spi-max-frequency = <1000000>;

		/* gpio used as SE_PWR_REQ or SE_nRESET */
		gpio-power_nreset = <13>;
		gpio-power_nreset-std = <&pio 13 0x00>;

		/* Power management mode: none, ST54H (default), ST54J */
		power_mode = "ST54J";

		pinctrl-names = "pinctrl_nfc_spi_csb",
				"pinctrl_nfc_spi_clk",
				"pinctrl_nfc_spi_mi",
				"pinctrl_nfc_spi_mo",
				"pinctrl_nfc_spi_csb_idle",
				"pinctrl_nfc_spi_clk_idle",
				"pinctrl_nfc_spi_mi_idle",
				"pinctrl_nfc_spi_mo_idle";

		pinctrl-0 = <&pinctrl_nfc_spi_csb>;
		pinctrl-1 = <&pinctrl_nfc_spi_clk>;
		pinctrl-2 = <&pinctrl_nfc_spi_mi>;
		pinctrl-3 = <&pinctrl_nfc_spi_mo>;
		pinctrl-4 = <&pinctrl_nfc_spi_csb_idle>;
		pinctrl-5 = <&pinctrl_nfc_spi_clk_idle>;
		pinctrl-6 = <&pinctrl_nfc_spi_mi_idle>;
		pinctrl-7 = <&pinctrl_nfc_spi_mo_idle>;

		status = "okay";
	};
};

&pio {
	pinctrl_nfc_spi_csb: pinctrl_nfc_spi_csb {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO37__FUNC_SPI5_A_CSB>;
			bias-disable;
		};
	};
	pinctrl_nfc_spi_clk: pinctrl_nfc_spi_clk {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO36__FUNC_SPI5_A_CLK>;
			bias-disable;
		};
	};
	pinctrl_nfc_spi_mi: pinctrl_nfc_spi_mi {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO38__FUNC_SPI5_A_MI>;
			bias-disable;
		};
	};
	pinctrl_nfc_spi_mo: pinctrl_nfc_spi_mo {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO39__FUNC_SPI5_A_MO>;
			bias-disable;
		};
	};
	pinctrl_nfc_spi_csb_idle: pinctrl_nfc_spi_csb_idle {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO37__FUNC_GPIO37>;
			bias-disable;
		};
	};
	pinctrl_nfc_spi_clk_idle: pinctrl_nfc_spi_clk_idle {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO36__FUNC_GPIO36>;
			bias-disable;
		};
	};
	pinctrl_nfc_spi_mi_idle: pinctrl_nfc_spi_mi_idle {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO38__FUNC_GPIO38>;
			bias-disable;
		};
	};
	pinctrl_nfc_spi_mo_idle: pinctrl_nfc_spi_mo_idle {
		pins_cmd0_dat {
			pinmux = <PINMUX_GPIO39__FUNC_GPIO39>;
			bias-disable;
		};
	};
};