693 lines
24 KiB
Text
693 lines
24 KiB
Text
// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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/*
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* Device Tree defines for LCM settings
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* Copyright (c) 2021 MediaTek Inc.
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*/
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#include "mtk_lcm_settings.h"
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&pio {
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td4330_fhdp_dphy_vdo_truly: td4330-fhdp-dphy-vdo-truly {
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compatible = "mediatek,td4330_fhdp_dphy_vdo_truly";
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lcm-version = <0>;
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lcm-params{
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compatible = "mediatek,lcm-params";
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lcm-params-name = "td4330-fhdp-dphy-vdo-truly";
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lcm-params-types = <MTK_LCM_FUNC_DSI>;
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lcm-params-resolution = <1080 2280>;
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lcm-params-physical-width = <64>;
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lcm-params-physical-height = <129>;
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/* lk support */
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lcm-params-lk {
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compatible = "mediatek,lcm-params-lk";
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lcm-params-lk-ctrl;
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lcm-params-lk-lcm-if;
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lcm-params-lk-lcm-cmd-if;
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lcm-params-lk-io-select-mode;
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lcm-params-lk-lcm-x;
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lcm-params-lk-lcm-y;
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lcm-params-lk-virtual-resolution = <0 0>;
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lcm-params-lk-od-table-size;
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lcm-params-lk-od-table;
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};
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lcm-params-lk-round-corner {
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compatible = "mediatek,lcm-params-lk-round-corner";
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lcm-params-lk-rc-round-corner-en = <0>;
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lcm-params-lk-rc-is-notch;
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lcm-params-lk-rc-full-content = <0>;
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lcm-params-lk-rc-width;
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lcm-params-lk-rc-height;
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lcm-params-lk-rc-width-bot;
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lcm-params-lk-rc-height-bot;
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lcm-params-lk-rc-top-size;
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lcm-params-lk-rc-top-size-left;
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lcm-params-lk-rc-top-size-right;
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lcm-params-lk-rc-bottom-size;
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lcm-params-lk-rc-pattern-name;
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};
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lcm-params-dbi {
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compatible = "mediatek,lcm-params-dbi";
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/* future reserved for dbi interfaces */
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};
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lcm-params-dpi {
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compatible = "mediatek,lcm-params-dpi";
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/* future reserved for dpi interfaces */
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};
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lcm-params-dsi {
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compatible = "mediatek,lcm-params-dsi";
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lcm-params-dsi-density = <480>;
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lcm-params-dsi-lanes = <4>;
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lcm-params-dsi-format = <MTK_MIPI_DSI_FMT_RGB888>;
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lcm-params-dsi-phy-type = <MTK_LCM_MIPI_DPHY>;
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lcm-params-dsi-mode-flags = <MTK_MIPI_DSI_MODE_VIDEO>,
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<MTK_MIPI_DSI_MODE_LPM>,
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<MTK_MIPI_DSI_MODE_EOT_PACKET>,
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<MTK_MIPI_DSI_CLOCK_NON_CONTINUOUS>;
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lcm-params-dsi-mode-flags-doze-on;
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lcm-params-dsi-mode-flags-doze-off;
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lcm-params-dsi-need-fake-resolution;
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lcm-params-dsi-fake-resolution = <1080 2280>;
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lcm-gpio-size = <3>;
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lcm-gpio-list = <&pio 42 0>, /* gpio list*/
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<&pio 28 0>,
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<&pio 29 0>;
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pinctrl-names = "gpio1", "gpio2", "gpio3";
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pinctrl-0;
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pinctrl-1;
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pinctrl-2;
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status = "okay";
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lcm-params-dsi-default-mode = <0>;
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lcm-params-dsi-mode-count = <1>;
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lcm-params-dsi-mode-list =
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<0 1080 2280 60>;
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lcm-params-dsi-fps-0-1080-2280-60 {
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compatible = "mediatek,lcm-dsi-fps-0-1080-2280-60";
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lcm-params-dsi-voltage;
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lcm-params-dsi-fake = <0>;
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/* drm-display-mode */
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lcm-params-dsi-vrefresh = <60>;
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lcm-params-dsi-vertical-sync-active = <2>;
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lcm-params-dsi-vertical-backporch = <12>;
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lcm-params-dsi-vertical-frontporch = <75>;
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lcm-params-dsi-vertical-active-line = <2280>;
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lcm-params-dsi-horizontal-sync-active = <20>;
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lcm-params-dsi-horizontal-backporch = <20>;
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lcm-params-dsi-horizontal-frontporch = <24>;
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lcm-params-dsi-horizontal-active-pixel = <1080>;
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lcm-params-dsi-pixel-clock = <163406>;
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lcm-params-dsi-hskew;
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lcm-params-dsi-vscan;
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/* mtk-panel-params */
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lcm-params-dsi-pll-clock = <522>;
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lcm-params-dsi-data-rate;
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lcm-params-dsi-vfp-for-low-power = <810>;
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lcm-params-dsi-ssc-enable;
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lcm-params-dsi-ssc-range;
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lcm-params-dsi-lcm-color-mode;
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lcm-params-dsi-min-luminance;
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lcm-params-dsi-average-luminance;
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lcm-params-dsi-max-luminance;
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lcm-params-dsi-round-corner-en = <0>;
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lcm-params-dsi-corner-pattern-height;
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lcm-params-dsi-corner-pattern-height-bot;
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lcm-params-dsi-corner-pattern-tp-size;
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lcm-params-dsi-corner-pattern-tp-size-left;
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lcm-params-dsi-corner-pattern-tp-size-right;
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lcm-params-dsi-corner-pattern-name;
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lcm-params-dsi-physical-width-um;
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lcm-params-dsi-physical-height-um;
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lcm-params-dsi-output-mode = <MTK_LCM_PANEL_SINGLE_PORT>;
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lcm-params-dsi-lcm-cmd-if;
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lcm-params-dsi-hbm-en-time;
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lcm-params-dsi-hbm-dis-time;
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lcm-params-dsi-lcm-index;
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lcm-params-dsi-wait-sof-before-dec-vfp;
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lcm-params-dsi-doze-delay;
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lcm-params-dsi-lfr-enable;
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lcm-params-dsi-lfr-minimum-fps;
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lcm-params-dsi-msync2-enable;
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lcm-params-dsi-max-vfp-for-msync;
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/* lane swap */
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lcm-params-dsi-lane-swap-en;
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lcm-params-dsi-lane-swap0;
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lcm-params-dsi-lane-swap1;
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/* esd check table */
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lcm-params-dsi-cust-esd-check = <0>;
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lcm-params-dsi-esd-check-enable = <1>;
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lcm-params-dsi-lcm-esd-check-table0 = [0A 01 1C 00];
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lcm-params-dsi-lcm-esd-check-table1;
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lcm-params-dsi-lcm-esd-check-table2;
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/* fpga support */
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lcm-params-dsi-fpga-params-0-1080-2280-60 {
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compatible = "mediatek,lcm-dsi-fpga-params";
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lcm-params-dsi-lk-pll-div = <0 0>;
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lcm-params-dsi-lk-fbk-div = <1>;
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};
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/* lk support */
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lcm-params-dsi-lk-params-0-1080-2280-60 {
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compatible = "mediatek,lcm-dsi-lk-params";
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lcm-params-dsi-lk-mode =
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<MTK_LK_SYNC_EVENT_VDO_MODE>;
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lcm-params-dsi-lk-switch-mode = <MTK_LK_CMD_MODE>;
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lcm-params-dsi-lk-switch-mode-enable = <0>;
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lcm-params-dsi-lk-dsi-wmem-conti;
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lcm-params-dsi-lk-dsi-rmem-conti;
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lcm-params-dsi-lk-vc-num;
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lcm-params-dsi-lk-data-format =
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<MTK_LCM_COLOR_ORDER_RGB>,
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<MTK_LCM_DSI_TRANS_SEQ_MSB_FIRST>,
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<MTK_LCM_DSI_PADDING_ON_LSB>,
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<MTK_LCM_DSI_FORMAT_RGB888>;
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lcm-params-dsi-lk-intermediat-buffer-num;
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lcm-params-dsi-lk-ps =
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<MTK_LCM_PACKED_PS_24BIT_RGB888>;
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lcm-params-dsi-lk-word-count;
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lcm-params-dsi-lk-packet-size = <256>;
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lcm-params-dsi-lk-horizontal-blanking-pixel;
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lcm-params-dsi-lk-bllp;
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lcm-params-dsi-lk-line-byte;
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lcm-params-dsi-lk-horizontal-sync-active-byte;
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lcm-params-dsi-lk-horizontal-backporch-byte;
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lcm-params-dsi-lk-horizontal-frontporch-byte;
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lcm-params-dsi-lk-rgb-byte;
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lcm-params-dsi-lk-horizontal-sync-active-word-count;
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lcm-params-dsi-lk-horizontal-backporch-word-count;
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lcm-params-dsi-lk-horizontal-frontporch-word-count;
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lcm-params-dsi-lk-pll-select;
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lcm-params-dsi-lk-pll-div;
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lcm-params-dsi-lk-fbk-div;
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lcm-params-dsi-lk-fbk-sel;
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lcm-params-dsi-lk-rg = <0 0 0>;
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lcm-params-dsi-lk-dsi-clock;
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lcm-params-dsi-lk-ssc-disable = <1>;
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lcm-params-dsi-lk-ssc-range;
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lcm-params-dsi-lk-compatibility-for-nvk;
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lcm-params-dsi-lk-cont-clock;
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lcm-params-dsi-lk-ufoe-enable;
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lcm-params-dsi-lk-ufoe-params = <0 0 0 0>;
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lcm-params-dsi-lk-edp-panel;
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lcm-params-dsi-lk-lcm-int-te-monitor;
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lcm-params-dsi-lk-lcm-int-te-period;
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lcm-params-dsi-lk-lcm-ext-te-monitor;
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lcm-params-dsi-lk-lcm-ext-te-period;
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lcm-params-dsi-lk-noncont-clock;
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lcm-params-dsi-lk-noncont-clock-period;
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lcm-params-dsi-lk-clk-lp-per-line-enable;
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lcm-params-dsi-lk-dual-dsi-type;
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lcm-params-dsi-lk-mixmode-enable;
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lcm-params-dsi-lk-mixmode-mipi-clock;
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lcm-params-dsi-lk-pwm-fps;
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lcm-params-dsi-lk-pll-clock-lp;
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lcm-params-dsi-lk-ulps-sw-enable;
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lcm-params-dsi-lk-null-packet-en;
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lcm-params-dsi-lk-vact-fps;
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lcm-params-dsi-lk-send-frame-enable;
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lcm-params-dsi-lk-lfr-enable;
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lcm-params-dsi-lk-lfr-mode;
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lcm-params-dsi-lk-lfr-type;
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lcm-params-dsi-lk-lfr-skip-num;
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lcm-params-dsi-lk-ext-te-edge;
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lcm-params-dsi-lk-eint-disable;
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lcm-params-dsi-lk-phy-sel = <0 0 0 0>;
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};
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lcm-params-dsi-dsc-params-0-1080-2280-60 {
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compatible =
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"mediatek,lcm-params-dsi-dsc-params";
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lcm-params-dsi-dsc-enable = <0>;
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lcm-params-dsi-dsc-enable-lk = <0>;
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lcm-params-dsi-dsc-ver;
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lcm-params-dsi-dsc-slice-mode;
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lcm-params-dsi-dsc-rgb-swap;
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lcm-params-dsi-dsc-cfg;
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lcm-params-dsi-dsc-rct-on;
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lcm-params-dsi-dsc-bit-per-channel;
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lcm-params-dsi-dsc-line-buf-depth;
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lcm-params-dsi-dsc-bp-enable;
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lcm-params-dsi-dsc-bit-per-pixel;
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lcm-params-dsi-dsc-pic-height;
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lcm-params-dsi-dsc-pic-width;
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lcm-params-dsi-dsc-slice-height;
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lcm-params-dsi-dsc-slice-width;
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lcm-params-dsi-dsc-chunk-size;
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lcm-params-dsi-dsc-xmit-delay;
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lcm-params-dsi-dsc-dec-delay;
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lcm-params-dsi-dsc-scale-value;
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lcm-params-dsi-dsc-increment-interval;
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lcm-params-dsi-dsc-decrement-interval;
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lcm-params-dsi-dsc-line-bpg-offset;
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lcm-params-dsi-dsc-nfl-bpg-offset;
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lcm-params-dsi-dsc-slice-bpg-offset;
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lcm-params-dsi-dsc-initial-offset;
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lcm-params-dsi-dsc-final-offset;
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lcm-params-dsi-dsc-flatness-minqp;
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lcm-params-dsi-dsc-flatness-maxqp;
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lcm-params-dsi-dsc-rc-model-size;
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lcm-params-dsi-dsc-rc-edge-factor;
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lcm-params-dsi-dsc-rc-quant-incr-limit0;
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lcm-params-dsi-dsc-rc-quant-incr-limit1;
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lcm-params-dsi-dsc-rc-tgt-offset-hi;
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lcm-params-dsi-dsc-rc-tgt-offset-lo;
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};
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lcm-params-dsi-phy-timcon-params-0-1080-2280-60 {
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compatible =
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"mediatek,lcm-params-dsi-phy-timcon";
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lcm-params-dsi-phy-timcon-hs-trail;
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lcm-params-dsi-phy-timcon-hs-prpr;
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lcm-params-dsi-phy-timcon-hs-zero;
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lcm-params-dsi-phy-timcon-lpx;
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lcm-params-dsi-phy-timcon-ta-get;
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lcm-params-dsi-phy-timcon-ta-sure;
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lcm-params-dsi-phy-timcon-ta-go;
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lcm-params-dsi-phy-timcon-da-hs-exit;
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lcm-params-dsi-phy-timcon-clk-trail;
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lcm-params-dsi-phy-timcon-cont-det;
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lcm-params-dsi-phy-timcon-da-hs-sync;
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lcm-params-dsi-phy-timcon-clk-zero;
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lcm-params-dsi-phy-timcon-clk-prpr;
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lcm-params-dsi-phy-timcon-clk-exit;
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lcm-params-dsi-phy-timcon-clk-post;
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/* lk support */
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lcm-params-dsi-phy-timcon-lk-hs-trail;
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lcm-params-dsi-phy-timcon-lk-hs-zero;
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lcm-params-dsi-phy-timcon-lk-hs-prpr;
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lcm-params-dsi-phy-timcon-lk-lpx;
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lcm-params-dsi-phy-timcon-lk-ta-sack;
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lcm-params-dsi-phy-timcon-lk-ta-get;
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lcm-params-dsi-phy-timcon-lk-ta-sure;
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lcm-params-dsi-phy-timcon-lk-ta-go;
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lcm-params-dsi-phy-timcon-lk-clk-trail;
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lcm-params-dsi-phy-timcon-lk-clk-zero;
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lcm-params-dsi-phy-timcon-lk-lpx-wait;
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lcm-params-dsi-phy-timcon-lk-cont-det;
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lcm-params-dsi-phy-timcon-lk-clk-hs-prpr;
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lcm-params-dsi-phy-timcon-lk-clk-hs-post;
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lcm-params-dsi-phy-timcon-lk-da-hs-exit;
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lcm-params-dsi-phy-timcon-lk-clk-hs-exit;
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};
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lcm-params-dsi-dyn-params-0-1080-2280-60 {
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compatible =
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"mediatek,lcm-params-dsi-dyn";
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lcm-params-dsi-dyn-switch-en = <0>;
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lcm-params-dsi-dyn-pll-clk;
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lcm-params-dsi-dyn-data-rate;
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lcm-params-dsi-dyn-vsa;
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lcm-params-dsi-dyn-vbp;
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lcm-params-dsi-dyn-vfp;
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lcm-params-dsi-dyn-vfp-lp-dyn;
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lcm-params-dsi-dyn-vac;
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lcm-params-dsi-dyn-hsa;
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lcm-params-dsi-dyn-hbp;
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lcm-params-dsi-dyn-hfp;
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lcm-params-dsi-dyn-hac;
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lcm-params-dsi-dyn-max-vfp-for-msync-dyn;
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};
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lcm-params-dsi-dyn-fps-params-0-1080-2280-60 {
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compatible =
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"mediatek,lcm-params-dsi-dyn-fps";
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lcm-params-dsi-dyn-fps-switch-en = <0>;
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lcm-params-dsi-dyn-fps-vact-timing-fps;
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lcm-params-dsi-dyn-fps-data-rate;
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lcm-params-dsi-dyn-fps-dfps-cmd-table0;
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lcm-params-dsi-dyn-fps-dfps-cmd-table1;
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lcm-params-dsi-dyn-fps-dfps-cmd-table2;
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lcm-params-dsi-dyn-fps-dfps-cmd-table3;
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lcm-params-dsi-dyn-fps-dfps-cmd-table4;
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lcm-params-dsi-dyn-fps-dfps-cmd-table5;
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lcm-params-dsi-dyn-fps-dfps-cmd-table6;
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lcm-params-dsi-dyn-fps-dfps-cmd-table7;
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lcm-params-dsi-dyn-fps-dfps-cmd-table8;
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lcm-params-dsi-dyn-fps-dfps-cmd-table9;
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lcm-params-dsi-dyn-fps-dfps-cmd-table10;
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lcm-params-dsi-dyn-fps-dfps-cmd-table11;
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lcm-params-dsi-dyn-fps-dfps-cmd-table12;
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lcm-params-dsi-dyn-fps-dfps-cmd-table13;
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lcm-params-dsi-dyn-fps-dfps-cmd-table14;
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lcm-params-dsi-dyn-fps-dfps-cmd-table15;
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lcm-params-dsi-dyn-fps-dfps-cmd-table16;
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lcm-params-dsi-dyn-fps-dfps-cmd-table17;
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lcm-params-dsi-dyn-fps-dfps-cmd-table18;
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lcm-params-dsi-dyn-fps-dfps-cmd-table19;
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};
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};
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};
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};
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lcm-ops {
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compatible = "mediatek,lcm-ops";
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lcm-ops-dbi {
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compatible = "mediatek,lcm-ops-dbi";
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/* future reserved for dbi interfaces*/
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};
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lcm-ops-dpi {
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compatible = "mediatek,lcm-ops-dpi";
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/* future reserved for dpi interfaces*/
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};
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lcm-ops-dsi {
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compatible = "mediatek,lcm-ops-dsi";
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prepare-size = <67>;
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prepare-table = [MTK_LCM_UTIL_TYPE_HEX_RESET 01 00],
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[MTK_LCM_UTIL_TYPE_HEX_MDELAY 01 0f],
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[MTK_LCM_UTIL_TYPE_HEX_RESET 01 01],
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[MTK_LCM_UTIL_TYPE_HEX_MDELAY 01 01],
|
|
[MTK_LCM_UTIL_TYPE_HEX_RESET 01 00],
|
|
[MTK_LCM_UTIL_TYPE_HEX_MDELAY 01 0a],
|
|
[MTK_LCM_UTIL_TYPE_HEX_RESET 01 01],
|
|
[MTK_LCM_UTIL_TYPE_HEX_MDELAY 01 0a],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 02 B0 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 0d],
|
|
[B6 30 6B 00 06 03 0A 13 1A 6C],
|
|
[18 19 02],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 05],
|
|
[B7 71 00 00 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 08],
|
|
[B8 57 3d 19 be 1e 0a 0a],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 08],
|
|
[B9 6f 3d 28 be 3c 14 0a],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 08],
|
|
[BA b5 33 41 be 64 23 0a],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 0c],
|
|
[BB 44 26 C3 1F 19 06 03 C0 00],
|
|
[00 10],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 0c],
|
|
[BC 32 4C C3 52 32 1F 03 F2 00],
|
|
[00 13],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 0c],
|
|
[BD 24 68 C3 AA 3F 32 03 FF 00],
|
|
[00 25],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 0d],
|
|
[BE 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 0d],
|
|
[C0 00 DC 00 DC 13 08 E8 00 08],
|
|
[00 03 78],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 24],
|
|
[C1 30 00 00 11 11 00 00 00 22],
|
|
[00 05 20 FA 00 08 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 79],
|
|
[C2 06 E0 6E 01 03 00 02 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 11 00 00 00 00 04 A0 C9],
|
|
[00 00 00 00 00 00 48 EB 00 00],
|
|
[01 00 00 00 11 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 11 00 00 00 00],
|
|
[00 00 DC 00 00 00 00 04 00 08],
|
|
[EF 00 00 00 00 00 11 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 6d],
|
|
[C3 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 aa aa aa 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 62],
|
|
[C4 00 4c 00 3f 00 83 00 00 87],
|
|
[86 85 84 00 00 00 00 00 61 5d],
|
|
[5f 00 5e 60 62 00 00 00 02 00],
|
|
[83 00 00 87 86 85 84 00 00 00],
|
|
[00 00 61 5d 5f 00 5e 60 62 ff],
|
|
[ff ff ff ff ff 00 0f 0e 00 0f],
|
|
[0e 00 00 00 00 00 00 00 0f ee],
|
|
[00 0f ee 00 00 e0 00 00 e0 0e],
|
|
[00 00 00 0e 00 00 00 00 00 ff],
|
|
[57 00 00 00 00 00 00 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 06],
|
|
[C5 08 00 00 00 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 3a],
|
|
[C6 02 0a 08 fc ff ff ff 00 00],
|
|
[13 01 f0 0c 06 01 43 43 43 00],
|
|
[00 00 01 77 09 28 28 06 01 43],
|
|
[43 43 00 00 00 01 61 00 00 00],
|
|
[1c 01 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 20 20 00 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 4d],
|
|
[C7 00 00 00 e0 01 E9 02 7e 02],
|
|
[05 02 90 02 f6 02 40 02 5C 02],
|
|
[77 02 C8 02 1b 02 5b 02 Bd 02],
|
|
[27 02 c3 03 54 03 d8 03 ff 00],
|
|
[00 00 e0 01 E9 02 7e 02 05 02],
|
|
[90 02 f6 02 40 02 5C 02 77 02],
|
|
[C8 02 1b 02 5b 02 Bd 02 27 02],
|
|
[c3 03 54 03 d8 03 ff],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 42],
|
|
[C8 41 00 ff fa 00 ff 00 00 fe],
|
|
[f6 fe e9 00 00 ff f7 fb e1 00],
|
|
[00 00 00 00 ff 00 00 ff fa 00],
|
|
[ff 00 fe f6 fe e9 00 ff f7 fb],
|
|
[e1 00 00 00 00 ff 00 ff fa 00],
|
|
[ff 00 fe f6 fe e9 00 ff f7 fb],
|
|
[e1 00 00 00 00 ff],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 19],
|
|
[C9 00 ff fa 00 ff 00 00 fe f6],
|
|
[fe e9 00 00 ff f7 fb e1 00 00],
|
|
[00 00 00 ff 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 42],
|
|
[CA 1c fc fc fc 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 0b],
|
|
[CC 00 00 4d 8b 55 4d 8b aa 4d],
|
|
[8b],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 02 CD 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 24],
|
|
[CE 5d 40 49 53 59 5e 63 68 6e],
|
|
[74 7e 8a 98 a8 bb d0 e7 ff 04],
|
|
[00 04 04 42 04 69 5a 40 11 f4],
|
|
[00 00 84 fa 00 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 07],
|
|
[CF 00 00 80 46 61 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 12],
|
|
[D0 f6 95 11 b1 55 cf 00 f6 d3],
|
|
[11 f0 01 12 cf 02 20 11],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 23],
|
|
[D1 d3 d3 33 33 07 03 3b 33 77],
|
|
[37 77 37 35 77 07 77 f7 33 73],
|
|
[07 33 33 03 33 1b 03 32 3d 0a],
|
|
[30 13 13 20 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 04 D2 00 00 07],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 9a],
|
|
[D3 03 00 00 00 00 00 00 0f 00],
|
|
[57 00 00 32 00 00 1a 70 01 19],
|
|
[80 01 01 f0 02 00 e0 06 ff f7],
|
|
[ff ff f7 ff ff f7 ff ff f7 ff],
|
|
[ff f7 ff ff f7 ff ff f7 ff ff],
|
|
[f7 ff ff f7 ff ff f7 ff ff f7],
|
|
[ff ff f7 ff ff f7 ff ff f7 ff],
|
|
[ff f7 ff ff f7 ff ff f7 ff ff],
|
|
[f7 ff ff f7 ff ff f7 ff ff f7],
|
|
[ff ff f7 ff ff f7 ff ff f7 ff],
|
|
[ff f7 ff ff f7 ff ff f7 ff ff],
|
|
[f7 ff ff f7 ff ff f7 ff ff f7],
|
|
[ff ff f7 ff ff f7 ff ff f7 ff],
|
|
[ff f7 ff ff f7 ff ff f7 ff ff],
|
|
[f7 ff ff f7 ff ff f7 ff ff f7],
|
|
[ff ff f7 ff],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 05],
|
|
[E5 03 00 00 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 09],
|
|
[D5 02 42 02 42 02 dc 02 dc],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 02 D6 c0],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 32],
|
|
[D7 21 10 52 52 00 B6 04 FD 00],
|
|
[B6 04 FD 00 82 80 83 84 85 83],
|
|
[80 84 45 85 85 85 87 04 06 02],
|
|
[04 04 07 10 0C 0B 0A 0A 07 06],
|
|
[00 08 00 00 00 00 00 00 00 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 05 DD 30 06 23 65],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 0d],
|
|
[DE 00 00 00 0f ff 00 00 00 00],
|
|
[00 00 10],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 02 E3 ff],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 07],
|
|
[E6 00 00 00 00 00 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 0b],
|
|
[E7 50 04 00 00 00 00 00 00 00],
|
|
[00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 05 E8 00 01 23 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 02 EA 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 08],
|
|
[EB 00 00 00 00 01 00 11],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 04 EC 00 00 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 21],
|
|
[ED 01 01 02 02 02 02 00 00 00],
|
|
[00 00 00 0A 00 00 00 00 10 00],
|
|
[18 00 18 00 B0 00 00 00 00 00],
|
|
[DA 10 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 61],
|
|
[EE 03 0F 00 00 00 00 40 1F 00],
|
|
[00 0F F2 3F 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 10],
|
|
[01 00 09 01 8C D8 EF 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 50 1F 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 8c],
|
|
[EF 00 70 4A 08 D0 00 00 00 00],
|
|
[3C 3C 3C 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 70],
|
|
[4A 08 D0 00 00 00 00 3C 3C 3C],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 03 08 EC 50 10 00 10],
|
|
[00 0A 0A 00 00 00 00 10 0F 00],
|
|
[03 51 00 50 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 00 00 00],
|
|
[00 00 00 00 00 00 00 03 08 EC],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 02 B0 03],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 02 B0 04],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 02 D6 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 03 51 ff f0],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 02 53 0c],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 02 55 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 02 35 00],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 01 35],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 01 11],
|
|
[MTK_LCM_PHASE_TYPE_HEX_START 02],
|
|
[MTK_LCM_PHASE_HEX_KERNEL MTK_LCM_PHASE_HEX_LK],
|
|
[MTK_LCM_UTIL_TYPE_HEX_MDELAY 01 c8],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 01 29],
|
|
[MTK_LCM_UTIL_TYPE_HEX_MDELAY 01 64],
|
|
[MTK_LCM_PHASE_TYPE_HEX_END 02],
|
|
[MTK_LCM_PHASE_HEX_KERNEL MTK_LCM_PHASE_HEX_LK],
|
|
[MTK_LCM_TYPE_HEX_END];
|
|
|
|
unprepare-table = [MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 01 28],
|
|
[MTK_LCM_UTIL_TYPE_HEX_MDELAY 01 32],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 01 10],
|
|
[MTK_LCM_UTIL_TYPE_HEX_MDELAY 01 96],
|
|
[MTK_LCM_TYPE_HEX_END];
|
|
|
|
set-display-on-table =
|
|
[MTK_LCM_PHASE_TYPE_HEX_START 02],
|
|
[MTK_LCM_PHASE_HEX_LK],
|
|
[MTK_LCM_PHASE_HEX_LK_DISPLAY_ON_DELAY],
|
|
[MTK_LCM_UTIL_TYPE_HEX_TDELAY 01 78],
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER 01 29],
|
|
[MTK_LCM_UTIL_TYPE_HEX_MDELAY 01 64],
|
|
[MTK_LCM_PHASE_TYPE_HEX_END 02],
|
|
[MTK_LCM_PHASE_HEX_LK],
|
|
[MTK_LCM_PHASE_HEX_LK_DISPLAY_ON_DELAY],
|
|
[MTK_LCM_TYPE_HEX_END];
|
|
|
|
lcm-update-table;
|
|
|
|
/* if this is null, we default use 51 for backlight settings*/
|
|
set-backlight-mask = <0xff>;
|
|
set-backlight-cmdq-table =
|
|
[MTK_LCM_CMD_TYPE_HEX_WRITE_BUFFER_RUNTIME_INPUT 06],
|
|
[MTK_LCM_INPUT_TYPE_HEX_CURRENT_BACKLIGHT 01 01],
|
|
[02 51 FF],
|
|
[MTK_LCM_TYPE_HEX_END];
|
|
|
|
set-aod-light-mask = <0xff>;
|
|
set-aod-light-table;
|
|
|
|
ata-id-value-data = [00 00 00];
|
|
ata-check-size = <1>;
|
|
ata-check-table =
|
|
/*read cmd:4, read buffer index:0, length:3*/
|
|
[MTK_LCM_CMD_TYPE_HEX_READ_CMD 03 00 03 04],
|
|
[MTK_LCM_TYPE_HEX_END];
|
|
|
|
compare-id-value-data = [02];
|
|
compare-id-table = [MTK_LCM_UTIL_TYPE_HEX_RESET 01 01],
|
|
[MTK_LCM_UTIL_TYPE_HEX_RESET 01 00],
|
|
[MTK_LCM_UTIL_TYPE_HEX_MDELAY 01 01],
|
|
[MTK_LCM_UTIL_TYPE_HEX_RESET 01 01],
|
|
[MTK_LCM_UTIL_TYPE_HEX_MDELAY 01 14],
|
|
/*lk data length is 1*/
|
|
[MTK_LCM_LK_TYPE_HEX_PREPARE_PARAM_COUNT 01 01],
|
|
/* data[0] is 00013700*/
|
|
[MTK_LCM_LK_TYPE_HEX_PREPARE_PARAM 05 00 00 01 37 00],
|
|
[MTK_LCM_LK_TYPE_HEX_WRITE_PARAM 00], /*write*/
|
|
/*read cmd is BF, read back buffer index:0, length: 1*/
|
|
[MTK_LCM_CMD_TYPE_HEX_READ_BUFFER 03 00 01 BF],
|
|
[MTK_LCM_TYPE_HEX_END];
|
|
|
|
doze-enable-start-table;
|
|
|
|
doze-enable-table;
|
|
|
|
doze-disable-table;
|
|
|
|
doze-area-table;
|
|
|
|
doze-post-disp-on-table;
|
|
|
|
/* hbm status can be changed on which parameter index */
|
|
hbm-set-cmdq-switch-id;
|
|
hbm-set-cmdq-switch-on; /* the parameter of hbm on*/
|
|
hbm-set-cmdq-switch-off; /* the parameter of hbm off*/
|
|
hbm-set-cmdq-table;
|
|
|
|
gpio-test-table =
|
|
/* lcm-gpios index, gpio mode*/
|
|
[MTK_LCM_GPIO_TYPE_HEX_MODE 02 01 02],
|
|
/* lcm-gpios index, gpio direction*/
|
|
[MTK_LCM_GPIO_TYPE_HEX_DIR_OUTPUT 02 01 01],
|
|
[MTK_LCM_GPIO_TYPE_HEX_OUT 02 01 01],
|
|
[MTK_LCM_TYPE_HEX_END];
|
|
|
|
/* fps switch cmd for high frame rate feature */
|
|
lcm-ops-dsi-fps-switch-after-poweron {
|
|
compatible =
|
|
"mediatek,lcm-ops-dsi-fps-switch-after-poweron";
|
|
fps-switch-0-1080-2280-60-table;
|
|
};
|
|
|
|
lcm-ops-dsi-fps-switch-before-powerdown {
|
|
compatible =
|
|
"mediatek,lcm-ops-dsi-fps-switch-before-powerdown";
|
|
fps-switch-0-1080-2280-60-table;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|