420 lines
11 KiB
C
420 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2021 MediaTek Inc.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <linux/pm_runtime.h>
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#include <linux/jiffies.h>
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#include <linux/time.h> //do_gettimeofday()
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#include "mtk-interconnect.h"
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#include "camera_pda.h"
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// --------- define region --------
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// #define FOR_DEBUG
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#define PDA_MMQOS
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// --------------------------------
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#define PDA_DEV_NAME "camera-pda"
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#define LOG_INF(format, args...) \
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pr_info(PDA_DEV_NAME " [%s] " format, __func__, ##args)
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//define the write register function
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#define mt_reg_sync_writel(v, a) \
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do { \
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*(unsigned int *)(a) = (v); \
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mb(); /*make sure register access in order */ \
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} while (0)
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#define PDA_WR32(addr, data) mt_reg_sync_writel(data, addr)
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#define PDA_RD32(addr) ioread32(addr)
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static unsigned int g_Frame_Width, g_Frame_Height, g_B_N;
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/*******************************************************************************
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* Porting Part
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******************************************************************************/
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#define CAMSYS_NODE_COMPATIBLE "mediatek,mt6985-camsys_mraw"
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#define PDA_0_RESET_BITMASK (BIT(12) | BIT(13))
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#define PDA_1_RESET_BITMASK (BIT(14) | BIT(15))
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// clock relate
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static const char * const clk_names[] = {
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"camsys_mraw_pda0",
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"camsys_mraw_pda1",
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"mraw_larbx",
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"cam_main_cam2mm0_gals_cg_con",
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"cam_main_cam2mm1_gals_cg_con",
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"cam_main_cam_cg_con",
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};
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#define PDA_CLK_NUM ARRAY_SIZE(clk_names)
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struct PDA_CLK_STRUCT pda_clk[PDA_CLK_NUM];
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#ifdef PDA_MMQOS
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// mmqos relate
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static const char * const mmqos_names_rdma[] = {
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"l25_pdai_a0",
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"l25_pdai_a1",
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"l26_pdai_b0",
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"l26_pdai_b1"
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};
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#define PDA_MMQOS_RDMA_NUM ARRAY_SIZE(mmqos_names_rdma)
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struct icc_path *icc_path_pda_rdma[PDA_MMQOS_RDMA_NUM];
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static const char * const mmqos_names_rdma_b[] = {
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"l25_pdai_a2",
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"l26_pdai_b2",
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"l25_pdai_a3",
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"l26_pdai_b3",
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"l25_pdai_a4",
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"l26_pdai_b4"
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};
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#define PDA_MMQOS_RDMA_B_NUM ARRAY_SIZE(mmqos_names_rdma_b)
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struct icc_path *icc_path_pda_rdma_b[PDA_MMQOS_RDMA_B_NUM];
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static const char * const mmqos_names_wdma[] = {
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"l25_pdao_a",
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"l26_pdao_b"
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};
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#define PDA_MMQOS_WDMA_NUM ARRAY_SIZE(mmqos_names_wdma)
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struct icc_path *icc_path_pda_wdma[PDA_MMQOS_WDMA_NUM];
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#endif
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/*******************************************************************************
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* Internal function
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******************************************************************************/
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struct device *init_larb(struct platform_device *pdev, int idx)
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{
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struct device_node *node;
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struct platform_device *larb_pdev;
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struct device_link *link;
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/* get larb node from dts */
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node = of_parse_phandle(pdev->dev.of_node, "mediatek,larbs", idx);
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if (!node) {
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LOG_INF("fail to parse mediatek,larb\n");
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return NULL;
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}
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larb_pdev = of_find_device_by_node(node);
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if (WARN_ON(!larb_pdev)) {
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of_node_put(node);
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LOG_INF("no larb for idx %d\n", idx);
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return NULL;
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}
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of_node_put(node);
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link = device_link_add(&pdev->dev, &larb_pdev->dev,
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DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS);
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if (!link)
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LOG_INF("unable to link smi larb%d\n", idx);
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LOG_INF("pdev %p idx %d\n", pdev, idx);
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return &larb_pdev->dev;
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}
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/*******************************************************************************
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* API
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******************************************************************************/
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#ifdef PDA_MMQOS
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void pda_mmqos_init(struct device *pdev)
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{
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int i = 0;
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// get interconnect path for MMQOS
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for (i = 0; i < PDA_MMQOS_RDMA_NUM; ++i) {
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LOG_INF("rdma index: %d, mmqos name: %s\n", i, mmqos_names_rdma[i]);
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icc_path_pda_rdma[i] = of_mtk_icc_get(pdev, mmqos_names_rdma[i]);
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}
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// get interconnect path for MMQOS
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for (i = 0; i < PDA_MMQOS_RDMA_B_NUM; ++i) {
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LOG_INF("rdma b index: %d, mmqos name: %s\n", i, mmqos_names_rdma_b[i]);
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icc_path_pda_rdma_b[i] = of_mtk_icc_get(pdev, mmqos_names_rdma_b[i]);
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}
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// get interconnect path for MMQOS
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for (i = 0; i < PDA_MMQOS_WDMA_NUM; ++i) {
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LOG_INF("wdma index: %d, mmqos name: %s\n", i, mmqos_names_wdma[i]);
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icc_path_pda_wdma[i] = of_mtk_icc_get(pdev, mmqos_names_wdma[i]);
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}
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}
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void pda_mmqos_bw_set(struct _pda_a_reg_t_ *PDA_FrameSetting)
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{
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int i = 0;
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unsigned int Inter_Frame_Size_Width = 0;
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unsigned int Inter_Frame_Size_Height = 0;
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unsigned int B_N = 0;
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unsigned int Mach_ROI_Max_Width = 2048;
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unsigned int Mach_ROI_Max_Height = 96;
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unsigned int Mach_Frame_Size_Width = 4096;
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unsigned int Mach_Frame_Size_Height = 192;
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unsigned int Freqency = 360;
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unsigned int FOV = 200;
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unsigned int ROI_Number = PDA_MAXROI_PER_ROUND;
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unsigned int Frame_Rate = 30;
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unsigned int Search_Range = 40;
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#define Operation_Margin (12 / 10)
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unsigned int Inter_Frame_Size = 0, Mach_Frame_Size = 0;
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unsigned int Inter_Frame_Size_FOV = 0, Mach_Frame_Size_FOV = 0;
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unsigned int Inter_Input_Total_pixel_Itar = 0;
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unsigned int Inter_Input_Total_pixel_Iref = 0;
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unsigned int Mach_Input_Total_pixel_Itar = 0;
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unsigned int Required_Operation_Cycle = 0;
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unsigned int WDMA_Data = 0, temp = 0, RDMA_Data = 0;
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unsigned int OperationTime = 0;
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unsigned int WDMA_PEAK_BW = 0, WDMA_AVG_BW = 0;
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unsigned int RDMA_PEAK_BW = 0, RDMA_AVG_BW = 0;
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unsigned int IMAGE_TABLE_RDMA_PEAK_BW = 0;
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unsigned int IMAGE_TABLE_RDMA_AVG_BW = 0;
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unsigned int IMAGE_IMAGE_RDMA_PEAK_BW = 0;
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unsigned int IMAGE_IMAGE_RDMA_AVG_BW = 0;
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// -------------------------- parameter estimate ------------------------
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Inter_Frame_Size_Width = PDA_FrameSetting->PDA_CFG_0.Bits.PDA_WIDTH;
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Inter_Frame_Size_Height = PDA_FrameSetting->PDA_CFG_0.Bits.PDA_HEIGHT;
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B_N = PDA_FrameSetting->PDA_CFG_254.Bits.PDA_B_N;
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if (g_Frame_Width == Inter_Frame_Size_Width &&
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g_Frame_Height == Inter_Frame_Size_Height &&
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g_B_N == B_N) {
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#ifdef FOR_DEBUG
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LOG_INF("Frame WIDTH/HEIGHT/B_N no change, no need to set qos\n");
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#endif
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return;
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}
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FOV = (B_N > 0) ? 100 : 200;
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#ifdef FOR_DEBUG
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LOG_INF("Frame WIDTH/HEIGHT/B_N: %d/%d/%d\n",
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Inter_Frame_Size_Width,
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Inter_Frame_Size_Height,
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B_N);
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#endif
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Inter_Frame_Size = Inter_Frame_Size_Width * Inter_Frame_Size_Height;
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#ifdef FOR_DEBUG
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LOG_INF("E16 Inter_Frame_Size: %d\n", Inter_Frame_Size);
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#endif
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Mach_Frame_Size = Mach_Frame_Size_Width * Mach_Frame_Size_Height;
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Inter_Frame_Size_FOV = Inter_Frame_Size * FOV / 100;
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#ifdef FOR_DEBUG
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LOG_INF("E19 Inter_Frame_Size_FOV: %d\n", Inter_Frame_Size_FOV);
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#endif
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Mach_Frame_Size_FOV = Mach_Frame_Size * FOV / 100;
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Inter_Input_Total_pixel_Itar = Inter_Frame_Size_FOV;
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Inter_Input_Total_pixel_Iref = Inter_Frame_Size_FOV;
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Mach_Input_Total_pixel_Itar =
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(ROI_Number*Search_Range*Mach_ROI_Max_Height) +
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Mach_Frame_Size_FOV +
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(1*Mach_ROI_Max_Width);
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Required_Operation_Cycle =
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(unsigned int)(Mach_Input_Total_pixel_Itar *
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Operation_Margin *
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(Search_Range+1)) /
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Search_Range + 1;
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WDMA_Data = OUT_BYTE_PER_ROI*ROI_Number;
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temp = Inter_Input_Total_pixel_Itar+Inter_Input_Total_pixel_Iref;
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RDMA_Data = temp*(16+2)/8;
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#ifdef FOR_DEBUG
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LOG_INF("E27 RDMA_Data: %d\n", RDMA_Data);
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#endif
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OperationTime = Required_Operation_Cycle / Freqency / 1000;
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// WDMA BW estimate
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WDMA_PEAK_BW = WDMA_Data / OperationTime;
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WDMA_AVG_BW = WDMA_Data * Frame_Rate * 133 / 100 / 1000;
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// RDMA BW estimate
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RDMA_PEAK_BW = RDMA_Data / OperationTime;
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RDMA_AVG_BW = RDMA_Data * Frame_Rate / 1000;
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// Left/Right RDMA BW
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IMAGE_TABLE_RDMA_PEAK_BW = RDMA_PEAK_BW / 2;
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IMAGE_TABLE_RDMA_AVG_BW = RDMA_AVG_BW * 133 / 100 / 2;
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// IMAGE IMAGE SMI port is equal to IMAGE TABLE SMI port * 16/9
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IMAGE_IMAGE_RDMA_AVG_BW = IMAGE_TABLE_RDMA_AVG_BW * 16 / 9;
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// pda is not HRT engine, no need to set HRT bw
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IMAGE_TABLE_RDMA_PEAK_BW = 0;
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IMAGE_IMAGE_RDMA_PEAK_BW = 0;
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WDMA_PEAK_BW = 0;
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if (B_N > 0) {
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LOG_INF("RDMA_BW IT,II AVG/PEAK: %d/%d, %d/%d, WDMA_BW AVG/PEAK: %d/%d\n",
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IMAGE_TABLE_RDMA_AVG_BW,
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IMAGE_TABLE_RDMA_PEAK_BW,
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IMAGE_IMAGE_RDMA_AVG_BW,
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IMAGE_IMAGE_RDMA_PEAK_BW,
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WDMA_AVG_BW,
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WDMA_PEAK_BW);
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} else {
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LOG_INF("RDMA_BW IT AVG/PEAK: %d/%d, WDMA_BW AVG/PEAK: %d/%d\n",
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IMAGE_TABLE_RDMA_AVG_BW,
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IMAGE_TABLE_RDMA_PEAK_BW,
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WDMA_AVG_BW,
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WDMA_PEAK_BW);
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}
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// MMQOS set bw
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for (i = 0; i < PDA_MMQOS_RDMA_NUM; ++i) {
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if (icc_path_pda_rdma[i]) {
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mtk_icc_set_bw(icc_path_pda_rdma[i],
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(int)(IMAGE_TABLE_RDMA_AVG_BW),
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(int)(IMAGE_TABLE_RDMA_PEAK_BW));
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}
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}
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if (B_N <= 3) {
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// MMQOS set bw
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for (i = 0; i < (B_N * 2); ++i) {
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if (icc_path_pda_rdma_b[i]) {
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mtk_icc_set_bw(icc_path_pda_rdma_b[i],
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(int)(IMAGE_IMAGE_RDMA_AVG_BW),
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(int)(IMAGE_IMAGE_RDMA_PEAK_BW));
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}
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}
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} else {
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LOG_INF("B_N out of range, B_N:%d\n", B_N);
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}
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for (i = 0; i < PDA_MMQOS_WDMA_NUM; ++i) {
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if (icc_path_pda_wdma[i]) {
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mtk_icc_set_bw(icc_path_pda_wdma[i],
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(int)(WDMA_AVG_BW),
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(int)(WDMA_PEAK_BW));
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}
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}
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g_Frame_Width = Inter_Frame_Size_Width;
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g_Frame_Height = Inter_Frame_Size_Height;
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g_B_N = B_N;
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}
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void pda_mmqos_bw_reset(void)
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{
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int i = 0;
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#ifdef FOR_DEBUG
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LOG_INF("mmqos reset\n");
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#endif
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// MMQOS reset bw
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for (i = 0; i < PDA_MMQOS_RDMA_NUM; ++i) {
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if (icc_path_pda_rdma[i])
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mtk_icc_set_bw(icc_path_pda_rdma[i], 0, 0);
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}
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for (i = 0; i < PDA_MMQOS_RDMA_B_NUM; ++i) {
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if (icc_path_pda_rdma_b[i])
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mtk_icc_set_bw(icc_path_pda_rdma_b[i], 0, 0);
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}
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for (i = 0; i < PDA_MMQOS_WDMA_NUM; ++i) {
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if (icc_path_pda_wdma[i])
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mtk_icc_set_bw(icc_path_pda_wdma[i], 0, 0);
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}
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g_Frame_Width = 0;
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g_Frame_Height = 0;
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g_B_N = 0;
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}
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#endif
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void pda_init_larb(struct platform_device *pdev)
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{
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int larbs, i;
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struct device *larb;
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// must porting in dts
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larbs = of_count_phandle_with_args(
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pdev->dev.of_node, "mediatek,larbs", NULL);
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LOG_INF("larb_num:%d\n", larbs);
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for (i = 0; i < larbs; i++)
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larb = init_larb(pdev, i);
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}
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int pda_devm_clk_get(struct platform_device *pdev)
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{
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int i = 0;
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for (i = 0; i < PDA_CLK_NUM; ++i) {
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// CCF: Grab clock pointer (struct clk*)
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LOG_INF("index: %d, clock name: %s\n", i, clk_names[i]);
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pda_clk[i].CG_PDA_TOP_MUX = devm_clk_get(&pdev->dev, clk_names[i]);
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if (IS_ERR(pda_clk[i].CG_PDA_TOP_MUX)) {
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LOG_INF("cannot get %s clock\n", clk_names[i]);
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return PTR_ERR(pda_clk[i].CG_PDA_TOP_MUX);
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}
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}
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return 0;
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}
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void pda_clk_prepare_enable(void)
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{
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int ret, i;
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for (i = 0; i < PDA_CLK_NUM; i++) {
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ret = clk_prepare_enable(pda_clk[i].CG_PDA_TOP_MUX);
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if (ret)
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LOG_INF("cannot enable clock (%s)\n", clk_names[i]);
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#ifdef FOR_DEBUG
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LOG_INF("clk_prepare_enable (%s) done", clk_names[i]);
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#endif
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}
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#ifdef FOR_DEBUG
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LOG_INF("clk_prepare_enable done");
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#endif
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}
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void pda_clk_disable_unprepare(void)
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{
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int i;
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for (i = 0; i < PDA_CLK_NUM; i++) {
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clk_disable_unprepare(pda_clk[i].CG_PDA_TOP_MUX);
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#ifdef FOR_DEBUG
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LOG_INF("clk_disable_unprepare (%s) done\n", clk_names[i]);
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#endif
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}
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}
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void __iomem *pda_get_camsys_address(void)
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{
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struct device_node *camsys_node;
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// camsys node
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camsys_node = of_find_compatible_node(NULL, NULL, CAMSYS_NODE_COMPATIBLE);
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return of_iomap(camsys_node, 0);
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}
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unsigned int GetResetBitMask(int PDA_Index)
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{
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unsigned int ret = 0;
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if (PDA_Index == 0)
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ret = PDA_0_RESET_BITMASK;
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else if (PDA_Index == 1)
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ret = PDA_1_RESET_BITMASK;
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return ret;
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}
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