340 lines
10 KiB
C
Executable file
340 lines
10 KiB
C
Executable file
/*
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*
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* The spi driver for FocalTech FingerPrint driver.
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*
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* Copyright (c) 2017-2022, FocalTech Systems, Ltd., all rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include "ff_core.h"
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#include "ff_spi.h"
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#if IS_ENABLED(CONFIG_TRUSTKERNEL_TEE_SUPPORT)
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#include "linux/tee_fp.h"
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#endif
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/*****************************************************************************
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* Private constant and macro definitions using #define
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*****************************************************************************/
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#undef LOG_TAG
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#define LOG_TAG "focaltech_chip"
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#define FF_CMD_SFR_WRITE (0x09)
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#define FF_CMD_SFR_READ (0x08)
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#define FF_CMD_SRAM_WRITE (0x05)
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#define FF_CMD_SRAM_READ (0x04)
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#define FF_SPI_BUF_SIZE (32)
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/*****************************************************************************
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* static variable or structure
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*****************************************************************************/
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/*****************************************************************************
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* Global variable or extern global variabls/functions
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*****************************************************************************/
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#if IS_ENABLED(CONFIG_TRUSTKERNEL_TEE_SUPPORT)
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static struct mt_chip_conf ff_mt_chip_conf = {
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.setuptime = 30,
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.holdtime = 30,
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.high_time = 25,
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.low_time = 25, /* default 2MHz */
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.cs_idletime = 10,
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.ulthgh_thrsh = 0,
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.sample_sel = POSITIVE_EDGE,
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.cpol = SPI_CPOL_0,
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.cpha = SPI_CPHA_0,
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.rx_mlsb = SPI_MSB,
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.tx_mlsb = SPI_MSB,
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.tx_endian = SPI_LENDIAN,
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.rx_endian = SPI_LENDIAN,
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.com_mod = FIFO_TRANSFER, /*only read ID*/
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.pause = PAUSE_MODE_DISABLE,
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.finish_intr = FINISH_INTR_EN,
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.deassert = DEASSERT_DISABLE,
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.ulthigh = ULTRA_HIGH_DISABLE,
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.tckdly = TICK_DLY0,
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};
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static int ff_spi_transfer(uint8_t *tx_buf, uint8_t *rx_buf, uint32_t len)
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{
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int ret = 0;
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FF_LOGV("'%s' enter.", __func__);
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if ((!tx_buf) || (!rx_buf) || (!len)) {
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FF_LOGE("tx_buf/rx_buf/len(%d) is null", len);
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return -EINVAL;
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}
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ret = tee_spi_transfer(&ff_mt_chip_conf, sizeof(struct mt_chip_conf), tx_buf, rx_buf, len);
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if (ret) {
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FF_LOGE("tee_spi_transfer fail, ret=%d", ret);
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}
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FF_LOGV("'%s' leave.", __func__);
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return ret;
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}
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#endif
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#if !IS_ENABLED(CONFIG_TRUSTKERNEL_TEE_SUPPORT)
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static int ff_spi_transfer(uint8_t *tx_buf, uint8_t *rx_buf, uint32_t len)
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{
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int ret = 0;
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ff_context_t *ff_ctx = g_ff_ctx;
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struct spi_message msg;
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struct spi_transfer xfer = { 0 };
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uint8_t *kernel_tx_buf = NULL;
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uint8_t *kernel_rx_buf = NULL;
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if ((!ff_ctx) || (!(ff_ctx->spi)) || (!tx_buf) || (!rx_buf) || (!len)) {
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FF_LOGE("ff_ctx/spi/tx_buf/rx_buf/len(%d) is null", len);
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return -ENODATA;
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}
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kernel_tx_buf = kzalloc(FF_SPI_BUF_SIZE, GFP_KERNEL);
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kernel_rx_buf = kzalloc(FF_SPI_BUF_SIZE, GFP_KERNEL);
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if ((!kernel_tx_buf) || (!kernel_rx_buf)) {
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FF_LOGE("failed to allocate memory for kernel_tx/rx_buf");
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ret = -ENOMEM;
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goto err_spi_transfer;
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}
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memcpy(kernel_tx_buf, tx_buf, len);
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xfer.tx_buf = kernel_tx_buf;
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xfer.rx_buf = kernel_rx_buf;
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xfer.len = len;
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spi_message_init(&msg);
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spi_message_add_tail(&xfer, &msg);
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ret = spi_sync(ff_ctx->spi, &msg);
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if (ret) {
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FF_LOGE("spi_sync fail,ret:%d", ret);
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}
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memcpy(rx_buf, kernel_rx_buf, len);
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err_spi_transfer:
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if (kernel_tx_buf) {
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kfree(kernel_tx_buf);
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kernel_tx_buf = NULL;
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}
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if (kernel_rx_buf) {
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kfree(kernel_rx_buf);
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kernel_rx_buf = NULL;
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}
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return ret;
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}
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#endif
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static int ff_sfr_write(uint8_t addr, uint8_t value)
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{
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int ret = 0;
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uint8_t txbuf[FF_SPI_BUF_SIZE] = { 0 };
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uint8_t rxbuf[FF_SPI_BUF_SIZE] = { 0 };
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uint32_t txlen = 0;
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FF_LOGV("'%s' enter.", __func__);
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memset(txbuf, 0, FF_SPI_BUF_SIZE);
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memset(rxbuf, 0, FF_SPI_BUF_SIZE);
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txbuf[txlen++] = (uint8_t)(FF_CMD_SFR_WRITE);
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txbuf[txlen++] = (uint8_t)(~FF_CMD_SFR_WRITE);
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txbuf[txlen++] = addr;
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txbuf[txlen++] = value;
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ret = ff_spi_transfer(txbuf, rxbuf, txlen);
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if (ret < 0) {
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FF_LOGE("ff_sfr_write fail,addr=0x%x,ret=%d", addr, ret);
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}
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FF_LOGV("'%s' leave.", __func__);
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return ret;
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}
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static int ff_sfr_read(uint8_t addr, uint8_t *value)
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{
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int ret = 0;
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uint8_t txbuf[FF_SPI_BUF_SIZE] = { 0 };
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uint8_t rxbuf[FF_SPI_BUF_SIZE] = { 0 };
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uint32_t txlen = 0;
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FF_LOGV("'%s' enter.", __func__);
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memset(txbuf, 0, FF_SPI_BUF_SIZE);
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memset(rxbuf, 0, FF_SPI_BUF_SIZE);
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txbuf[txlen++] = (uint8_t)(FF_CMD_SFR_READ);
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txbuf[txlen++] = (uint8_t)(~FF_CMD_SFR_READ);
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txbuf[txlen++] = addr;
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txbuf[txlen++] = 0;
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txbuf[txlen++] = 0;
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ret = ff_spi_transfer(txbuf, rxbuf, txlen);
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if (ret < 0) {
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FF_LOGE("ff_sfr_read fail,addr=0x%x,ret=%d", addr, ret);
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} else {
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*value = rxbuf[txlen - 1];
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}
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FF_LOGV("'%s' leave.", __func__);
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return ret;
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}
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static int ff_sram_write(uint16_t addr, uint16_t value)
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{
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int ret = 0;
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uint8_t txbuf[FF_SPI_BUF_SIZE] = { 0 };
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uint8_t rxbuf[FF_SPI_BUF_SIZE] = { 0 };
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uint32_t txlen = 0;
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uint16_t sram_addr = (addr | 0x8000);
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uint16_t sram_len = 0x0000;
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FF_LOGV("'%s' enter.", __func__);
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memset(txbuf, 0, FF_SPI_BUF_SIZE);
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memset(rxbuf, 0, FF_SPI_BUF_SIZE);
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txbuf[txlen++] = (uint8_t)(FF_CMD_SRAM_WRITE);
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txbuf[txlen++] = (uint8_t)(~FF_CMD_SRAM_WRITE);
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txbuf[txlen++] = (uint8_t)((sram_addr >> 8) & 0x00FF);
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txbuf[txlen++] = (uint8_t)(sram_addr & 0x00FF);
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txbuf[txlen++] = (uint8_t)((sram_len >> 8) & 0x00FF);
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txbuf[txlen++] = (uint8_t)(sram_len & 0x00FF);
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txbuf[txlen++] = (uint8_t)((value >> 8) & 0x00FF);
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txbuf[txlen++] = (uint8_t)(value & 0x00FF);
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ret = ff_spi_transfer(txbuf, rxbuf, txlen);
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if (ret < 0) {
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FF_LOGE("ff_sram_write fail,addr=0x%x,ret=%d", addr, ret);
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}
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FF_LOGV("'%s' leave.", __func__);
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return ret;
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}
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static int ff_sram_read(uint16_t addr, uint16_t *value)
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{
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int ret = 0;
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//int i = 0;
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uint8_t txbuf[FF_SPI_BUF_SIZE] = { 0 };
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uint8_t rxbuf[FF_SPI_BUF_SIZE] = { 0 };
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uint32_t txlen = 0;
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uint32_t dp = 0;
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uint16_t sram_addr = (addr | 0x8000);
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uint16_t sram_len = 0x0001;
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FF_LOGV("'%s' enter.", __func__);
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memset(txbuf, 0, FF_SPI_BUF_SIZE);
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memset(rxbuf, 0, FF_SPI_BUF_SIZE);
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txbuf[txlen++] = (uint8_t)(FF_CMD_SRAM_READ);
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txbuf[txlen++] = (uint8_t)(~FF_CMD_SRAM_READ);
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txbuf[txlen++] = (uint8_t)((sram_addr >> 8) & 0x00FF);
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txbuf[txlen++] = (uint8_t)(sram_addr & 0x00FF);
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txbuf[txlen++] = (uint8_t)((sram_len >> 8) & 0x00FF);
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txbuf[txlen++] = (uint8_t)(sram_len & 0x00FF);
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dp = txlen;
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txlen += 4;
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ret = ff_spi_transfer(txbuf, rxbuf, txlen);
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if (ret < 0) {
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FF_LOGE("ff_sram_read fail,addr=0x%x,ret=%d", addr, ret);
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} else {
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*value = (rxbuf[dp] << 8) + rxbuf[dp + 1];
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}
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FF_LOGV("'%s' leave.", __func__);
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return ret;
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}
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static int ff_chip_probe_id(void)
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{
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int ret = 0;
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int i = 0;
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int read_id_retries = 0;
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uint16_t chip_id = 0xFFFF;
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uint8_t val = 0xFF;
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uint8_t set_iov_tries = 5;
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uint8_t set_spimode_tries = 3;
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#if IS_ENABLED(CONFIG_TRUSTKERNEL_TEE_SUPPORT)
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/*max spi trasfer count:20*/
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set_iov_tries = 1;
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set_spimode_tries = 1;
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#endif
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FF_LOGV("'%s' enter.", __func__);
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for (read_id_retries = 0; read_id_retries < 3; read_id_retries++) {
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fts_power_sequence(1);
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/*set io voltage*/
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for (i = 0; i < set_iov_tries; i++) {
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ff_sfr_write(0xFD, 0x0A);
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ff_sfr_write(0xFE, 0x7F);
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msleep(1);
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ff_sfr_read(0xFE, &val);
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if (0x7F != val) {
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FF_LOGI("set io voltage abnormal,read:%d,retry:%d", val, i);
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continue;
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}
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FF_LOGD("set io voltage pass");
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break;
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}
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if (i >= set_iov_tries) {
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FF_LOGE("set io voltage fail");
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}
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/*set spi mode*/
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for (i = 0; i < set_spimode_tries; i++) {
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ff_sfr_write(0xC6, 0x01);
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msleep(4);
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ff_sfr_read(0xC6, &val);
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if (0x01 != val) {
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FF_LOGI("set spi mode abnormal,read:%d,retry:%d", val, i);
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continue;
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}
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FF_LOGD("set spi mode pass");
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break;
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}
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if (i >= set_spimode_tries) {
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FF_LOGE("set spi mode fail");
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}
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/*clear intr*/
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ff_sram_write((0x3500 / 2 + 0x04), 0xFFFF);
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/*read id*/
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ff_sram_read((0x3500 / 2 + 0x0B), &chip_id);
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FF_LOGI("read chip id:0x%x", chip_id);
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if ((chip_id & 0xFF00) == 0x9300) {
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FF_LOGI("probe id(0x%x) pass", chip_id);
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if (g_ff_ctx) g_ff_ctx->chip_id = chip_id;
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ret = 0;
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break;
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} else {
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FF_LOGI("probe id fail,read:0x%x,retry=%d", chip_id, read_id_retries);
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fts_power_sequence(0);
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ret = -EIO;
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}
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}
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FF_LOGV("'%s' leave.", __func__);
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return ret;
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}
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int ff_probe_id(void)
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{
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int ret = 0;
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FF_LOGI("'%s' enter.", __func__);
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ret = ff_init_driver();
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if (ret < 0) {
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FF_LOGE("ff_init_driver fail, ret=%d", ret);
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goto err_init_driver;
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}
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ret = ff_chip_probe_id();
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if (ret < 0) {
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FF_LOGE("probe chip id fail, ret=%d", ret);
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goto err_init_driver;
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}
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ret = 0;
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err_init_driver:
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ff_free_driver();
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FF_LOGI("'%s' leave.", __func__);
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return ret;
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}
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