1206 lines
34 KiB
C
Executable file
1206 lines
34 KiB
C
Executable file
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include <linux/backlight.h>
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#include <drm/drm_mipi_dsi.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_modes.h>
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#include <linux/delay.h>
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#include <drm/drm_connector.h>
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#include <drm/drm_device.h>
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#include <linux/gpio/consumer.h>
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#include <linux/regulator/consumer.h>
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#include <video/mipi_display.h>
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#include <video/of_videomode.h>
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#include <video/videomode.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/of_graph.h>
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#include <linux/platform_device.h>
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#define CONFIG_MTK_PANEL_EXT
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#if defined(CONFIG_MTK_PANEL_EXT)
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#include "../mediatek/mediatek_v2/mtk_panel_ext.h"
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#include "../mediatek/mediatek_v2/mtk_drm_graphics_base.h"
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#endif
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#if IS_ENABLED(CONFIG_PRIZE_HARDWARE_INFO)
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#include "../../../misc/mediatek/prize/hardware_info/hardware_info.h"
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extern struct hardware_info current_lcm_info;
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#endif
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static char init_head_tb[] = {0xFE, 0x00};
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static char bl_tb[] = {0x51, 0x0D, 0xBB};
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static char hbm_tb[] = {0x51, 0x0F, 0xFE};
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static char aod_bl_tb[] = {0x51, 0x00, 0x00};
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//modify by shenwenbin for low backlight flick 20240415 start
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static bool bl_hbm_status = false;
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static char bl_crtl[] = {0x53, 0x20};
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//modify by shenwenbin for low backlight flick 20240415 end
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extern int mtk_drm_esd_check_status(void);
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extern void mtk_drm_esd_set_status(int status);
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/*LCM_DEGREE default value*/
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#define PROBE_FROM_DTS 0
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struct visionox_lcm {
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struct device *dev;
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struct drm_panel panel;
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struct backlight_device *backlight;
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struct gpio_desc *reset_gpio;
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struct gpio_desc *amoled_vddi_en_gpio;
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struct gpio_desc *amoled_vdd_en_gpio;
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struct gpio_desc *amoled_vci_en_gpio;
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bool prepared;
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bool enabled;
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unsigned int lcm_degree;
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/* drv modify hbm function start */
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bool hbm_en;
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bool hbm_wait;
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bool hbm_stat;
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bool doze_en; //drv-Fixed the issue of entering aod and TP having touch-pengzhipeng-20230516
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/* drv modify hbm function end */
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int error;
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};
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static unsigned int last_level; // drv modify hbm function
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struct visionox_lcm *g_ctx;
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#define visionox_dcs_write_seq(ctx, seq...) \
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({ \
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const u8 d[] = { seq }; \
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BUILD_BUG_ON_MSG(ARRAY_SIZE(d) > 64, \
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"DCS sequence too big for stack"); \
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visionox_dcs_write(ctx, d, ARRAY_SIZE(d)); \
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})
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#define visionox_dcs_write_seq_static(ctx, seq...) \
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({ \
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static const u8 d[] = { seq }; \
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visionox_dcs_write(ctx, d, ARRAY_SIZE(d)); \
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})
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static inline struct visionox_lcm *panel_to_lcm(struct drm_panel *panel)
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{
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return container_of(panel, struct visionox_lcm, panel);
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}
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#ifdef PANEL_SUPPORT_READBACK
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static int visionox_dcs_read(struct visionox_lcm *ctx, u8 cmd, void *data, size_t len)
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{
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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ssize_t ret;
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if (ctx->error < 0)
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return 0;
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ret = mipi_dsi_dcs_read(dsi, cmd, data, len);
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if (ret < 0) {
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dev_info(ctx->dev, "error %d reading dcs seq:(%#x)\n", ret,
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cmd);
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ctx->error = ret;
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}
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return ret;
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}
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static void visionox_panel_get_data(struct visionox_lcm *ctx)
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{
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u8 buffer[3] = { 0 };
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static int ret;
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pr_info("%s+\n", __func__);
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ret = visionox_dcs_read(ctx, 0x0A, buffer, 1);
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pr_info("%s 0x%08x\n", __func__, buffer[0] | (buffer[1] << 8));
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dev_info(ctx->dev, "return %d data(0x%08x) to dsi engine\n",
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ret, buffer[0] | (buffer[1] << 8));
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}
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#endif
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static void visionox_dcs_write(struct visionox_lcm *ctx, const void *data, size_t len)
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{
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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ssize_t ret;
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char *addr;
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if (ctx->error < 0)
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return;
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addr = (char *)data;
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if (len > 1)
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udelay(20);
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if ((int)*addr < 0xB0)
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ret = mipi_dsi_dcs_write_buffer(dsi, data, len);
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else
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ret = mipi_dsi_generic_write(dsi, data, len);
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if (ret < 0) {
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dev_info(ctx->dev, "error %zd writing seq: %ph\n", ret, data);
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ctx->error = ret;
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}
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}
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//modify by shenwenbin for ESD recovery not send backlight 20240106 start
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static void lcm_pannel_reconfig_blk(struct visionox_lcm *ctx)
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{
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if(mtk_drm_esd_check_status()){
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visionox_dcs_write(ctx,init_head_tb,ARRAY_SIZE(init_head_tb));
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visionox_dcs_write(ctx,bl_tb,ARRAY_SIZE(bl_tb));
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mtk_drm_esd_set_status(0);
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}
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}
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//modify by shenwenbin for ESD recovery not send backlight 20240106 end
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static void visionox_panel_init(struct visionox_lcm *ctx)
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{
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pr_info("%s+\n", __func__);
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ctx->reset_gpio = devm_gpiod_get(ctx->dev, "reset", GPIOD_OUT_HIGH);
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gpiod_set_value(ctx->reset_gpio, 1);
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usleep_range(10000, 10001);
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gpiod_set_value(ctx->reset_gpio, 0);
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usleep_range(10000, 10001);
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gpiod_set_value(ctx->reset_gpio, 1);
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usleep_range(50000, 50001);
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devm_gpiod_put(ctx->dev, ctx->reset_gpio);
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visionox_dcs_write_seq_static(ctx,0xFE,0xD4); //Page D4
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visionox_dcs_write_seq_static(ctx,0x40,0x03); // lvd/mipi error flag enable
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visionox_dcs_write_seq_static(ctx,0xFE,0xFD); //Page FD
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visionox_dcs_write_seq_static(ctx,0x80,0x06); //error report to 0A00 enable
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visionox_dcs_write_seq_static(ctx,0x83,0x00); //command 1 OFF
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visionox_dcs_write_seq_static(ctx,0xEE,0x00); // LSIF Path CS off
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visionox_dcs_write_seq_static(ctx,0xEF,0x00); // LSIF Path CS off
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visionox_dcs_write_seq_static(ctx,0xFE,0xD0); //Page D0
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visionox_dcs_write_seq_static(ctx,0x7E,0x80); // DB Mode PAD off
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visionox_dcs_write_seq_static(ctx,0xFE,0xD2); //Page D0
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visionox_dcs_write_seq_static(ctx,0x23,0x56); // CPHY EN PAD off
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visionox_dcs_write_seq_static(ctx,0xFE,0xA0); //Page A0
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visionox_dcs_write_seq_static(ctx,0x06,0x32); //lvd function VCI/VDDI/AVDD
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visionox_dcs_write_seq_static(ctx,0xFE,0xA1); //Page A1
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visionox_dcs_write_seq_static(ctx,0xB3,0x3F);
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visionox_dcs_write_seq_static(ctx,0xFE,0xA1);
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visionox_dcs_write_seq_static(ctx,0xC3,0xC3);
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visionox_dcs_write_seq_static(ctx,0xC4,0x9C);
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visionox_dcs_write_seq_static(ctx,0xC5,0x1E);
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//drv-mod by shenwenbin for 10bit color 20240326 start
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visionox_dcs_write_seq_static(ctx,0xFE,0xD2); // switch to D2 page
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visionox_dcs_write_seq_static(ctx,0x51,0xab); // pps003
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visionox_dcs_write_seq_static(ctx,0x5a,0x02); // pps012
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visionox_dcs_write_seq_static(ctx,0x5b,0x1c); // pps013
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visionox_dcs_write_seq_static(ctx,0x60,0xe8); // pps023
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visionox_dcs_write_seq_static(ctx,0x62,0x07); // pps025
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visionox_dcs_write_seq_static(ctx,0x66,0x05); // pps030
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visionox_dcs_write_seq_static(ctx,0x67,0x16); // pps031
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visionox_dcs_write_seq_static(ctx,0x6c,0x07); // pps036
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visionox_dcs_write_seq_static(ctx,0x6d,0x10); // pps037
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visionox_dcs_write_seq_static(ctx,0x71,0x0f); // pps041
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visionox_dcs_write_seq_static(ctx,0x72,0x0f); // pps042
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visionox_dcs_write_seq_static(ctx,0x82,0x02); // pps058
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visionox_dcs_write_seq_static(ctx,0x84,0x22); // pps060
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visionox_dcs_write_seq_static(ctx,0x86,0x2a); // pps062
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visionox_dcs_write_seq_static(ctx,0x88,0x2a); // pps064
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visionox_dcs_write_seq_static(ctx,0x8a,0x3a); // pps066
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visionox_dcs_write_seq_static(ctx,0x8c,0x3a); // pps068
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visionox_dcs_write_seq_static(ctx,0x8e,0x3a); // pps070
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visionox_dcs_write_seq_static(ctx,0x90,0x3b); // pps072
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visionox_dcs_write_seq_static(ctx,0x92,0x3b); // pps0740
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visionox_dcs_write_seq_static(ctx,0x94,0x3b); // pps076
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visionox_dcs_write_seq_static(ctx,0x96,0x4b); // pps078
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visionox_dcs_write_seq_static(ctx,0x98,0x4c); // pps080
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visionox_dcs_write_seq_static(ctx,0x9a,0x4c); // pps082
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visionox_dcs_write_seq_static(ctx,0x9c,0x5c); // pps084
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visionox_dcs_write_seq_static(ctx,0x9e,0x8c); // pps086
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visionox_dcs_write_seq_static(ctx,0xa2,0x02); // pps014
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visionox_dcs_write_seq_static(ctx,0xa3,0x1c); // pps015
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//drv-mod by shenwenbin for 10bit color 20240326 end
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visionox_dcs_write_seq_static(ctx,0xFE,0x40);
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visionox_dcs_write_seq_static(ctx,0xBD,0x05); //60HZ
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visionox_dcs_write_seq_static(ctx,0xFE,0xB0);
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visionox_dcs_write_seq_static(ctx,0x91,0x70);
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visionox_dcs_write_seq_static(ctx,0x27,0x7E);
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visionox_dcs_write_seq_static(ctx,0xFE,0xFD);
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visionox_dcs_write_seq_static(ctx,0x80,0xF6);
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visionox_dcs_write_seq_static(ctx,0xFE,0xA1);
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visionox_dcs_write_seq_static(ctx,0xCD,0x00);
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visionox_dcs_write_seq_static(ctx,0xCE,0x00);
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visionox_dcs_write_seq_static(ctx,0xFE,0xD1);
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visionox_dcs_write_seq_static(ctx,0xB4,0x01);
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visionox_dcs_write_seq_static(ctx,0xFE,0x38);
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visionox_dcs_write_seq_static(ctx,0x17,0x0F);
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visionox_dcs_write_seq_static(ctx,0x18,0x0F);
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visionox_dcs_write_seq_static(ctx,0xFE,0x00);
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visionox_dcs_write_seq_static(ctx,0xFA,0x01); //vesa on
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visionox_dcs_write_seq_static(ctx,0xC2,0x08); //command mode
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visionox_dcs_write_seq_static(ctx,0x35,0x00);
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visionox_dcs_write_seq_static(ctx,0x51,0x00,0x00);
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lcm_pannel_reconfig_blk(ctx); //modify by shenwenbin for ESD recovery not send backlight 20240106
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visionox_dcs_write_seq_static(ctx, 0x53,0x28); //modify by shenwenbin for low backlight flick 20240109
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visionox_dcs_write_seq_static(ctx, 0x11,0x00);
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msleep(120);
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visionox_dcs_write_seq_static(ctx, 0x29,0x00);
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//bist mode
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/* visionox_dcs_write_seq_static(ctx, 0xFE,0x00);
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visionox_dcs_write_seq_static(ctx, 0xFA,0x07);
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visionox_dcs_write_seq_static(ctx, 0xFE,0xD0);
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visionox_dcs_write_seq_static(ctx, 0x43,0x7F);
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visionox_dcs_write_seq_static(ctx, 0x44,0x01);
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visionox_dcs_write_seq_static(ctx, 0x45,0x21);
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visionox_dcs_write_seq_static(ctx, 0x45,0x21);
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visionox_dcs_write_seq_static(ctx, 0x3A,0xC8);
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visionox_dcs_write_seq_static(ctx, 0x3A,0xC8);
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visionox_dcs_write_seq_static(ctx, 0xFE,0xD4);
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visionox_dcs_write_seq_static(ctx, 0x52,0x90);
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visionox_dcs_write_seq_static(ctx, 0x53,0x40); */
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pr_info("%s-\n", __func__);
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}
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static int visionox_disable(struct drm_panel *panel)
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{
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struct visionox_lcm *ctx = panel_to_lcm(panel);
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if (!ctx->enabled)
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return 0;
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if (ctx->backlight) {
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ctx->backlight->props.power = FB_BLANK_POWERDOWN;
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backlight_update_status(ctx->backlight);
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}
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ctx->enabled = false;
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return 0;
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}
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static int visionox_unprepare(struct drm_panel *panel)
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{
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struct visionox_lcm *ctx = panel_to_lcm(panel);
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pr_info("%s+\n", __func__);
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if (!ctx->prepared)
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return 0;
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visionox_dcs_write_seq_static(ctx, 0xFE,0x00); //modify by shenwenbin for suspend timing 20231118
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visionox_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_OFF);
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msleep(50);
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visionox_dcs_write_seq_static(ctx, MIPI_DCS_ENTER_SLEEP_MODE);
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msleep(150);
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ctx->reset_gpio = devm_gpiod_get(ctx->dev, "reset", GPIOD_OUT_HIGH);
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gpiod_set_value(ctx->reset_gpio, 0);
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devm_gpiod_put(ctx->dev, ctx->reset_gpio);
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ctx->amoled_vddi_en_gpio = devm_gpiod_get(ctx->dev, "amoled-vddi-en", GPIOD_OUT_HIGH);
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gpiod_set_value(ctx->amoled_vddi_en_gpio, 0);
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devm_gpiod_put(ctx->dev, ctx->amoled_vddi_en_gpio);
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ctx->amoled_vdd_en_gpio = devm_gpiod_get(ctx->dev, "amoled-vdd-en", GPIOD_OUT_HIGH);
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gpiod_set_value(ctx->amoled_vdd_en_gpio, 0);
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devm_gpiod_put(ctx->dev, ctx->amoled_vdd_en_gpio);
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ctx->amoled_vci_en_gpio = devm_gpiod_get(ctx->dev, "amoled-vci-en", GPIOD_OUT_HIGH);
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gpiod_set_value(ctx->amoled_vci_en_gpio, 0);
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devm_gpiod_put(ctx->dev, ctx->amoled_vci_en_gpio);
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ctx->hbm_en = false;
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ctx->doze_en = false;//drv-Fixed the issue of entering aod and TP having touch-pengzhipeng-20230516
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ctx->error = 0;
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ctx->prepared = false;
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pr_info("%s-\n", __func__);
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return 0;
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}
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static int visionox_prepare(struct drm_panel *panel)
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{
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struct visionox_lcm *ctx = panel_to_lcm(panel);
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int ret;
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pr_info("%s+\n", __func__);
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if (ctx->prepared)
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return 0;
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// lcd reset H -> L -> L
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ctx->reset_gpio = devm_gpiod_get(ctx->dev, "reset", GPIOD_OUT_HIGH);
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gpiod_set_value(ctx->reset_gpio, 0);
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devm_gpiod_put(ctx->dev, ctx->reset_gpio);
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usleep_range(5000, 5001);
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// end
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ctx->amoled_vddi_en_gpio = devm_gpiod_get(ctx->dev, "amoled-vddi-en", GPIOD_OUT_HIGH);
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gpiod_set_value(ctx->amoled_vddi_en_gpio, 1);
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devm_gpiod_put(ctx->dev, ctx->amoled_vddi_en_gpio);
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usleep_range(5000, 5001);
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ctx->amoled_vdd_en_gpio = devm_gpiod_get(ctx->dev, "amoled-vdd-en", GPIOD_OUT_HIGH);
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gpiod_set_value(ctx->amoled_vdd_en_gpio, 1);
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devm_gpiod_put(ctx->dev, ctx->amoled_vdd_en_gpio);
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usleep_range(5000, 5001);
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ctx->amoled_vci_en_gpio = devm_gpiod_get(ctx->dev, "amoled-vci-en", GPIOD_OUT_HIGH);
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gpiod_set_value(ctx->amoled_vci_en_gpio, 1);
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devm_gpiod_put(ctx->dev, ctx->amoled_vci_en_gpio);
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usleep_range(5000, 5001);
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/* ctx->reset_gpio = devm_gpiod_get(ctx->dev, "reset", GPIOD_OUT_HIGH);
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gpiod_set_value(ctx->reset_gpio, 1);
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usleep_range(10000, 10001);
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gpiod_set_value(ctx->reset_gpio, 0);
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usleep_range(10000, 10001);
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gpiod_set_value(ctx->reset_gpio, 1);
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usleep_range(50000, 50001);
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devm_gpiod_put(ctx->dev, ctx->reset_gpio); */
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visionox_panel_init(ctx);
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ret = ctx->error;
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if (ret < 0)
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visionox_unprepare(panel);
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ctx->prepared = true;
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#ifdef PANEL_SUPPORT_READBACK
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visionox_panel_get_data(ctx);
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#endif
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pr_info("%s-\n", __func__);
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return ret;
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}
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static int visionox_enable(struct drm_panel *panel)
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{
|
|
struct visionox_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
if (ctx->enabled)
|
|
return 0;
|
|
|
|
if (ctx->backlight) {
|
|
ctx->backlight->props.power = FB_BLANK_UNBLANK;
|
|
backlight_update_status(ctx->backlight);
|
|
}
|
|
|
|
ctx->enabled = true;
|
|
|
|
return 0;
|
|
}
|
|
|
|
#define FRAME_WIDTH 1080
|
|
#define FRAME_HEIGHT 2400
|
|
#define PHYSICAL_WIDTH 69552
|
|
#define PHYSICAL_HEIGHT 154560
|
|
|
|
#define HFP (140)
|
|
#define HSA (8)
|
|
#define HBP (36)
|
|
#define HACT (1080)
|
|
#define VFP (2451)
|
|
#define VSA (9)
|
|
#define VBP (13)
|
|
#define VACT (2400)
|
|
#define VFP_90 (829)
|
|
#define VFP_120 (15)
|
|
|
|
static const struct drm_display_mode switch_mode_120hz = {
|
|
.clock = 369645,
|
|
.hdisplay = HACT,
|
|
.hsync_start = HACT + HFP,
|
|
.hsync_end = HACT + HFP + HSA,
|
|
.htotal = HACT + HFP + HSA + HBP,
|
|
.vdisplay = VACT,
|
|
.vsync_start = VACT + VFP_120,
|
|
.vsync_end = VACT + VFP_120 + VSA,
|
|
.vtotal = VACT + VFP_120 + VSA + VBP,
|
|
};
|
|
|
|
static const struct drm_display_mode switch_mode_90hz = {
|
|
.clock = 368810,
|
|
.hdisplay = HACT,
|
|
.hsync_start = HACT + HFP,
|
|
.hsync_end = HACT + HFP + HSA,
|
|
.htotal = HACT + HFP + HSA + HBP,
|
|
.vdisplay = VACT,
|
|
.vsync_start = VACT + VFP_90,
|
|
.vsync_end = VACT + VFP_90 + VSA,
|
|
.vtotal = VACT + VFP_90 + VSA + VBP,
|
|
};
|
|
|
|
static const struct drm_display_mode switch_mode_60hz = {
|
|
.clock = 369569,
|
|
.hdisplay = HACT,
|
|
.hsync_start = HACT + HFP,
|
|
.hsync_end = HACT + HFP + HSA,
|
|
.htotal = HACT + HFP + HSA + HBP,
|
|
.vdisplay = VACT,
|
|
.vsync_start = VACT + VFP,
|
|
.vsync_end = VACT + VFP + VSA,
|
|
.vtotal = VACT + VFP + VSA + VBP,
|
|
};
|
|
|
|
#if defined(CONFIG_MTK_PANEL_EXT)
|
|
static struct mtk_panel_params ext_params_120hz = {
|
|
.pll_clk = 550,
|
|
.data_rate = 1100,
|
|
.physical_width_um = PHYSICAL_WIDTH,
|
|
.physical_height_um = PHYSICAL_HEIGHT,
|
|
.lcm_degree = PROBE_FROM_DTS,
|
|
.cust_esd_check = 1,
|
|
.esd_check_enable = 1,
|
|
.lcm_esd_check_table[0] = {
|
|
.cmd = 0x0B,
|
|
.count = 1,
|
|
.para_list[0] = 0x00,
|
|
},
|
|
.lcm_esd_check_table[1] = {
|
|
.cmd = 0x0A,
|
|
.count = 1,
|
|
.para_list[0] = 0x9c,
|
|
.para_list[1] = 0xdc,
|
|
},
|
|
.lcm_esd_check_table[2] = {
|
|
.cmd = 0xFA,
|
|
.count = 1,
|
|
.para_list[0] = 0x01,
|
|
},
|
|
.ssc_enable = 0,
|
|
.bdg_ssc_enable = 0,
|
|
.lane_swap_en = 0,
|
|
.bdg_lane_swap_en = 0,
|
|
.lp_perline_en = 1,
|
|
.hbm_en_time = 0,
|
|
.hbm_dis_time = 0, //drv fixbug K80NF-230
|
|
.output_mode = MTK_PANEL_DSC_SINGLE_PORT,
|
|
.dsc_params = {
|
|
.enable = 1,
|
|
.bdg_dsc_enable = 0,
|
|
.ver = 17,
|
|
.slice_mode = 1,
|
|
.rgb_swap = 0,
|
|
.dsc_cfg = 2088,
|
|
.rct_on = 1,
|
|
.bit_per_channel = 10,
|
|
.dsc_line_buf_depth = 11,
|
|
.bp_enable = 1,
|
|
.bit_per_pixel = 128,
|
|
.pic_height = 2400,
|
|
.pic_width = 1080,
|
|
.slice_height = 20,
|
|
.slice_width = 540,
|
|
.chunk_size = 540,
|
|
.xmit_delay = 512,
|
|
.dec_delay = 526,
|
|
.scale_value = 32,
|
|
.increment_interval = 488,
|
|
.decrement_interval = 7,
|
|
.line_bpg_offset = 12,
|
|
.nfl_bpg_offset = 1294,
|
|
.slice_bpg_offset = 1302,
|
|
.initial_offset = 6144,
|
|
.final_offset = 4336,
|
|
.flatness_minqp = 7,
|
|
.flatness_maxqp = 16,
|
|
.rc_model_size = 8192,
|
|
.rc_edge_factor = 6,
|
|
.rc_quant_incr_limit0 = 15,
|
|
.rc_quant_incr_limit1 = 15,
|
|
.rc_tgt_offset_hi = 3,
|
|
.rc_tgt_offset_lo = 3,
|
|
},
|
|
};
|
|
|
|
static struct mtk_panel_params ext_params_90hz = {
|
|
.pll_clk = 550,
|
|
.data_rate = 1100,
|
|
.physical_width_um = PHYSICAL_WIDTH,
|
|
.physical_height_um = PHYSICAL_HEIGHT,
|
|
.lcm_degree = PROBE_FROM_DTS,
|
|
.cust_esd_check = 1,
|
|
.esd_check_enable = 1,
|
|
.lcm_esd_check_table[0] = {
|
|
.cmd = 0x0B,
|
|
.count = 1,
|
|
.para_list[0] = 0x00,
|
|
},
|
|
.lcm_esd_check_table[1] = {
|
|
.cmd = 0x0A,
|
|
.count = 1,
|
|
.para_list[0] = 0x9c,
|
|
.para_list[1] = 0xdc,
|
|
},
|
|
.lcm_esd_check_table[2] = {
|
|
.cmd = 0xFA,
|
|
.count = 1,
|
|
.para_list[0] = 0x01,
|
|
},
|
|
.ssc_enable = 0,
|
|
.bdg_ssc_enable = 0,
|
|
.lane_swap_en = 0,
|
|
.bdg_lane_swap_en = 0,
|
|
.lp_perline_en = 1,
|
|
.hbm_en_time = 0,
|
|
.hbm_dis_time = 0, //drv fixbug K80NF-230
|
|
.output_mode = MTK_PANEL_DSC_SINGLE_PORT,
|
|
.dsc_params = {
|
|
.enable = 1,
|
|
.bdg_dsc_enable = 0,
|
|
.ver = 17,
|
|
.slice_mode = 1,
|
|
.rgb_swap = 0,
|
|
.dsc_cfg = 2088,
|
|
.rct_on = 1,
|
|
.bit_per_channel = 10,
|
|
.dsc_line_buf_depth = 11,
|
|
.bp_enable = 1,
|
|
.bit_per_pixel = 128,
|
|
.pic_height = 2400,
|
|
.pic_width = 1080,
|
|
.slice_height = 20,
|
|
.slice_width = 540,
|
|
.chunk_size = 540,
|
|
.xmit_delay = 512,
|
|
.dec_delay = 526,
|
|
.scale_value = 32,
|
|
.increment_interval = 488,
|
|
.decrement_interval = 7,
|
|
.line_bpg_offset = 12,
|
|
.nfl_bpg_offset = 1294,
|
|
.slice_bpg_offset = 1302,
|
|
.initial_offset = 6144,
|
|
.final_offset = 4336,
|
|
.flatness_minqp = 7,
|
|
.flatness_maxqp = 16,
|
|
.rc_model_size = 8192,
|
|
.rc_edge_factor = 6,
|
|
.rc_quant_incr_limit0 = 15,
|
|
.rc_quant_incr_limit1 = 15,
|
|
.rc_tgt_offset_hi = 3,
|
|
.rc_tgt_offset_lo = 3,
|
|
},
|
|
};
|
|
|
|
|
|
static struct mtk_panel_params ext_params_60hz = {
|
|
.pll_clk = 550,
|
|
.data_rate = 1100,
|
|
.physical_width_um = PHYSICAL_WIDTH,
|
|
.physical_height_um = PHYSICAL_HEIGHT,
|
|
.lcm_degree = PROBE_FROM_DTS,
|
|
.cust_esd_check = 1,
|
|
.esd_check_enable = 1,
|
|
.lcm_esd_check_table[0] = {
|
|
.cmd = 0x0B,
|
|
.count = 1,
|
|
.para_list[0] = 0x00,
|
|
},
|
|
.lcm_esd_check_table[1] = {
|
|
.cmd = 0x0A,
|
|
.count = 1,
|
|
.para_list[0] = 0x9c,
|
|
.para_list[1] = 0xdc,
|
|
},
|
|
.lcm_esd_check_table[2] = {
|
|
.cmd = 0xFA,
|
|
.count = 1,
|
|
.para_list[0] = 0x01,
|
|
},
|
|
.ssc_enable = 0,
|
|
.bdg_ssc_enable = 0,
|
|
.lane_swap_en = 0,
|
|
.bdg_lane_swap_en = 0,
|
|
.lp_perline_en = 1,
|
|
.hbm_en_time = 0,
|
|
.hbm_dis_time = 0, //drv fixbug K80NF-230
|
|
.output_mode = MTK_PANEL_DSC_SINGLE_PORT,
|
|
.dsc_params = {
|
|
.enable = 1,
|
|
.bdg_dsc_enable = 0,
|
|
.ver = 17,
|
|
.slice_mode = 1,
|
|
.rgb_swap = 0,
|
|
.dsc_cfg = 2088,
|
|
.rct_on = 1,
|
|
.bit_per_channel = 10,
|
|
.dsc_line_buf_depth = 11,
|
|
.bp_enable = 1,
|
|
.bit_per_pixel = 128,
|
|
.pic_height = 2400,
|
|
.pic_width = 1080,
|
|
.slice_height = 20,
|
|
.slice_width = 540,
|
|
.chunk_size = 540,
|
|
.xmit_delay = 512,
|
|
.dec_delay = 526,
|
|
.scale_value = 32,
|
|
.increment_interval = 488,
|
|
.decrement_interval = 7,
|
|
.line_bpg_offset = 12,
|
|
.nfl_bpg_offset = 1294,
|
|
.slice_bpg_offset = 1302,
|
|
.initial_offset = 6144,
|
|
.final_offset = 4336,
|
|
.flatness_minqp = 7,
|
|
.flatness_maxqp = 16,
|
|
.rc_model_size = 8192,
|
|
.rc_edge_factor = 6,
|
|
.rc_quant_incr_limit0 = 15,
|
|
.rc_quant_incr_limit1 = 15,
|
|
.rc_tgt_offset_hi = 3,
|
|
.rc_tgt_offset_lo = 3,
|
|
},
|
|
};
|
|
|
|
static int panel_ata_check(struct drm_panel *panel)
|
|
{
|
|
/* Customer test by own ATA tool */
|
|
return 1;
|
|
}
|
|
|
|
static int visionox_setbacklight_cmdq(void *dsi, dcs_write_gce cb, void *handle,
|
|
unsigned int level)
|
|
{
|
|
if (level)
|
|
last_level = level; // drv modify finger hbm function
|
|
|
|
if (!cb)
|
|
return -1;
|
|
//modify by shenwenbin for low backlight flick 20240415 start
|
|
if(g_ctx->hbm_stat == false && bl_hbm_status == true && level != 0){
|
|
bl_crtl[1] = 0x28;
|
|
cb(dsi, handle, init_head_tb, ARRAY_SIZE(init_head_tb));
|
|
cb(dsi, handle, bl_crtl, ARRAY_SIZE(bl_crtl));
|
|
bl_hbm_status = false;
|
|
}
|
|
//modify by shenwenbin for low backlight flick 20240415 end
|
|
|
|
bl_tb[1] = (level>>8)&0xf;
|
|
bl_tb[2] = (level)&0xff;
|
|
if(g_ctx->hbm_stat == false || level == 0) {
|
|
cb(dsi, handle, init_head_tb, ARRAY_SIZE(init_head_tb));
|
|
cb(dsi, handle, bl_tb, ARRAY_SIZE(bl_tb));
|
|
}
|
|
|
|
pr_err("%s level=%d,bl_tb[1]=0x%x, bl_tb[2]=0x%x\n",
|
|
__func__, level, bl_tb[1], bl_tb[2]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* drv modify hbm function start */
|
|
static int panel_hbm_set_cmdq(struct drm_panel *panel, void *dsi,
|
|
dcs_write_gce cb, void *handle, bool en)
|
|
{
|
|
struct visionox_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
if (!cb)
|
|
return -1;
|
|
|
|
if (ctx->hbm_en == en)
|
|
goto done;
|
|
|
|
if (en)
|
|
{
|
|
pr_info("[panel] %s : enter HBM, last_level = %d\n",__func__,last_level);
|
|
ctx->hbm_stat = true;
|
|
//modify by shenwenbin for low backlight flick 20240415 start
|
|
bl_hbm_status = true;
|
|
cb(dsi, handle, init_head_tb, ARRAY_SIZE(init_head_tb));
|
|
bl_crtl[1] = 0x20;
|
|
cb(dsi, handle, bl_crtl, ARRAY_SIZE(bl_crtl));
|
|
//modify by shenwenbin for low backlight flick 20240415 end
|
|
cb(dsi, handle, hbm_tb, ARRAY_SIZE(hbm_tb));
|
|
}
|
|
else
|
|
{
|
|
pr_info("[panel] %s : exit HBM\n",__func__);
|
|
ctx->hbm_stat = false;
|
|
//modify by shenwenbin for low backlight flick 20240415 start
|
|
bl_tb[1] = (last_level>>8)&0xf;
|
|
bl_tb[2] = (last_level)&0xff;
|
|
cb(dsi, handle, init_head_tb, ARRAY_SIZE(init_head_tb));
|
|
cb(dsi, handle, bl_tb, ARRAY_SIZE(bl_tb));
|
|
//modify by shenwenbin for low backlight flick 20240415 end
|
|
}
|
|
|
|
ctx->hbm_en = en;
|
|
ctx->hbm_wait = true;
|
|
|
|
done:
|
|
return 0;
|
|
}
|
|
|
|
static void panel_hbm_get_state(struct drm_panel *panel, bool *state)
|
|
{
|
|
|
|
struct visionox_lcm *ctx = panel_to_lcm(panel);
|
|
//pr_info("[panel] %s : hbm_en = %d\n",__func__,ctx->hbm_en);
|
|
|
|
*state = ctx->hbm_en;
|
|
}
|
|
|
|
|
|
static void panel_hbm_get_wait_state(struct drm_panel *panel, bool *wait)
|
|
{
|
|
struct visionox_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
*wait = ctx->hbm_wait;
|
|
}
|
|
|
|
static bool panel_hbm_set_wait_state(struct drm_panel *panel, bool wait)
|
|
{
|
|
struct visionox_lcm *ctx = panel_to_lcm(panel);
|
|
bool old = ctx->hbm_wait;
|
|
|
|
ctx->hbm_wait = wait;
|
|
return old;
|
|
}
|
|
|
|
/* drv modify hbm function end */
|
|
struct drm_display_mode *get_mode_by_id_hfp(struct drm_connector *connector,
|
|
unsigned int mode)
|
|
{
|
|
struct drm_display_mode *m;
|
|
unsigned int i = 0;
|
|
|
|
list_for_each_entry(m, &connector->modes, head) {
|
|
if (i == mode)
|
|
return m;
|
|
i++;
|
|
}
|
|
return NULL;
|
|
}
|
|
|
|
static int panel_ext_reset(struct drm_panel *panel, int on)
|
|
{
|
|
struct visionox_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
ctx->reset_gpio = devm_gpiod_get(ctx->dev, "reset", GPIOD_OUT_HIGH);
|
|
gpiod_set_value(ctx->reset_gpio, 1);
|
|
usleep_range(10000, 10001);
|
|
gpiod_set_value(ctx->reset_gpio, 0);
|
|
usleep_range(10000, 10001);
|
|
gpiod_set_value(ctx->reset_gpio, 1);
|
|
usleep_range(50000, 50001);
|
|
devm_gpiod_put(ctx->dev, ctx->reset_gpio);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void mode_switch_to_120(struct drm_panel *panel,
|
|
enum MTK_PANEL_MODE_SWITCH_STAGE stage)
|
|
{
|
|
if (stage == BEFORE_DSI_POWERDOWN) {
|
|
struct visionox_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
visionox_dcs_write_seq_static(ctx, 0xFE, 0x40);
|
|
visionox_dcs_write_seq_static(ctx, 0xBD, 0x00);
|
|
visionox_dcs_write_seq_static(ctx, 0xFE, 0x00);
|
|
pr_info("%s:%d 120 display_mode end\n", __func__, __LINE__);
|
|
}
|
|
}
|
|
|
|
static void mode_switch_to_90(struct drm_panel *panel,
|
|
enum MTK_PANEL_MODE_SWITCH_STAGE stage)
|
|
{
|
|
if (stage == BEFORE_DSI_POWERDOWN) {
|
|
struct visionox_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
visionox_dcs_write_seq_static(ctx, 0xFE, 0x40);
|
|
visionox_dcs_write_seq_static(ctx, 0xBD, 0x06);
|
|
visionox_dcs_write_seq_static(ctx, 0xFE, 0x00);
|
|
pr_info("%s:%d 90 display_mode end\n", __func__, __LINE__);
|
|
}
|
|
}
|
|
|
|
static void mode_switch_to_60(struct drm_panel *panel,
|
|
enum MTK_PANEL_MODE_SWITCH_STAGE stage)
|
|
{
|
|
if (stage == BEFORE_DSI_POWERDOWN) {
|
|
struct visionox_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
visionox_dcs_write_seq_static(ctx, 0xFE, 0x40);
|
|
visionox_dcs_write_seq_static(ctx, 0xBD, 0x05);
|
|
visionox_dcs_write_seq_static(ctx, 0xFE, 0x00);
|
|
pr_info("%s:%d 60 display_mode end\n", __func__, __LINE__);
|
|
}
|
|
}
|
|
|
|
static int mtk_panel_ext_param_set(struct drm_panel *panel,
|
|
struct drm_connector *connector, unsigned int mode)
|
|
{
|
|
struct mtk_panel_ext *ext = find_panel_ext(panel);
|
|
int ret = 0;
|
|
int dst_fps = 0;
|
|
struct drm_display_mode *m = get_mode_by_id_hfp(connector, mode);
|
|
|
|
dst_fps = m ? drm_mode_vrefresh(m) : -EINVAL;
|
|
|
|
if (dst_fps == 60) {
|
|
ext_params_60hz.skip_vblank = 0;
|
|
ext->params = &ext_params_60hz;
|
|
} else if (dst_fps == 90) {
|
|
ext->params = &ext_params_90hz;
|
|
} else if (dst_fps == 120) {
|
|
ext_params_120hz.skip_vblank = 0;
|
|
ext->params = &ext_params_120hz;
|
|
} else {
|
|
pr_info("%s, dst_fps %d\n", __func__, dst_fps);
|
|
ret = 1;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int mode_switch(struct drm_panel *panel,
|
|
struct drm_connector *connector, unsigned int cur_mode,
|
|
unsigned int dst_mode, enum MTK_PANEL_MODE_SWITCH_STAGE stage)
|
|
{
|
|
int ret = 0;
|
|
int dst_fps = 0;
|
|
struct drm_display_mode *m = get_mode_by_id_hfp(connector, dst_mode);
|
|
|
|
pr_info("%s cur_mode = %d dst_mode %d\n", __func__, cur_mode, dst_mode);
|
|
|
|
dst_fps = m ? drm_mode_vrefresh(m) : -EINVAL;
|
|
|
|
if (dst_fps == 60) { //switch to 60
|
|
mode_switch_to_60(panel,stage);
|
|
} else if (dst_fps == 90) { //switch to 90
|
|
mode_switch_to_90(panel,stage);
|
|
} else if (dst_fps == 120) { //switch to 120
|
|
mode_switch_to_120(panel,stage);
|
|
} else {
|
|
pr_info("%s, dst_fps %d\n", __func__, dst_fps);
|
|
ret = 1;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int panel_doze_enable(struct drm_panel *panel, void *dsi, dcs_write_gce cb, void *handle)
|
|
{
|
|
struct visionox_lcm *ctx = panel_to_lcm(panel);
|
|
//drv-Fixed the issue of entering aod and TP having touch-pengzhipeng-20230516-start
|
|
if(IS_ERR_OR_NULL(ctx)) //(ctx == NULL)
|
|
return 0;
|
|
pr_info("panel %s\n", __func__);
|
|
if(!ctx->doze_en)
|
|
ctx->doze_en = true;
|
|
//drv-Fixed the issue of entering aod and TP having touch-pengzhipeng-20230516-end
|
|
/* Enter AOD */
|
|
visionox_dcs_write_seq_static(ctx,0xFE,0x00);
|
|
visionox_dcs_write_seq_static(ctx,0x39);
|
|
visionox_dcs_write_seq_static(ctx,0x51,0x01,0x55);
|
|
return 0;
|
|
}
|
|
|
|
static int panel_doze_disable(struct drm_panel *panel,void *dsi, dcs_write_gce cb, void *handle)
|
|
{
|
|
struct visionox_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
//drv-Fixed the issue of entering aod and TP having touch-pengzhipeng-20230516-start
|
|
if(IS_ERR_OR_NULL(ctx)) //(ctx == NULL)
|
|
return 0;
|
|
pr_info("panel %s\n", __func__);
|
|
if(ctx->doze_en)
|
|
ctx->doze_en = false;
|
|
//drv-Fixed the issue of entering aod and TP having touch-pengzhipeng-20230516-end
|
|
visionox_dcs_write_seq_static(ctx,0xFE,0x00);
|
|
visionox_dcs_write_seq_static(ctx,0x38);
|
|
return 0;
|
|
}
|
|
/* drv modify K80NF-263, K80NF-273 start */
|
|
bool panel_visionox_fod_is_enabled(void)
|
|
{
|
|
pr_info("panel %s g_ctx->doze_en=%d,g_ctx->prepared=%d\n", __func__,g_ctx->doze_en,g_ctx->prepared);
|
|
if(IS_ERR_OR_NULL(g_ctx))
|
|
return false;
|
|
if(g_ctx->doze_en)
|
|
return g_ctx->doze_en;
|
|
else
|
|
return !g_ctx->prepared;
|
|
|
|
}
|
|
EXPORT_SYMBOL(panel_visionox_fod_is_enabled);
|
|
/* drv modify K80NF-263, K80NF-273 end */
|
|
static int panel_set_aod_light_mode(void *dsi,dcs_write_gce cb, void *handle, unsigned int mode)
|
|
{
|
|
pr_info("panel %s\n", __func__);
|
|
|
|
if (mode == 1) {
|
|
/*Enter AOD 60nit*/
|
|
pr_info("panel %s Enter AOD 60nit\n", __func__);
|
|
aod_bl_tb[1] = 0x0F;
|
|
aod_bl_tb[2] = 0xFE;
|
|
}else if(mode == 2) {
|
|
/*Enter AOD 15nit*/
|
|
pr_info("panel %s Enter AOD 15nit\n", __func__);
|
|
aod_bl_tb[1] = 0x04;
|
|
aod_bl_tb[2] = 0x00;
|
|
}else {
|
|
/*Enter AOD 5nit*/
|
|
pr_info("panel %s Enter AOD 5nit\n", __func__);
|
|
aod_bl_tb[1] = 0x01;
|
|
aod_bl_tb[2] = 0x55;
|
|
}
|
|
|
|
cb(dsi, handle, init_head_tb, ARRAY_SIZE(init_head_tb));
|
|
cb(dsi, handle, aod_bl_tb, ARRAY_SIZE(aod_bl_tb));
|
|
pr_info("%s : %d !\n", __func__, mode);
|
|
|
|
return 0;
|
|
}
|
|
//DRV-modify by shenwenbin for add AOD mode 20240201 end
|
|
|
|
static struct mtk_panel_funcs ext_funcs = {
|
|
.reset = panel_ext_reset,
|
|
.set_backlight_cmdq = visionox_setbacklight_cmdq,
|
|
.ata_check = panel_ata_check,
|
|
.ext_param_set = mtk_panel_ext_param_set,
|
|
.mode_switch = mode_switch,
|
|
.doze_enable = panel_doze_enable,
|
|
.doze_disable = panel_doze_disable,
|
|
.set_aod_light_mode = panel_set_aod_light_mode,
|
|
/* drv modify hbm function start */
|
|
.hbm_set_cmdq = panel_hbm_set_cmdq,
|
|
.hbm_get_state = panel_hbm_get_state,
|
|
.hbm_get_wait_state = panel_hbm_get_wait_state,
|
|
.hbm_set_wait_state = panel_hbm_set_wait_state,
|
|
/* drv modify hbm function end */
|
|
};
|
|
#endif
|
|
|
|
static int visionox_get_modes(struct drm_panel *panel,
|
|
struct drm_connector *connector)
|
|
{
|
|
struct drm_display_mode *mode;
|
|
struct drm_display_mode *mode_1;
|
|
struct drm_display_mode *mode_2;
|
|
|
|
mode = drm_mode_duplicate(connector->dev, &switch_mode_60hz);
|
|
if (!mode) {
|
|
dev_info(connector->dev->dev, "failed to add mode %ux%ux@%u\n",
|
|
switch_mode_60hz.hdisplay, switch_mode_60hz.vdisplay,
|
|
drm_mode_vrefresh(&switch_mode_60hz));
|
|
return -ENOMEM;
|
|
}
|
|
|
|
drm_mode_set_name(mode);
|
|
mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
|
|
drm_mode_probed_add(connector, mode);
|
|
|
|
mode_1 = drm_mode_duplicate(connector->dev, &switch_mode_90hz);
|
|
if (!mode_1) {
|
|
dev_info(connector->dev->dev, "failed to add mode_1 %ux%ux@%u\n",
|
|
switch_mode_90hz.hdisplay, switch_mode_90hz.vdisplay,
|
|
drm_mode_vrefresh(&switch_mode_90hz));
|
|
return -ENOMEM;
|
|
}
|
|
|
|
drm_mode_set_name(mode_1);
|
|
mode_1->type = DRM_MODE_TYPE_DRIVER;
|
|
drm_mode_probed_add(connector, mode_1);
|
|
|
|
mode_2 = drm_mode_duplicate(connector->dev, &switch_mode_120hz);
|
|
if (!mode_2) {
|
|
dev_info(connector->dev->dev, "failed to add mode_2 %ux%ux@%u\n",
|
|
switch_mode_120hz.hdisplay, switch_mode_120hz.vdisplay,
|
|
drm_mode_vrefresh(&switch_mode_120hz));
|
|
return -ENOMEM;
|
|
}
|
|
|
|
drm_mode_set_name(mode_2);
|
|
mode_2->type = DRM_MODE_TYPE_DRIVER;
|
|
drm_mode_probed_add(connector, mode_2);
|
|
|
|
connector->display_info.width_mm = 70;
|
|
connector->display_info.height_mm = 155;
|
|
|
|
return 1;
|
|
}
|
|
|
|
static const struct drm_panel_funcs visionox_drm_funcs = {
|
|
.disable = visionox_disable,
|
|
.unprepare = visionox_unprepare,
|
|
.prepare = visionox_prepare,
|
|
.enable = visionox_enable,
|
|
.get_modes = visionox_get_modes,
|
|
};
|
|
|
|
static int visionox_probe(struct mipi_dsi_device *dsi)
|
|
{
|
|
struct device *dev = &dsi->dev;
|
|
struct device_node *dsi_node, *remote_node = NULL, *endpoint = NULL;
|
|
struct visionox_lcm *ctx;
|
|
struct device_node *backlight;
|
|
unsigned int lcm_degree;
|
|
int ret;
|
|
int probe_ret;
|
|
|
|
pr_info("%s+ visionox,rm692e0,cmd,120hz\n", __func__);
|
|
|
|
dsi_node = of_get_parent(dev->of_node);
|
|
if (dsi_node) {
|
|
endpoint = of_graph_get_next_endpoint(dsi_node, NULL);
|
|
if (endpoint) {
|
|
remote_node = of_graph_get_remote_port_parent(endpoint);
|
|
if (!remote_node) {
|
|
pr_info("No panel connected,skip probe lcm\n");
|
|
return -ENODEV;
|
|
}
|
|
pr_info("device node name:%s\n", remote_node->name);
|
|
}
|
|
}
|
|
if (remote_node != dev->of_node) {
|
|
pr_info("%s+ skip probe due to not current lcm\n", __func__);
|
|
return -ENODEV;
|
|
}
|
|
|
|
ctx = devm_kzalloc(dev, sizeof(struct visionox_lcm), GFP_KERNEL);
|
|
if (!ctx)
|
|
return -ENOMEM;
|
|
|
|
mipi_dsi_set_drvdata(dsi, ctx);
|
|
|
|
ctx->dev = dev;
|
|
dsi->lanes = 4;
|
|
dsi->format = MIPI_DSI_FMT_RGB888;
|
|
dsi->mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_NO_EOT_PACKET;
|
|
//dsi->mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_NO_EOT_PACKET | MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
|
|
|
|
backlight = of_parse_phandle(dev->of_node, "backlight", 0);
|
|
if (backlight) {
|
|
ctx->backlight = of_find_backlight_by_node(backlight);
|
|
of_node_put(backlight);
|
|
|
|
if (!ctx->backlight)
|
|
return -EPROBE_DEFER;
|
|
}
|
|
|
|
ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
|
|
if (IS_ERR(ctx->reset_gpio)) {
|
|
dev_info(dev, "cannot get reset-gpios %ld\n",
|
|
PTR_ERR(ctx->reset_gpio));
|
|
return PTR_ERR(ctx->reset_gpio);
|
|
}
|
|
devm_gpiod_put(dev, ctx->reset_gpio);
|
|
|
|
|
|
ctx->amoled_vddi_en_gpio = devm_gpiod_get(dev, "amoled-vddi-en", GPIOD_OUT_HIGH);
|
|
if (IS_ERR(ctx->amoled_vddi_en_gpio)) {
|
|
dev_info(dev, "cannot get amoled-vddi-en-gpios %ld\n",
|
|
PTR_ERR(ctx->amoled_vddi_en_gpio));
|
|
return PTR_ERR(ctx->amoled_vddi_en_gpio);
|
|
}
|
|
devm_gpiod_put(dev, ctx->amoled_vddi_en_gpio);
|
|
|
|
ctx->amoled_vdd_en_gpio = devm_gpiod_get(dev, "amoled-vdd-en", GPIOD_OUT_HIGH);
|
|
if (IS_ERR(ctx->amoled_vdd_en_gpio)) {
|
|
dev_info(dev, "cannot get amoled-vdd-en-gpios %ld\n",
|
|
PTR_ERR(ctx->amoled_vdd_en_gpio));
|
|
return PTR_ERR(ctx->amoled_vdd_en_gpio);
|
|
}
|
|
devm_gpiod_put(dev, ctx->amoled_vdd_en_gpio);
|
|
|
|
ctx->amoled_vci_en_gpio = devm_gpiod_get(dev, "amoled-vci-en", GPIOD_OUT_HIGH);
|
|
if (IS_ERR(ctx->amoled_vci_en_gpio)) {
|
|
dev_info(dev, "cannot get amoled-vci-en-gpios %ld\n",
|
|
PTR_ERR(ctx->amoled_vci_en_gpio));
|
|
return PTR_ERR(ctx->amoled_vci_en_gpio);
|
|
}
|
|
devm_gpiod_put(dev, ctx->amoled_vci_en_gpio);
|
|
|
|
ctx->prepared = true;
|
|
ctx->enabled = true;
|
|
drm_panel_init(&ctx->panel, dev, &visionox_drm_funcs, DRM_MODE_CONNECTOR_DSI);
|
|
|
|
drm_panel_add(&ctx->panel);
|
|
|
|
ret = mipi_dsi_attach(dsi);
|
|
if (ret < 0)
|
|
drm_panel_remove(&ctx->panel);
|
|
|
|
#if defined(CONFIG_MTK_PANEL_EXT)
|
|
mtk_panel_tch_handle_reg(&ctx->panel);
|
|
ret = mtk_panel_ext_create(dev, &ext_params_60hz, &ext_funcs, &ctx->panel);
|
|
if (ret < 0)
|
|
return ret;
|
|
probe_ret = of_property_read_u32(dev->of_node, "lcm-degree", &lcm_degree);
|
|
if (probe_ret < 0)
|
|
lcm_degree = 0;
|
|
else
|
|
ext_params_60hz.lcm_degree = lcm_degree;
|
|
pr_info("lcm_degree: %d\n", ext_params_60hz.lcm_degree);
|
|
#endif
|
|
g_ctx = ctx;
|
|
g_ctx->doze_en = false;//drv-Fixed the issue of entering aod and TP having touch-pengzhipeng-20230516
|
|
pr_info("%s- visionox,rm692e0,cmd,120hz\n", __func__);
|
|
/* drv modify hbm function start */
|
|
ctx->hbm_en = false;
|
|
ctx->hbm_stat = false;
|
|
/* drv modify hbm function end */
|
|
|
|
//drv add by shenwenbin for lcd hardware info 20231214 start
|
|
#if IS_ENABLED(CONFIG_PRIZE_HARDWARE_INFO)
|
|
strcpy(current_lcm_info.chip,"raydiumic-rm692e0");
|
|
strcpy(current_lcm_info.vendor,"visionox");
|
|
sprintf(current_lcm_info.id,"0x%02x",0x01);
|
|
strcpy(current_lcm_info.more,"2400*1080");
|
|
#endif
|
|
//drv add by shenwenbin for lcd hardware info 20231214 end
|
|
return ret;
|
|
}
|
|
|
|
static int visionox_remove(struct mipi_dsi_device *dsi)
|
|
{
|
|
struct visionox_lcm *ctx = mipi_dsi_get_drvdata(dsi);
|
|
#if defined(CONFIG_MTK_PANEL_EXT)
|
|
struct mtk_panel_ctx *ext_ctx = find_panel_ctx(&ctx->panel);
|
|
#endif
|
|
|
|
if (ext_ctx == NULL)
|
|
return 0;
|
|
|
|
mipi_dsi_detach(dsi);
|
|
drm_panel_remove(&ctx->panel);
|
|
#if defined(CONFIG_MTK_PANEL_EXT)
|
|
mtk_panel_detach(ext_ctx);
|
|
mtk_panel_remove(ext_ctx);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id visionox_of_match[] = {
|
|
{
|
|
.compatible = "visionox,rm692e0,cmd,120Hz",
|
|
},
|
|
{}
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, visionox_of_match);
|
|
|
|
static struct mipi_dsi_driver visionox_driver = {
|
|
.probe = visionox_probe,
|
|
.remove = visionox_remove,
|
|
.driver = {
|
|
.name = "panel-visionox-rm692e0-dphy-cmd-120hz",
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = visionox_of_match,
|
|
},
|
|
};
|
|
|
|
module_mipi_dsi_driver(visionox_driver);
|
|
|
|
MODULE_AUTHOR("MEDIATEK");
|
|
MODULE_DESCRIPTION("RM692E0 AMOLED CMD LCD Panel Driver");
|
|
MODULE_LICENSE("GPL v2");
|