3269 lines
127 KiB
C
3269 lines
127 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include <linux/backlight.h>
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#include <drm/drm_mipi_dsi.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_modes.h>
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#include <linux/delay.h>
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#include <drm/drm_connector.h>
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#include <drm/drm_device.h>
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#include <linux/gpio/consumer.h>
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#include <linux/regulator/consumer.h>
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#include <video/mipi_display.h>
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#include <video/of_videomode.h>
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#include <video/videomode.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/of_graph.h>
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#include <linux/platform_device.h>
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#define CONFIG_MTK_PANEL_EXT
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#if defined(CONFIG_MTK_PANEL_EXT)
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#include "../mediatek/mediatek_v2/mtk_panel_ext.h"
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#include "../mediatek/mediatek_v2/mtk_log.h"
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#include "../mediatek/mediatek_v2/mtk_drm_graphics_base.h"
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#endif
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#ifdef CONFIG_MTK_ROUND_CORNER_SUPPORT
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#include "../mediatek/mtk_corner_pattern/mtk_data_hw_roundedpattern.h"
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#endif
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#include "../../../misc/mediatek/gate_ic/gate_i2c.h"
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/* enable this to check panel self -bist pattern
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* #define PANEL_BIST_PATTERN
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****************TPS65132***********/
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#include <linux/i2c-dev.h>
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#include <linux/i2c.h>
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//#include "lcm_i2c.h"
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static char bl_tb0[] = {0x51, 0x3, 0xff};
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#define MODE_0_FPS (60)
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#define MODE_1_FPS (80)
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#define MODE_2_FPS (96)
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#define MODE_3_FPS (120)
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#define MTE_OFF (0xFFFF)
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static int current_fps = 120;
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//TO DO: You have to do that remove macro BYPASSI2C and solve build error
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//otherwise voltage will be unstable
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#define BYPASSI2C
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#ifndef BYPASSI2C
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/* i2c control start */
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#define LCM_I2C_ID_NAME "I2C_LCD_BIAS"
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static struct i2c_client *_lcm_i2c_client;
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/*****************************************************************************
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* Function Prototype
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*****************************************************************************/
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static int _lcm_i2c_probe(struct i2c_client *client,
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const struct i2c_device_id *id);
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static int _lcm_i2c_remove(struct i2c_client *client);
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/*****************************************************************************
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* Data Structure
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*****************************************************************************/
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struct _lcm_i2c_dev {
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struct i2c_client *client;
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};
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static const struct of_device_id _lcm_i2c_of_match[] = {
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{
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.compatible = "mediatek,I2C_LCD_BIAS",
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},
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{},
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};
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static const struct i2c_device_id _lcm_i2c_id[] = { { LCM_I2C_ID_NAME, 0 },
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{} };
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static struct i2c_driver _lcm_i2c_driver = {
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.id_table = _lcm_i2c_id,
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.probe = _lcm_i2c_probe,
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.remove = _lcm_i2c_remove,
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/* .detect = _lcm_i2c_detect, */
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.driver = {
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.owner = THIS_MODULE,
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.name = LCM_I2C_ID_NAME,
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.of_match_table = _lcm_i2c_of_match,
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},
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};
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/*****************************************************************************
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* Function
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*****************************************************************************/
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#ifdef VENDOR_EDIT
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// shifan@bsp.tp 20191226 add for loading tp fw when screen lighting on
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extern void lcd_queue_load_tp_fw(void);
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#endif /*VENDOR_EDIT*/
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static int _lcm_i2c_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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pr_debug("[LCM][I2C] %s\n", __func__);
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pr_debug("[LCM][I2C] NT: info==>name=%s addr=0x%x\n", client->name,
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client->addr);
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_lcm_i2c_client = client;
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return 0;
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}
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static int _lcm_i2c_remove(struct i2c_client *client)
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{
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pr_debug("[LCM][I2C] %s\n", __func__);
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_lcm_i2c_client = NULL;
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i2c_unregister_device(client);
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return 0;
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}
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static int _lcm_i2c_write_bytes(unsigned char addr, unsigned char value)
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{
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int ret = 0;
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struct i2c_client *client = _lcm_i2c_client;
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char write_data[2] = { 0 };
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if (client == NULL) {
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pr_debug("ERROR!! _lcm_i2c_client is null\n");
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return 0;
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}
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write_data[0] = addr;
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write_data[1] = value;
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ret = i2c_master_send(client, write_data, 2);
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if (ret < 0)
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pr_info("[LCM][ERROR] _lcm_i2c write data fail !!\n");
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return ret;
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}
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/*
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* module load/unload record keeping
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*/
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static int __init _lcm_i2c_init(void)
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{
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pr_debug("[LCM][I2C] %s\n", __func__);
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i2c_add_driver(&_lcm_i2c_driver);
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pr_debug("[LCM][I2C] %s success\n", __func__);
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return 0;
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}
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static void __exit _lcm_i2c_exit(void)
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{
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pr_debug("[LCM][I2C] %s\n", __func__);
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i2c_del_driver(&_lcm_i2c_driver);
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}
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module_init(_lcm_i2c_init);
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module_exit(_lcm_i2c_exit);
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/***********************************/
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#endif
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//#define S6E3HAE_SUPPORT_WQHD
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#define DATA_RATE 840
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#define MODE0_FPS 60
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#define MODE1_FPS 120
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#define MODE2_FPS 60
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#define MODE3_FPS 120
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#define MODE1_HFP 20
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#define MODE1_HSA 2
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#define MODE1_HBP 16
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#define MODE1_VFP 54
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#define MODE1_VSA 10
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#define MODE1_VBP 10
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#define HACT_WQHD 1440
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#define VACT_WQHD 3200
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#define HACT_FHDP 1080
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#define VACT_FHDP 2400
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struct nt37801_lcm {
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struct device *dev;
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struct drm_panel panel;
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struct backlight_device *backlight;
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struct gpio_desc *reset_gpio;
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struct gpio_desc *bias_pos;
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struct gpio_desc *bias_neg;
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bool prepared;
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bool enabled;
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unsigned int gate_ic;
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int error;
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};
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#define nt37801_lcm_dcs_write_seq(ctx, seq...) \
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({\
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const u8 d[] = { seq };\
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BUILD_BUG_ON_MSG(ARRAY_SIZE(d) > 64, "DCS sequence too big for stack");\
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lcm_dcs_write(ctx, d, ARRAY_SIZE(d));\
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})
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#define nt37801_lcm_dcs_write_seq_static(ctx, seq...) \
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({\
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static const u8 d[] = { seq };\
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lcm_dcs_write(ctx, d, ARRAY_SIZE(d));\
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})
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static inline struct nt37801_lcm *panel_to_lcm(struct drm_panel *panel)
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{
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return container_of(panel, struct nt37801_lcm, panel);
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}
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#ifdef PANEL_SUPPORT_READBACK
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static int lcm_dcs_read(struct nt37801_lcm *ctx, u8 cmd, void *data, size_t len)
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{
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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ssize_t ret;
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if (ctx->error < 0)
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return 0;
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ret = mipi_dsi_dcs_read(dsi, cmd, data, len);
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if (ret < 0) {
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dev_info(ctx->dev, "error %d reading dcs seq:(%#x)\n", ret, cmd);
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ctx->error = ret;
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}
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return ret;
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}
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static void lcm_panel_get_data(struct nt37801_lcm *ctx)
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{
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u8 buffer[3] = {0};
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static int ret;
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if (ret == 0) {
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ret = lcm_dcs_read(ctx, 0x0A, buffer, 1);
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dev_info(ctx->dev, "return %d data(0x%08x) to dsi engine\n",
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ret, buffer[0] | (buffer[1] << 8));
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}
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}
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#endif
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static void lcm_dcs_write(struct nt37801_lcm *ctx, const void *data, size_t len)
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{
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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ssize_t ret;
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char *addr;
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if (ctx->error < 0)
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return;
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addr = (char *)data;
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if ((int)*addr < 0xB0)
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ret = mipi_dsi_dcs_write_buffer(dsi, data, len);
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else
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ret = mipi_dsi_generic_write(dsi, data, len);
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if (ret < 0) {
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dev_info(ctx->dev, "error %zd writing seq: %ph\n", ret, data);
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ctx->error = ret;
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}
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}
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#define REGFLAG_DELAY 0xFFFC
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#define REGFLAG_UDELAY 0xFFFB
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#define REGFLAG_END_OF_TABLE 0xFFFD
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#define REGFLAG_RESET_LOW 0xFFFE
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#define REGFLAG_RESET_HIGH 0xFFFF
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struct LCM_setting_table {
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unsigned int cmd;
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unsigned char count;
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unsigned char para_list[130];
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};
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//RTE60
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static struct LCM_setting_table fhdplus60_init_setting[] = {
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/* ESD */
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{0xF0, 05, {0x55, 0xAA, 0x52, 0x08, 0x00}},
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{0x6F, 01, {0x05}},
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{0xBE, 01, {0x08}},
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{0x6F, 01, {0x01}},
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{0xBE, 01, {0x45}},
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/* DC init Code */
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/* 3.1 DVDD Strong */
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{0xF0, 05, {0x55, 0xAA, 0x52, 0x08, 0x01}},
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{0xC5, 04, {0x00, 0x0B, 0x0B, 0x0B}},
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/* DSC setting */
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{0x90, 02, {0x13, 0x03}},
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{0x91, 18, {0xAB, 0x28, 0x00, 0x0C, 0xC2, 0x00,
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0x03, 0x1C, 0x01, 0x7E, 0x00, 0x0F, 0x08, 0xBB,
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0x04, 0x3D, 0x10, 0xF0}},
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{0x1F, 01, {0x70}},
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/* 3.2 TE ON */
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{0x35, 01, {0x00}},
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{0x5A, 01, {0x01}},
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/* 3.3 CASET/RASET Setting*/
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{0x2A, 04, {0x00, 0x00, 0x04, 0x37}},
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{0x2B, 04, {0x00, 0x00, 0x09, 0x5F}},
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/* 3.4 Dimming ON Setting */
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{0x53, 01, {0x28}},
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/* 3.4.1 Adjusting dimming speed */
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{0xF0, 05, {0x55, 0xAA, 0x52, 0x08, 0x00}},
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{0x6F, 01, {0x05}},
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{0xB2, 02, {0x08, 0x08}},
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{0x6F, 01, {0x09}},
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{0xB2, 02, {0x5F, 0x5F}},
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/*RTE*/
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/* EM cycle 612 */
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{0x6F, 01, {0x13}},
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{0xC0, 02, {0x02, 0x64}},
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/* XXXX */
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{0x6F, 01, {0x1F}},
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{0xC0, 01, {0x38}},
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/* AFP */
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{0x6F, 01, {0x26}},
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{0xC0, 02, {0x01, 0xF4}},
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/* protection period */
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{0x6F, 01, {0x20}},
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{0xC0, 02, {0x02, 0x00}},
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/* Valid TE period */
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{0x40, 01, {0x07}},
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{0x6F, 01, {0x01}},
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{0x40, 02, {0x12, 0xBC}},
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{0x6F, 01, {0x03}},
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{0x40, 02, {0x15, 0x20}},
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/* 3.5 Frame Rate 60Hz GIR OFF */
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{0x2F, 01, {0x03}},
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/* 3.6 GIR OFF */
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{0x5F, 01, {0x01}},
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/* 3.7 DBV */
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{0x51, 02, {0x07, 0xFF}},
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/* set tear_scanline = 2400 */
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{0x44, 02, {0x09, 0x60}},
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/* 4. User Command Set */
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/* Sleep Out */
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{0x11, 00, {}},
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{REGFLAG_DELAY, 120, {}},
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/* Display On */
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{0x29, 01, {0x00}},
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{REGFLAG_END_OF_TABLE, 0x00, {}}
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};
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//RTE80
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static struct LCM_setting_table fhdplus80_init_setting[] = {
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/* ESD */
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{0xF0, 05, {0x55, 0xAA, 0x52, 0x08, 0x00}},
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{0x6F, 01, {0x05}},
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{0xBE, 01, {0x08}},
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{0x6F, 01, {0x01}},
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{0xBE, 01, {0x45}},
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/* DC init Code */
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/* 3.1 DVDD Strong */
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{0xF0, 05, {0x55, 0xAA, 0x52, 0x08, 0x01}},
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{0xC5, 04, {0x00, 0x0B, 0x0B, 0x0B}},
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/* DSC setting */
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{0x90, 02, {0x13, 0x03}},
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{0x91, 18, {0xAB, 0x28, 0x00, 0x0C, 0xC2, 0x00,
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0x03, 0x1C, 0x01, 0x7E, 0x00, 0x0F, 0x08, 0xBB,
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0x04, 0x3D, 0x10, 0xF0}},
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{0x1F, 01, {0x70}},
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/* 3.2 TE ON */
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{0x35, 01, {0x00}},
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{0x5A, 01, {0x01}},
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/* 3.3 CASET/RASET Setting*/
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{0x2A, 04, {0x00, 0x00, 0x04, 0x37}},
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{0x2B, 04, {0x00, 0x00, 0x09, 0x5F}},
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/* 3.4 Dimming ON Setting */
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{0x53, 01, {0x28}},
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/* 3.4.1 Adjusting dimming speed */
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{0xF0, 05, {0x55, 0xAA, 0x52, 0x08, 0x00}},
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{0x6F, 01, {0x05}},
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{0xB2, 02, {0x08, 0x08}},
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{0x6F, 01, {0x09}},
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{0xB2, 02, {0x5F, 0x5F}},
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/*RTE*/
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/* EM cycle 612 */
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{0x6F, 01, {0x13}},
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{0xC0, 02, {0x02, 0x64}},
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/* XXXX */
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{0x6F, 01, {0x1F}},
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{0xC0, 01, {0x38}},
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/* AFP */
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{0x6F, 01, {0x26}},
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{0xC0, 02, {0x01, 0xF4}},
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/* protection period */
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{0x6F, 01, {0x20}},
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{0xC0, 02, {0x02, 0x00}},
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/* Valid TE period */
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{0x40, 01, {0x07}},
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{0x6F, 01, {0x01}},
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{0x40, 02, {0x0D, 0xF8}},
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{0x6F, 01, {0x03}},
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{0x40, 02, {0x10, 0x5C}},
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/* 3.5 Frame Rate 80Hz GIR OFF */
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{0x2F, 01, {0x02}},
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/* 3.6 GIR OFF */
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{0x5F, 01, {0x01}},
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/* 3.7 DBV */
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{0x51, 02, {0x07, 0xFF}},
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/* set tear_scanline = 2400 */
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{0x44, 02, {0x09, 0x60}},
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/* 4. User Command Set */
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/* Sleep Out */
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{0x11, 00, {}},
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{REGFLAG_DELAY, 120, {}},
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/* Display On */
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{0x29, 01, {0x00}},
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{REGFLAG_END_OF_TABLE, 0x00, {}}
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};
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//RTE96
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static struct LCM_setting_table fhdplus96_init_setting[] = {
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/* ESD */
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{0xF0, 05, {0x55, 0xAA, 0x52, 0x08, 0x00}},
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{0x6F, 01, {0x05}},
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{0xBE, 01, {0x08}},
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{0x6F, 01, {0x01}},
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{0xBE, 01, {0x45}},
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/* DC init Code */
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/* 3.1 DVDD Strong */
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{0xF0, 05, {0x55, 0xAA, 0x52, 0x08, 0x01}},
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{0xC5, 04, {0x00, 0x0B, 0x0B, 0x0B}},
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/* DSC setting */
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{0x90, 02, {0x13, 0x03}},
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{0x91, 18, {0xAB, 0x28, 0x00, 0x0C, 0xC2, 0x00,
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0x03, 0x1C, 0x01, 0x7E, 0x00, 0x0F, 0x08, 0xBB,
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0x04, 0x3D, 0x10, 0xF0}},
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{0x1F, 01, {0x70}},
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/* 3.2 TE ON */
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{0x35, 01, {0x00}},
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{0x5A, 01, {0x01}},
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/* 3.3 CASET/RASET Setting*/
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{0x2A, 04, {0x00, 0x00, 0x04, 0x37}},
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{0x2B, 04, {0x00, 0x00, 0x09, 0x5F}},
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/* 3.4 Dimming ON Setting */
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{0x53, 01, {0x28}},
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/* 3.4.1 Adjusting dimming speed */
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{0xF0, 05, {0x55, 0xAA, 0x52, 0x08, 0x00}},
|
|
{0x6F, 01, {0x05}},
|
|
{0xB2, 02, {0x08, 0x08}},
|
|
{0x6F, 01, {0x09}},
|
|
{0xB2, 02, {0x5F, 0x5F}},
|
|
|
|
/*RTE*/
|
|
/* EM cycle 612 */
|
|
{0x6F, 01, {0x13}},
|
|
{0xC0, 02, {0x02, 0x64}},
|
|
/* XXXX */
|
|
{0x6F, 01, {0x1F}},
|
|
{0xC0, 01, {0x38}},
|
|
/* AFP */
|
|
{0x6F, 01, {0x26}},
|
|
{0xC0, 02, {0x01, 0xF4}},
|
|
/* protection period */
|
|
{0x6F, 01, {0x20}},
|
|
{0xC0, 02, {0x02, 0x00}},
|
|
/* Valid TE period */
|
|
{0x40, 01, {0x07}},
|
|
{0x6F, 01, {0x01}},
|
|
{0x40, 02, {0x0D, 0xF8}},
|
|
{0x6F, 01, {0x03}},
|
|
{0x40, 02, {0x10, 0x5C}},
|
|
|
|
/* 3.5 Frame Rate 96Hz GIR OFF */
|
|
{0x2F, 01, {0x01}},
|
|
/* 3.6 GIR OFF */
|
|
{0x5F, 01, {0x01}},
|
|
/* 3.7 DBV */
|
|
{0x51, 02, {0x07, 0xFF}},
|
|
|
|
/* set tear_scanline = 2400 */
|
|
{0x44, 02, {0x09, 0x60}},
|
|
|
|
/* 4. User Command Set */
|
|
/* Sleep Out */
|
|
{0x11, 00, {}},
|
|
{REGFLAG_DELAY, 120, {}},
|
|
/* Display On */
|
|
{0x29, 01, {0x00}},
|
|
{REGFLAG_END_OF_TABLE, 0x00, {}}
|
|
};
|
|
|
|
//RTE120
|
|
static struct LCM_setting_table fhdplus120_init_setting[] = {
|
|
/* ESD */
|
|
{0xF0, 05, {0x55, 0xAA, 0x52, 0x08, 0x00}},
|
|
{0x6F, 01, {0x05}},
|
|
{0xBE, 01, {0x08}},
|
|
{0x6F, 01, {0x01}},
|
|
{0xBE, 01, {0x45}},
|
|
/* DC init Code */
|
|
/* 3.1 DVDD Strong */
|
|
{0xF0, 05, {0x55, 0xAA, 0x52, 0x08, 0x01}},
|
|
{0xC5, 04, {0x00, 0x0B, 0x0B, 0x0B}},
|
|
/* DSC setting */
|
|
{0x90, 02, {0x13, 0x03}},
|
|
{0x91, 18, {0xAB, 0x28, 0x00, 0x0C, 0xC2, 0x00,
|
|
0x03, 0x1C, 0x01, 0x7E, 0x00, 0x0F, 0x08, 0xBB,
|
|
0x04, 0x3D, 0x10, 0xF0}},
|
|
{0x1F, 01, {0x70}},
|
|
/* 3.2 TE ON */
|
|
{0x35, 01, {0x00}},
|
|
{0x5A, 01, {0x01}},
|
|
/* 3.3 CASET/RASET Setting*/
|
|
{0x2A, 04, {0x00, 0x00, 0x04, 0x37}},
|
|
{0x2B, 04, {0x00, 0x00, 0x09, 0x5F}},
|
|
/* 3.4 Dimming ON Setting */
|
|
{0x53, 01, {0x28}},
|
|
/* 3.4.1 Adjusting dimming speed */
|
|
{0xF0, 05, {0x55, 0xAA, 0x52, 0x08, 0x00}},
|
|
{0x6F, 01, {0x05}},
|
|
{0xB2, 02, {0x08, 0x08}},
|
|
{0x6F, 01, {0x09}},
|
|
{0xB2, 02, {0x5F, 0x5F}},
|
|
|
|
/*RTE*/
|
|
{0x6F, 01, {0x13}},
|
|
{0xC0, 02, {0x02, 0x64}},
|
|
{0x6F, 01, {0x1F}},
|
|
{0xC0, 01, {0x38}},
|
|
/* AFP */
|
|
{0x6F, 01, {0x22}},
|
|
{0xC0, 02, {0x01, 0xF4}},
|
|
{0x6F, 01, {0x20}},
|
|
{0xC0, 02, {0x02, 0x00}},
|
|
/* Valid period */
|
|
{0x40, 01, {0x07}},
|
|
{0x6F, 01, {0x01}},
|
|
{0x40, 02, {0x09, 0x2C}},
|
|
{0x6F, 01, {0x03}},
|
|
{0x40, 02, {0x0B, 0x90}},
|
|
|
|
/* 3.5 Frame Rate 120Hz GIR OFF */
|
|
{0x2F, 01, {0x00}},
|
|
{0x26, 01, {0x00}},
|
|
/* 3.6 GIR OFF */
|
|
{0x5F, 01, {0x01}},
|
|
/* 3.7 DBV */
|
|
{0x51, 02, {0x07, 0xFF}},
|
|
|
|
/* set tear_scanline = 2400 */
|
|
{0x44, 02, {0x09, 0x60}},
|
|
|
|
/* 4. User Command Set */
|
|
/* Sleep Out */
|
|
{0x11, 00, {}},
|
|
{REGFLAG_DELAY, 120, {}},
|
|
/* Display On */
|
|
{0x29, 01, {0x00}},
|
|
{REGFLAG_END_OF_TABLE, 0x00, {}}
|
|
};
|
|
|
|
static void push_table(struct nt37801_lcm *ctx, struct LCM_setting_table *table, unsigned int count)
|
|
{
|
|
unsigned int i, j;
|
|
unsigned char temp[255] = {0};
|
|
|
|
for (i = 0; i < count; i++) {
|
|
unsigned int cmd = table[i].cmd;
|
|
|
|
memset(temp, 0, sizeof(temp));
|
|
switch (cmd) {
|
|
case REGFLAG_DELAY:
|
|
if (table[i].count <= 10)
|
|
msleep(table[i].count);
|
|
else
|
|
msleep(table[i].count);
|
|
break;
|
|
case REGFLAG_END_OF_TABLE:
|
|
break;
|
|
default:
|
|
temp[0] = cmd;
|
|
for (j = 0; j < table[i].count; j++)
|
|
temp[j+1] = table[i].para_list[j];
|
|
|
|
lcm_dcs_write(ctx, temp, table[i].count + 1);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
static void lcm_init_code(struct nt37801_lcm *ctx)
|
|
{
|
|
////////////////////////////////CMD2 Page.0////////////////////////////////
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00);
|
|
////FSET0 120HZ
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBA, 0x08, 0x6B, 0x00, 0x14, 0x00, 0x1C, 0x10);
|
|
////FSET1 96HZ
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x07);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBA, 0x00, 0x6B, 0x00, 0x14, 0x02, 0x80, 0x10);
|
|
////FSET2 80HZ
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x0E);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBA, 0x00, 0x6B, 0x00, 0x14, 0x04, 0xE4, 0x10);
|
|
////FSET3 60HZ
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x15);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBA, 0x00, 0x6B, 0x00, 0x14, 0x09, 0xAC, 0x10);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x11);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x03, 0x04, 0x45, 0x87, 0x03, 0x00, 0x00);
|
|
//EM_DT_FCON0 120hz
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x09, 0x90, 0x08, 0xE0, 0x08, 0x70, 0x08,
|
|
0x70, 0x07, 0xC0, 0x07, 0xC0, 0x06, 0x6C, 0x06, 0x6C, 0x03, 0xDC, 0x03, 0xDC, 0x00, 0x34,
|
|
0x00, 0x34);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x18);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x00, 0x30, 0x00, 0x30, 0x00, 0x30, 0x00,
|
|
0x30, 0x00, 0x30, 0x00, 0x30, 0x00, 0x30, 0x00, 0x30, 0x00, 0x30, 0x00, 0x30, 0x00,
|
|
0x30);
|
|
//EM_DT_FCON1 96hz
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x2E);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x0B, 0xF4, 0x0B, 0x18, 0x0A, 0x8C, 0x0A,
|
|
0x8C, 0x09, 0xB0, 0x09, 0xB0, 0x08, 0x07, 0x08, 0x07, 0x04, 0xD3, 0x04, 0xD3, 0x00,
|
|
0x41, 0x00, 0x41);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x46);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x3C, 0x00,
|
|
0x3C, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x3C, 0x00,
|
|
0x3C);
|
|
//EM_DT_FCON2 80HZ
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x5C);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x0E, 0x58, 0x0D, 0x50, 0x0C, 0xA8, 0x0C,
|
|
0xA8, 0x0B, 0xA0, 0x0B, 0xA0, 0x09, 0xA2, 0x09, 0xA2, 0x05, 0xCA, 0x05, 0xCA, 0x00,
|
|
0x4E, 0x00, 0x4E);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x74);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x00, 0x48, 0x00, 0x48, 0x00, 0x48, 0x00,
|
|
0x48, 0x00, 0x48, 0x00, 0x48, 0x00, 0x48, 0x00, 0x48, 0x00, 0x48, 0x00, 0x48, 0x00,
|
|
0x48);
|
|
//EM_DT_FCON3 60HZ
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x8A);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x13, 0x20, 0x11, 0xC0, 0x10, 0xE0, 0x10,
|
|
0xE0, 0x0F, 0x80, 0x0F, 0x80, 0x0C, 0xD8, 0x0C, 0xD8, 0x07, 0xB8, 0x07, 0xB8, 0x00,
|
|
0x68, 0x00, 0x68);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0xA2);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x00, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00,
|
|
0x60, 0x00, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00, 0x60, 0x00,
|
|
0x60);
|
|
////Gamma Map
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x03);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x21, 0x43);
|
|
////EM pluse number
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x11);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x03, 0x04, 0x45, 0x87);
|
|
}
|
|
|
|
static void lcm_gamma_init(struct nt37801_lcm *ctx)
|
|
{
|
|
//By Gamma Update)
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x02);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xCC, 0x30);
|
|
|
|
//CMD2_Page2)
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x02);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x0B);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x02, 0xDA, 0x03, 0xD9, 0x03, 0xE0, 0x03,
|
|
0xEF, 0x03, 0xF9, 0x04, 0x00, 0x04, 0x06, 0x04, 0x0C, 0x04, 0x18);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x04, 0x29, 0x04, 0x3C, 0x04, 0x48, 0x04,
|
|
0x4C, 0x04, 0x53, 0x04, 0x63, 0x04, 0x73, 0x00, 0x00, 0x00, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
0x00, 0x00, 0x00, 0x00, 0x4B, 0x0D, 0xAB);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x02, 0xE3, 0x03, 0xE2, 0x03, 0xE9, 0x03,
|
|
0xF7, 0x04, 0x00, 0x04, 0x05, 0x04, 0x09, 0x04, 0x0D, 0x04, 0x15);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x04, 0x19, 0x04, 0x1F, 0x04, 0x25, 0x04,
|
|
0x2A, 0x04, 0x47, 0x04, 0x5C, 0x04, 0x71, 0x00, 0x00, 0x00, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
0x00, 0x00, 0x00, 0x01, 0xDD, 0x0D, 0xAB);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x02, 0xD4, 0x03, 0xD3, 0x03, 0xDB, 0x03,
|
|
0xEB, 0x03, 0xF6, 0x03, 0xFE, 0x04, 0x05, 0x04, 0x0C, 0x04, 0x1A);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x04, 0x26, 0x04, 0x3A, 0x04, 0x4B, 0x04,
|
|
0x4E, 0x04, 0x53, 0x04, 0x63, 0x04, 0x73, 0x00, 0x00, 0x00, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
0x00, 0x00, 0x00, 0x00, 0x4B, 0x0D, 0xAB);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x0A);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x01, 0x10, 0x02, 0x0F, 0x02, 0x2B, 0x02,
|
|
0x81, 0x02, 0xD9, 0x03, 0x1D, 0x03, 0x5C, 0x03, 0x99, 0x04, 0x0A);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x04, 0x88, 0x04, 0xDE, 0x05, 0x32, 0x05,
|
|
0x77, 0x05, 0xF9, 0x06, 0x6B, 0x06, 0xD6, 0x07, 0x3D, 0x07, 0xA1);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x08, 0x05, 0x08, 0x5C, 0x08, 0xB3, 0x09,
|
|
0x09, 0x09, 0x61, 0x0A, 0x1D, 0x0B, 0x8D);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xF6, 0x01, 0xF5, 0x02, 0x04, 0x02,
|
|
0x37, 0x02, 0x7B, 0x02, 0xB7, 0x02, 0xED, 0x03, 0x23, 0x03, 0x8F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x03, 0xFB, 0x04, 0x48, 0x04, 0x92, 0x04,
|
|
0xCE, 0x05, 0x41, 0x05, 0xA6, 0x06, 0x0B, 0x06, 0x6B, 0x06, 0xBE);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x07, 0x11, 0x07, 0x5B, 0x07, 0xAE, 0x07,
|
|
0xF7, 0x08, 0x40, 0x08, 0xD3, 0x0A, 0x06);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xE5, 0x01, 0xE4, 0x02, 0x09, 0x02,
|
|
0x72, 0x02, 0xDF, 0x03, 0x3B, 0x03, 0x86, 0x03, 0xD1, 0x04, 0x55);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x04, 0xDA, 0x05, 0x34, 0x05, 0x8E, 0x05,
|
|
0xD2, 0x06, 0x5B, 0x06, 0xD7, 0x07, 0x48, 0x07, 0xBB, 0x08, 0x23);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x08, 0x8B, 0x08, 0xE6, 0x09, 0x48, 0x09,
|
|
0xA7, 0x0A, 0x08, 0x0A, 0xCA, 0x0B, 0x8D);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x09);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x01, 0x10, 0x01, 0xF5, 0x02, 0x27, 0x02,
|
|
0x72, 0x02, 0xC0, 0x03, 0x03, 0x03, 0x3E, 0x03, 0x75, 0x03, 0xDE);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x04, 0x4A, 0x04, 0xAB, 0x04, 0xF7, 0x05,
|
|
0x40, 0x05, 0xB8, 0x06, 0x26, 0x06, 0x8B, 0x06, 0xEA, 0x07, 0x46);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x07, 0xA0, 0x07, 0xFA, 0x08, 0x49, 0x08,
|
|
0x98, 0x08, 0xE5, 0x09, 0x85, 0x09, 0x89);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xF6, 0x01, 0xDB, 0x02, 0x02, 0x02,
|
|
0x2E, 0x02, 0x68, 0x02, 0xA0, 0x02, 0xD3, 0x03, 0x03, 0x03, 0x64);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x03, 0xC6, 0x04, 0x1A, 0x04, 0x5E, 0x04,
|
|
0x9E, 0x05, 0x07, 0x05, 0x69, 0x05, 0xC4, 0x06, 0x1E, 0x06, 0x73);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x06, 0xBD, 0x07, 0x08, 0x07, 0x4B, 0x07,
|
|
0x94, 0x07, 0xD9, 0x08, 0x5C, 0x08, 0x5F);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xE5, 0x01, 0xCA, 0x02, 0x03, 0x02,
|
|
0x5F, 0x02, 0xC1, 0x03, 0x18, 0x03, 0x62, 0x03, 0xA5, 0x04, 0x21);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x04, 0x98, 0x04, 0xFE, 0x05, 0x4F, 0x05,
|
|
0x9C, 0x06, 0x16, 0x06, 0x8C, 0x06, 0xF8, 0x07, 0x5E, 0x07, 0xC5);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x08, 0x22, 0x08, 0x7F, 0x08, 0xD3, 0x09,
|
|
0x29, 0x09, 0x7F, 0x0A, 0x2D, 0x0A, 0x31);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x08);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x01, 0x10, 0x01, 0xD7, 0x02, 0x1D, 0x02,
|
|
0x61, 0x02, 0xA4, 0x02, 0xE2, 0x03, 0x19, 0x03, 0x4C, 0x03, 0xA9);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x04, 0x05, 0x04, 0x60, 0x04, 0xB3, 0x04,
|
|
0xF5, 0x05, 0x6A, 0x05, 0xD0, 0x06, 0x2F, 0x06, 0x87, 0x06, 0xDA);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x07, 0x2A, 0x07, 0x79, 0x07, 0xC7, 0x08,
|
|
0x12, 0x08, 0x57, 0x08, 0xDE, 0x08, 0xE1);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xF6, 0x01, 0xBD, 0x01, 0xFA, 0x02,
|
|
0x24, 0x02, 0x53, 0x02, 0x84, 0x02, 0xB3, 0x02, 0xDF, 0x03, 0x33);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x03, 0x87, 0x03, 0xD9, 0x04, 0x21, 0x04,
|
|
0x5C, 0x04, 0xC3, 0x05, 0x1D, 0x05, 0x71, 0x05, 0xC0, 0x06, 0x0F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x06, 0x59, 0x06, 0x9D, 0x06, 0xDE, 0x07,
|
|
0x1C, 0x07, 0x58, 0x07, 0xD3, 0x07, 0xD6);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xE5, 0x01, 0xAC, 0x01, 0xF8, 0x02,
|
|
0x4A, 0x02, 0x9E, 0x02, 0xED, 0x03, 0x34, 0x03, 0x73, 0x03, 0xE2);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x04, 0x4C, 0x04, 0xAF, 0x05, 0x06, 0x05,
|
|
0x4C, 0x05, 0xC7, 0x06, 0x30, 0x06, 0x96, 0x06, 0xF4, 0x07, 0x4D);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x07, 0xA6, 0x07, 0xFA, 0x08, 0x4B, 0x08,
|
|
0x99, 0x08, 0xE2, 0x09, 0x77, 0x09, 0x7B);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x07);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x01, 0x10, 0x01, 0xB2, 0x02, 0x0A, 0x02,
|
|
0x4B, 0x02, 0x82, 0x02, 0xB7, 0x02, 0xE9, 0x03, 0x16, 0x03, 0x66);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0xB2, 0x03, 0xFD, 0x04, 0x47, 0x04,
|
|
0x8D, 0x04, 0xFF, 0x05, 0x5F, 0x05, 0xB3, 0x06, 0x03, 0x06, 0x4E);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x06, 0x95, 0x06, 0xD8, 0x07, 0x1A, 0x07,
|
|
0x5A, 0x07, 0x9A, 0x08, 0x16, 0x08, 0x18);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xF6, 0x01, 0x98, 0x01, 0xE9, 0x02,
|
|
0x16, 0x02, 0x3B, 0x02, 0x62, 0x02, 0x8A, 0x02, 0xB0, 0x02, 0xF7);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x03, 0x3B, 0x03, 0x80, 0x03, 0xC3, 0x04,
|
|
0x00, 0x04, 0x65, 0x04, 0xB9, 0x05, 0x04, 0x05, 0x4A, 0x05, 0x8D);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x05, 0xCD, 0x06, 0x0D, 0x06, 0x4A, 0x06,
|
|
0x82, 0x06, 0xB9, 0x07, 0x1F, 0x07, 0x22);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xE5, 0x01, 0x87, 0x01, 0xE3, 0x02,
|
|
0x2F, 0x02, 0x73, 0x02, 0xB6, 0x02, 0xF6, 0x03, 0x30, 0x03, 0x93);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0xED, 0x04, 0x43, 0x04, 0x94, 0x04,
|
|
0xDE, 0x05, 0x57, 0x05, 0xBB, 0x06, 0x12, 0x06, 0x66, 0x06, 0xB7);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x07, 0x03, 0x07, 0x4B, 0x07, 0x94, 0x07,
|
|
0xD9, 0x08, 0x1C, 0x08, 0x9D, 0x08, 0xA0);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x06);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x01, 0x10, 0x01, 0x7F, 0x01, 0xE0, 0x02,
|
|
0x27, 0x02, 0x52, 0x02, 0x78, 0x02, 0x9C, 0x02, 0xC0, 0x03, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x3A, 0x03, 0x71, 0x03, 0xA4, 0x03,
|
|
0xD8, 0x04, 0x3D, 0x04, 0x9B, 0x04, 0xE8, 0x05, 0x2E, 0x05, 0x6D);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA6, 0x05, 0xDE, 0x06, 0x13, 0x06,
|
|
0x47, 0x06, 0x77, 0x06, 0xD5, 0x06, 0xD7);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xF6, 0x01, 0x65, 0x01, 0xC3, 0x01,
|
|
0xFD, 0x02, 0x1B, 0x02, 0x34, 0x02, 0x4E, 0x02, 0x69, 0x02, 0x9F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xD0, 0x03, 0x00, 0x03, 0x2F, 0x03,
|
|
0x5E, 0x03, 0xBA, 0x04, 0x0C, 0x04, 0x51, 0x04, 0x8E, 0x04, 0xC6);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF9, 0x05, 0x29, 0x05, 0x59, 0x05,
|
|
0x86, 0x05, 0xB2, 0x06, 0x0A, 0x06, 0x0C);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xE5, 0x01, 0x54, 0x01, 0xB7, 0x02,
|
|
0x05, 0x02, 0x38, 0x02, 0x66, 0x02, 0x94, 0x02, 0xC1, 0x03, 0x16);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x5D, 0x03, 0x9F, 0x03, 0xDD, 0x04,
|
|
0x18, 0x04, 0x8A, 0x04, 0xEC, 0x05, 0x3F, 0x05, 0x87, 0x05, 0xCA);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x05, 0x06, 0x3F, 0x06, 0x78, 0x06,
|
|
0xAF, 0x06, 0xE3, 0x07, 0x47, 0x07, 0x4A);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x05);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x01, 0x10, 0x01, 0x7F, 0x01, 0xE0, 0x02,
|
|
0x27, 0x02, 0x52, 0x02, 0x78, 0x02, 0x9C, 0x02, 0xC0, 0x03, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x3A, 0x03, 0x71, 0x03, 0xA4, 0x03,
|
|
0xD8, 0x04, 0x3D, 0x04, 0x9B, 0x04, 0xE8, 0x05, 0x2E, 0x05, 0x6D);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA6, 0x05, 0xDE, 0x06, 0x13, 0x06,
|
|
0x47, 0x06, 0x77, 0x06, 0xD5, 0x06, 0xD7);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xF6, 0x01, 0x65, 0x01, 0xC3, 0x01,
|
|
0xFD, 0x02, 0x1B, 0x02, 0x34, 0x02, 0x4E, 0x02, 0x69, 0x02, 0x9F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xD0, 0x03, 0x00, 0x03, 0x2F, 0x03,
|
|
0x5E, 0x03, 0xBA, 0x04, 0x0C, 0x04, 0x51, 0x04, 0x8E, 0x04, 0xC6);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF9, 0x05, 0x29, 0x05, 0x59, 0x05,
|
|
0x86, 0x05, 0xB2, 0x06, 0x0A, 0x06, 0x0C);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xE5, 0x01, 0x54, 0x01, 0xB7, 0x02,
|
|
0x05, 0x02, 0x38, 0x02, 0x66, 0x02, 0x94, 0x02, 0xC1, 0x03, 0x16);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x5D, 0x03, 0x9F, 0x03, 0xDD, 0x04,
|
|
0x18, 0x04, 0x8A, 0x04, 0xEC, 0x05, 0x3F, 0x05, 0x87, 0x05, 0xCA);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x05, 0x06, 0x3F, 0x06, 0x78, 0x06,
|
|
0xAF, 0x06, 0xE3, 0x07, 0x47, 0x07, 0x4A);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x04);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x01, 0x10, 0x01, 0x7F, 0x01, 0xE0, 0x02,
|
|
0x27, 0x02, 0x52, 0x02, 0x78, 0x02, 0x9C, 0x02, 0xC0, 0x03, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x3A, 0x03, 0x71, 0x03, 0xA4, 0x03,
|
|
0xD8, 0x04, 0x3D, 0x04, 0x9B, 0x04, 0xE8, 0x05, 0x2E, 0x05, 0x6D);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA6, 0x05, 0xDE, 0x06, 0x13, 0x06,
|
|
0x47, 0x06, 0x77, 0x06, 0xD5, 0x06, 0xD7);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xF6, 0x01, 0x65, 0x01, 0xC3, 0x01,
|
|
0xFD, 0x02, 0x1B, 0x02, 0x34, 0x02, 0x4E, 0x02, 0x69, 0x02, 0x9F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xD0, 0x03, 0x00, 0x03, 0x2F, 0x03,
|
|
0x5E, 0x03, 0xBA, 0x04, 0x0C, 0x04, 0x51, 0x04, 0x8E, 0x04, 0xC6);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF9, 0x05, 0x29, 0x05, 0x59, 0x05,
|
|
0x86, 0x05, 0xB2, 0x06, 0x0A, 0x06, 0x0C);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xE5, 0x01, 0x54, 0x01, 0xB7, 0x02,
|
|
0x05, 0x02, 0x38, 0x02, 0x66, 0x02, 0x94, 0x02, 0xC1, 0x03, 0x16);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x5D, 0x03, 0x9F, 0x03, 0xDD, 0x04,
|
|
0x18, 0x04, 0x8A, 0x04, 0xEC, 0x05, 0x3F, 0x05, 0x87, 0x05, 0xCA);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x05, 0x06, 0x3F, 0x06, 0x78, 0x06,
|
|
0xAF, 0x06, 0xE3, 0x07, 0x47, 0x07, 0x4A);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x03);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x01, 0x10, 0x01, 0x7F, 0x01, 0xE0, 0x02,
|
|
0x27, 0x02, 0x52, 0x02, 0x78, 0x02, 0x9C, 0x02, 0xC0, 0x03, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x3A, 0x03, 0x71, 0x03, 0xA4, 0x03,
|
|
0xD8, 0x04, 0x3D, 0x04, 0x9B, 0x04, 0xE8, 0x05, 0x2E, 0x05, 0x6D);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA6, 0x05, 0xDE, 0x06, 0x13, 0x06,
|
|
0x47, 0x06, 0x77, 0x06, 0xD5, 0x06, 0xD7);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xF6, 0x01, 0x65, 0x01, 0xC3, 0x01,
|
|
0xFD, 0x02, 0x1B, 0x02, 0x34, 0x02, 0x4E, 0x02, 0x69, 0x02, 0x9F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xD0, 0x03, 0x00, 0x03, 0x2F, 0x03,
|
|
0x5E, 0x03, 0xBA, 0x04, 0x0C, 0x04, 0x51, 0x04, 0x8E, 0x04, 0xC6);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF9, 0x05, 0x29, 0x05, 0x59, 0x05,
|
|
0x86, 0x05, 0xB2, 0x06, 0x0A, 0x06, 0x0C);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xE5, 0x01, 0x54, 0x01, 0xB7, 0x02,
|
|
0x05, 0x02, 0x38, 0x02, 0x66, 0x02, 0x94, 0x02, 0xC1, 0x03, 0x16);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x5D, 0x03, 0x9F, 0x03, 0xDD, 0x04,
|
|
0x18, 0x04, 0x8A, 0x04, 0xEC, 0x05, 0x3F, 0x05, 0x87, 0x05, 0xCA);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x05, 0x06, 0x3F, 0x06, 0x78, 0x06,
|
|
0xAF, 0x06, 0xE3, 0x07, 0x47, 0x07, 0x4A);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x02);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x01, 0x10, 0x01, 0x7F, 0x01, 0xE0, 0x02,
|
|
0x27, 0x02, 0x52, 0x02, 0x78, 0x02, 0x9C, 0x02, 0xC0, 0x03, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x3A, 0x03, 0x71, 0x03, 0xA4, 0x03,
|
|
0xD8, 0x04, 0x3D, 0x04, 0x9B, 0x04, 0xE8, 0x05, 0x2E, 0x05, 0x6D);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA6, 0x05, 0xDE, 0x06, 0x13, 0x06,
|
|
0x47, 0x06, 0x77, 0x06, 0xD5, 0x06, 0xD7);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xF6, 0x01, 0x65, 0x01, 0xC3, 0x01,
|
|
0xFD, 0x02, 0x1B, 0x02, 0x34, 0x02, 0x4E, 0x02, 0x69, 0x02, 0x9F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xD0, 0x03, 0x00, 0x03, 0x2F, 0x03,
|
|
0x5E, 0x03, 0xBA, 0x04, 0x0C, 0x04, 0x51, 0x04, 0x8E, 0x04, 0xC6);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF9, 0x05, 0x29, 0x05, 0x59, 0x05,
|
|
0x86, 0x05, 0xB2, 0x06, 0x0A, 0x06, 0x0C);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xE5, 0x01, 0x54, 0x01, 0xB7, 0x02,
|
|
0x05, 0x02, 0x38, 0x02, 0x66, 0x02, 0x94, 0x02, 0xC1, 0x03, 0x16);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x5D, 0x03, 0x9F, 0x03, 0xDD, 0x04,
|
|
0x18, 0x04, 0x8A, 0x04, 0xEC, 0x05, 0x3F, 0x05, 0x87, 0x05, 0xCA);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x05, 0x06, 0x3F, 0x06, 0x78, 0x06,
|
|
0xAF, 0x06, 0xE3, 0x07, 0x47, 0x07, 0x4A);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x01);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x01, 0x10, 0x01, 0x7F, 0x01, 0xE0, 0x02,
|
|
0x27, 0x02, 0x52, 0x02, 0x78, 0x02, 0x9C, 0x02, 0xC0, 0x03, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x3A, 0x03, 0x71, 0x03, 0xA4, 0x03,
|
|
0xD8, 0x04, 0x3D, 0x04, 0x9B, 0x04, 0xE8, 0x05, 0x2E, 0x05, 0x6D);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA6, 0x05, 0xDE, 0x06, 0x13, 0x06,
|
|
0x47, 0x06, 0x77, 0x06, 0xD5, 0x06, 0xD7);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xF6, 0x01, 0x65, 0x01, 0xC3, 0x01,
|
|
0xFD, 0x02, 0x1B, 0x02, 0x34, 0x02, 0x4E, 0x02, 0x69, 0x02, 0x9F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xD0, 0x03, 0x00, 0x03, 0x2F, 0x03,
|
|
0x5E, 0x03, 0xBA, 0x04, 0x0C, 0x04, 0x51, 0x04, 0x8E, 0x04, 0xC6);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF9, 0x05, 0x29, 0x05, 0x59, 0x05,
|
|
0x86, 0x05, 0xB2, 0x06, 0x0A, 0x06, 0x0C);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xE5, 0x01, 0x54, 0x01, 0xB7, 0x02,
|
|
0x05, 0x02, 0x38, 0x02, 0x66, 0x02, 0x94, 0x02, 0xC1, 0x03, 0x16);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x5D, 0x03, 0x9F, 0x03, 0xDD, 0x04,
|
|
0x18, 0x04, 0x8A, 0x04, 0xEC, 0x05, 0x3F, 0x05, 0x87, 0x05, 0xCA);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x05, 0x06, 0x3F, 0x06, 0x78, 0x06,
|
|
0xAF, 0x06, 0xE3, 0x07, 0x47, 0x07, 0x4A);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x00);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x01, 0x10, 0x01, 0x25, 0x01, 0x4E, 0x01,
|
|
0x8E, 0x01, 0xB2, 0x01, 0xD7, 0x01, 0xEA, 0x01, 0xF7, 0x02, 0x12);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x02, 0x2A, 0x02, 0x3A, 0x02, 0x4A, 0x02,
|
|
0x59, 0x02, 0x76, 0x02, 0x91, 0x02, 0xAC, 0x02, 0xC6, 0x02, 0xDE);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x02, 0xF7, 0x03, 0x0D, 0x03, 0x23, 0x03,
|
|
0x38, 0x03, 0x4D, 0x03, 0x75, 0x03, 0x76);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xF6, 0x01, 0x0B, 0x01, 0x34, 0x01,
|
|
0x74, 0x01, 0x97, 0x01, 0xBA, 0x01, 0xCB, 0x01, 0xD6, 0x01, 0xEC);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x01, 0xFF, 0x02, 0x0A, 0x02, 0x16, 0x02,
|
|
0x20, 0x02, 0x33, 0x02, 0x46, 0x02, 0x5A, 0x02, 0x6E, 0x02, 0x82);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x02, 0x96, 0x02, 0xAA, 0x02, 0xBC, 0x02,
|
|
0xCE, 0x02, 0xE0, 0x03, 0x04, 0x03, 0x05);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xE5, 0x00, 0xFA, 0x01, 0x23, 0x01,
|
|
0x63, 0x01, 0x88, 0x01, 0xAD, 0x01, 0xC2, 0x01, 0xD0, 0x01, 0xEE);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x02, 0x09, 0x02, 0x1C, 0x02, 0x2F, 0x02,
|
|
0x41, 0x02, 0x63, 0x02, 0x86, 0x02, 0xA8, 0x02, 0xC9, 0x02, 0xE9);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x03, 0x09, 0x03, 0x25, 0x03, 0x40, 0x03,
|
|
0x5A, 0x03, 0x73, 0x03, 0xA4, 0x03, 0xA5);
|
|
|
|
//96Hz gamma code);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x1B);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x02, 0xDA, 0x03, 0xD9, 0x03, 0xE0, 0x03,
|
|
0xEF, 0x03, 0xF9, 0x04, 0x00, 0x04, 0x06, 0x04, 0x0C, 0x04, 0x18);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x04, 0x29, 0x04, 0x3C, 0x04, 0x48, 0x04,
|
|
0x4C, 0x04, 0x53, 0x04, 0x63, 0x04, 0x73, 0x00, 0x00, 0x00, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
0x00, 0x00, 0x00, 0x00, 0x4B, 0x0D, 0xAB);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x02, 0xE3, 0x03, 0xE2, 0x03, 0xE9, 0x03,
|
|
0xF7, 0x04, 0x00, 0x04, 0x05, 0x04, 0x09, 0x04, 0x0D, 0x04, 0x15);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x04, 0x19, 0x04, 0x1F, 0x04, 0x25, 0x04,
|
|
0x2A, 0x04, 0x47, 0x04, 0x5C, 0x04, 0x71, 0x00, 0x00, 0x00, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
0x00, 0x00, 0x00, 0x01, 0xDD, 0x0D, 0xAB);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x02, 0xD4, 0x03, 0xD3, 0x03, 0xDB, 0x03,
|
|
0xEB, 0x03, 0xF6, 0x03, 0xFE, 0x04, 0x05, 0x04, 0x0C, 0x04, 0x1A);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x04, 0x26, 0x04, 0x3A, 0x04, 0x4B, 0x04,
|
|
0x4E, 0x04, 0x53, 0x04, 0x63, 0x04, 0x73, 0x00, 0x00, 0x00, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
0x00, 0x00, 0x00, 0x00, 0x4B, 0x0D, 0xAB);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x1A);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xA7, 0x01, 0xA6, 0x01, 0xAE, 0x01,
|
|
0xC2, 0x01, 0xD2, 0x01, 0xE1, 0x01, 0xF0, 0x02, 0x01, 0x02, 0x1C);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x02, 0x2D, 0x02, 0x3E, 0x02, 0x49, 0x02,
|
|
0x61, 0x02, 0x96, 0x02, 0xBA, 0x02, 0xDA, 0x02, 0xFC, 0x03, 0x20);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x03, 0x44, 0x03, 0x64, 0x03, 0x82, 0x03,
|
|
0x9D, 0x03, 0xBC, 0x03, 0xEA, 0x03, 0xEB);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xC8, 0x01, 0xC7, 0x01, 0xCA, 0x01,
|
|
0xD1, 0x01, 0xD4, 0x01, 0xD6, 0x01, 0xD8, 0x01, 0xDB, 0x01, 0xE1);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x01, 0xEE, 0x01, 0xFB, 0x02, 0x02, 0x02,
|
|
0x14, 0x02, 0x3A, 0x02, 0x5A, 0x02, 0x7A, 0x02, 0x98, 0x02, 0xBB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x02, 0xD9, 0x02, 0xF6, 0x03, 0x11, 0x03,
|
|
0x2A, 0x03, 0x40, 0x03, 0x7A, 0x03, 0x7B);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xBF, 0x01, 0xBE, 0x01, 0xC1, 0x01,
|
|
0xCB, 0x01, 0xD1, 0x01, 0xD6, 0x01, 0xDB, 0x01, 0xE2, 0x01, 0xFB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x02, 0x11, 0x02, 0x27, 0x02, 0x37, 0x02,
|
|
0x54, 0x02, 0x92, 0x02, 0xC0, 0x02, 0xED, 0x03, 0x1A, 0x03, 0x47);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x03, 0x74, 0x03, 0x99, 0x03, 0xBB, 0x03,
|
|
0xDC, 0x03, 0xE9, 0x03, 0xEA, 0x03, 0xEB);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x19);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xA7, 0x01, 0x8C, 0x01, 0xAD, 0x01,
|
|
0xBE, 0x01, 0xCE, 0x01, 0xDB, 0x01, 0xE9, 0x01, 0xF7, 0x02, 0x11);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x02, 0x25, 0x02, 0x34, 0x02, 0x41, 0x02,
|
|
0x4E, 0x02, 0x7B, 0x02, 0xA4, 0x02, 0xC3, 0x02, 0xE1, 0x02, 0xFF);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x03, 0x20, 0x03, 0x40, 0x03, 0x5D, 0x03,
|
|
0x79, 0x03, 0x92, 0x03, 0xC5, 0x03, 0xC6);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xC8, 0x01, 0xAD, 0x01, 0xCA, 0x01,
|
|
0xD0, 0x01, 0xD3, 0x01, 0xD5, 0x01, 0xD7, 0x01, 0xD9, 0x01, 0xDF);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x01, 0xE8, 0x01, 0xF3, 0x01, 0xFD, 0x02,
|
|
0x06, 0x02, 0x27, 0x02, 0x47, 0x02, 0x63, 0x02, 0x80, 0x02, 0x9B);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x02, 0xBB, 0x02, 0xD6, 0x02, 0xF0, 0x03,
|
|
0x09, 0x03, 0x20, 0x03, 0x4B, 0x03, 0x4C);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xBF, 0x01, 0xA4, 0x01, 0xC1, 0x01,
|
|
0xC9, 0x01, 0xCF, 0x01, 0xD4, 0x01, 0xD9, 0x01, 0xDE, 0x01, 0xF1);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x02, 0x06, 0x02, 0x1A, 0x02, 0x2C, 0x02,
|
|
0x3D, 0x02, 0x73, 0x02, 0xA4, 0x02, 0xCD, 0x02, 0xF6, 0x03, 0x1E);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x03, 0x47, 0x03, 0x6F, 0x03, 0x91, 0x03,
|
|
0xB0, 0x03, 0xCE, 0x03, 0xE9, 0x03, 0xE9);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x18);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xA7, 0x01, 0x6E, 0x01, 0xA7, 0x01,
|
|
0xBA, 0x01, 0xC8, 0x01, 0xD5, 0x01, 0xE0, 0x01, 0xEC, 0x02, 0x04);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x02, 0x18, 0x02, 0x28, 0x02, 0x35, 0x02,
|
|
0x41, 0x02, 0x5E, 0x02, 0x84, 0x02, 0xA7, 0x02, 0xC2, 0x02, 0xDC);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x02, 0xF6, 0x03, 0x12, 0x03, 0x2E, 0x03,
|
|
0x49, 0x03, 0x62, 0x03, 0x90, 0x03, 0x91);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xC8, 0x01, 0x8F, 0x01, 0xC4, 0x01,
|
|
0xCF, 0x01, 0xD2, 0x01, 0xD4, 0x01, 0xD6, 0x01, 0xD7, 0x01, 0xDC);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x01, 0xE2, 0x01, 0xEB, 0x01, 0xF4, 0x01,
|
|
0xFD, 0x02, 0x12, 0x02, 0x2E, 0x02, 0x4A, 0x02, 0x62, 0x02, 0x7B);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x02, 0x93, 0x02, 0xAD, 0x02, 0xC7, 0x02,
|
|
0xDE, 0x02, 0xF4, 0x03, 0x1E, 0x03, 0x1F);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xBF, 0x01, 0x86, 0x01, 0xBB, 0x01,
|
|
0xC7, 0x01, 0xCD, 0x01, 0xD2, 0x01, 0xD6, 0x01, 0xDA, 0x01, 0xE7);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x01, 0xF9, 0x02, 0x0B, 0x02, 0x1C, 0x02,
|
|
0x2B, 0x02, 0x50, 0x02, 0x7E, 0x02, 0xA8, 0x02, 0xCB, 0x02, 0xEF);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x03, 0x12, 0x03, 0x35, 0x03, 0x58, 0x03,
|
|
0x79, 0x03, 0x96, 0x03, 0xCB, 0x03, 0xCD);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x17);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xA7, 0x01, 0x49, 0x01, 0x97, 0x01,
|
|
0xB4, 0x01, 0xC1, 0x01, 0xCC, 0x01, 0xD6, 0x01, 0xDF, 0x01, 0xF3);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x02, 0x06, 0x02, 0x16, 0x02, 0x24, 0x02,
|
|
0x2F, 0x02, 0x44, 0x02, 0x5B, 0x02, 0x79, 0x02, 0x97, 0x02, 0xB0);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x02, 0xC6, 0x02, 0xDB, 0x02, 0xF1, 0x03,
|
|
0x07, 0x03, 0x1E, 0x03, 0x4A, 0x03, 0x4B);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xC8, 0x01, 0x6A, 0x01, 0xB5, 0x01,
|
|
0xCB, 0x01, 0xD0, 0x01, 0xD3, 0x01, 0xD4, 0x01, 0xD6, 0x01, 0xD8);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x01, 0xDD, 0x01, 0xE1, 0x01, 0xE9, 0x01,
|
|
0xF0, 0x01, 0xFF, 0x02, 0x10, 0x02, 0x26, 0x02, 0x3D, 0x02, 0x52);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x02, 0x66, 0x02, 0x7A, 0x02, 0x8E, 0x02,
|
|
0xA3, 0x02, 0xB8, 0x02, 0xDF, 0x02, 0xE0);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xBF, 0x01, 0x61, 0x01, 0xAC, 0x01,
|
|
0xC3, 0x01, 0xCA, 0x01, 0xCF, 0x01, 0xD2, 0x01, 0xD6, 0x01, 0xDE);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x01, 0xE9, 0x01, 0xF7, 0x02, 0x06, 0x02,
|
|
0x14, 0x02, 0x2E, 0x02, 0x4C, 0x02, 0x71, 0x02, 0x94, 0x02, 0xB4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x02, 0xD1, 0x02, 0xEE, 0x03, 0x0B, 0x03,
|
|
0x27, 0x03, 0x44, 0x03, 0x7B, 0x03, 0x7C);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x16);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xA7, 0x01, 0x16, 0x01, 0x72, 0x01,
|
|
0xA4, 0x01, 0xB6, 0x01, 0xBF, 0x01, 0xC6, 0x01, 0xCE, 0x01, 0xDB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x01, 0xE8, 0x01, 0xF6, 0x02, 0x03, 0x02,
|
|
0x0E, 0x02, 0x22, 0x02, 0x31, 0x02, 0x40, 0x02, 0x4F, 0x02, 0x60);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x02, 0x75, 0x02, 0x89, 0x02, 0x9C, 0x02,
|
|
0xAE, 0x02, 0xBD, 0x02, 0xDA, 0x02, 0xDB);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xC8, 0x01, 0x37, 0x01, 0x91, 0x01,
|
|
0xBF, 0x01, 0xCC, 0x01, 0xCF, 0x01, 0xD1, 0x01, 0xD3, 0x01, 0xD5);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x01, 0xD7, 0x01, 0xD9, 0x01, 0xDC, 0x01,
|
|
0xDF, 0x01, 0xE8, 0x01, 0xF2, 0x01, 0xFC, 0x02, 0x07, 0x02, 0x14);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x02, 0x23, 0x02, 0x32, 0x02, 0x42, 0x02,
|
|
0x50, 0x02, 0x5E, 0x02, 0x79, 0x02, 0x7A);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xBF, 0x01, 0x2E, 0x01, 0x88, 0x01,
|
|
0xB6, 0x01, 0xC4, 0x01, 0xC9, 0x01, 0xCC, 0x01, 0xD0, 0x01, 0xD4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x01, 0xDA, 0x01, 0xE0, 0x01, 0xE7, 0x01,
|
|
0xF0, 0x02, 0x04, 0x02, 0x17, 0x02, 0x29, 0x02, 0x3D, 0x02, 0x52);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x02, 0x6B, 0x02, 0x84, 0x02, 0x9B, 0x02,
|
|
0xB1, 0x02, 0xC5, 0x02, 0xED, 0x02, 0xED);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x15);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xA7, 0x01, 0x16, 0x01, 0x72, 0x01,
|
|
0xA4, 0x01, 0xB6, 0x01, 0xBF, 0x01, 0xC6, 0x01, 0xCE, 0x01, 0xDB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x01, 0xE8, 0x01, 0xF6, 0x02, 0x03, 0x02,
|
|
0x0E, 0x02, 0x22, 0x02, 0x31, 0x02, 0x40, 0x02, 0x4F, 0x02, 0x60);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x02, 0x75, 0x02, 0x89, 0x02, 0x9C, 0x02,
|
|
0xAE, 0x02, 0xBD, 0x02, 0xDA, 0x02, 0xDB);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xC8, 0x01, 0x37, 0x01, 0x91, 0x01,
|
|
0xBF, 0x01, 0xCC, 0x01, 0xCF, 0x01, 0xD1, 0x01, 0xD3, 0x01, 0xD5);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x01, 0xD7, 0x01, 0xD9, 0x01, 0xDC, 0x01,
|
|
0xDF, 0x01, 0xE8, 0x01, 0xF2, 0x01, 0xFC, 0x02, 0x07, 0x02, 0x14);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x02, 0x23, 0x02, 0x32, 0x02, 0x42, 0x02,
|
|
0x50, 0x02, 0x5E, 0x02, 0x79, 0x02, 0x7A);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xBF, 0x01, 0x2E, 0x01, 0x88, 0x01,
|
|
0xB6, 0x01, 0xC4, 0x01, 0xC9, 0x01, 0xCC, 0x01, 0xD0, 0x01, 0xD4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x01, 0xDA, 0x01, 0xE0, 0x01, 0xE7, 0x01,
|
|
0xF0, 0x02, 0x04, 0x02, 0x17, 0x02, 0x29, 0x02, 0x3D, 0x02, 0x52);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x02, 0x6B, 0x02, 0x84, 0x02, 0x9B, 0x02,
|
|
0xB1, 0x02, 0xC5, 0x02, 0xED, 0x02, 0xED);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x14);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xA7, 0x01, 0x16, 0x01, 0x72, 0x01,
|
|
0xA4, 0x01, 0xB6, 0x01, 0xBF, 0x01, 0xC6, 0x01, 0xCE, 0x01, 0xDB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x01, 0xE8, 0x01, 0xF6, 0x02, 0x03, 0x02,
|
|
0x0E, 0x02, 0x22, 0x02, 0x31, 0x02, 0x40, 0x02, 0x4F, 0x02, 0x60);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x02, 0x75, 0x02, 0x89, 0x02, 0x9C, 0x02,
|
|
0xAE, 0x02, 0xBD, 0x02, 0xDA, 0x02, 0xDB);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xC8, 0x01, 0x37, 0x01, 0x91, 0x01,
|
|
0xBF, 0x01, 0xCC, 0x01, 0xCF, 0x01, 0xD1, 0x01, 0xD3, 0x01, 0xD5);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x01, 0xD7, 0x01, 0xD9, 0x01, 0xDC, 0x01,
|
|
0xDF, 0x01, 0xE8, 0x01, 0xF2, 0x01, 0xFC, 0x02, 0x07, 0x02, 0x14);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x02, 0x23, 0x02, 0x32, 0x02, 0x42, 0x02,
|
|
0x50, 0x02, 0x5E, 0x02, 0x79, 0x02, 0x7A);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xBF, 0x01, 0x2E, 0x01, 0x88, 0x01,
|
|
0xB6, 0x01, 0xC4, 0x01, 0xC9, 0x01, 0xCC, 0x01, 0xD0, 0x01, 0xD4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x01, 0xDA, 0x01, 0xE0, 0x01, 0xE7, 0x01,
|
|
0xF0, 0x02, 0x04, 0x02, 0x17, 0x02, 0x29, 0x02, 0x3D, 0x02, 0x52);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x02, 0x6B, 0x02, 0x84, 0x02, 0x9B, 0x02,
|
|
0xB1, 0x02, 0xC5, 0x02, 0xED, 0x02, 0xED);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x13);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xA7, 0x01, 0x16, 0x01, 0x72, 0x01,
|
|
0xA4, 0x01, 0xB6, 0x01, 0xBF, 0x01, 0xC6, 0x01, 0xCE, 0x01, 0xDB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x01, 0xE8, 0x01, 0xF6, 0x02, 0x03, 0x02,
|
|
0x0E, 0x02, 0x22, 0x02, 0x31, 0x02, 0x40, 0x02, 0x4F, 0x02, 0x60);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x02, 0x75, 0x02, 0x89, 0x02, 0x9C, 0x02,
|
|
0xAE, 0x02, 0xBD, 0x02, 0xDA, 0x02, 0xDB);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xC8, 0x01, 0x37, 0x01, 0x91, 0x01,
|
|
0xBF, 0x01, 0xCC, 0x01, 0xCF, 0x01, 0xD1, 0x01, 0xD3, 0x01, 0xD5);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x01, 0xD7, 0x01, 0xD9, 0x01, 0xDC, 0x01,
|
|
0xDF, 0x01, 0xE8, 0x01, 0xF2, 0x01, 0xFC, 0x02, 0x07, 0x02, 0x14);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x02, 0x23, 0x02, 0x32, 0x02, 0x42, 0x02,
|
|
0x50, 0x02, 0x5E, 0x02, 0x79, 0x02, 0x7A);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xBF, 0x01, 0x2E, 0x01, 0x88, 0x01,
|
|
0xB6, 0x01, 0xC4, 0x01, 0xC9, 0x01, 0xCC, 0x01, 0xD0, 0x01, 0xD4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x01, 0xDA, 0x01, 0xE0, 0x01, 0xE7, 0x01,
|
|
0xF0, 0x02, 0x04, 0x02, 0x17, 0x02, 0x29, 0x02, 0x3D, 0x02, 0x52);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x02, 0x6B, 0x02, 0x84, 0x02, 0x9B, 0x02,
|
|
0xB1, 0x02, 0xC5, 0x02, 0xED, 0x02, 0xED);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x12);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xA7, 0x01, 0x16, 0x01, 0x72, 0x01,
|
|
0xA4, 0x01, 0xB6, 0x01, 0xBF, 0x01, 0xC6, 0x01, 0xCE, 0x01, 0xDB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x01, 0xE8, 0x01, 0xF6, 0x02, 0x03, 0x02,
|
|
0x0E, 0x02, 0x22, 0x02, 0x31, 0x02, 0x40, 0x02, 0x4F, 0x02, 0x60);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x02, 0x75, 0x02, 0x89, 0x02, 0x9C, 0x02,
|
|
0xAE, 0x02, 0xBD, 0x02, 0xDA, 0x02, 0xDB);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xC8, 0x01, 0x37, 0x01, 0x91, 0x01,
|
|
0xBF, 0x01, 0xCC, 0x01, 0xCF, 0x01, 0xD1, 0x01, 0xD3, 0x01, 0xD5);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x01, 0xD7, 0x01, 0xD9, 0x01, 0xDC, 0x01,
|
|
0xDF, 0x01, 0xE8, 0x01, 0xF2, 0x01, 0xFC, 0x02, 0x07, 0x02, 0x14);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x02, 0x23, 0x02, 0x32, 0x02, 0x42, 0x02,
|
|
0x50, 0x02, 0x5E, 0x02, 0x79, 0x02, 0x7A);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xBF, 0x01, 0x2E, 0x01, 0x88, 0x01,
|
|
0xB6, 0x01, 0xC4, 0x01, 0xC9, 0x01, 0xCC, 0x01, 0xD0, 0x01, 0xD4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x01, 0xDA, 0x01, 0xE0, 0x01, 0xE7, 0x01,
|
|
0xF0, 0x02, 0x04, 0x02, 0x17, 0x02, 0x29, 0x02, 0x3D, 0x02, 0x52);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x02, 0x6B, 0x02, 0x84, 0x02, 0x9B, 0x02,
|
|
0xB1, 0x02, 0xC5, 0x02, 0xED, 0x02, 0xED);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x11);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xA7, 0x01, 0x16, 0x01, 0x72, 0x01,
|
|
0xA4, 0x01, 0xB6, 0x01, 0xBF, 0x01, 0xC6, 0x01, 0xCE, 0x01, 0xDB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x01, 0xE8, 0x01, 0xF6, 0x02, 0x03, 0x02,
|
|
0x0E, 0x02, 0x22, 0x02, 0x31, 0x02, 0x40, 0x02, 0x4F, 0x02, 0x60);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x02, 0x75, 0x02, 0x89, 0x02, 0x9C, 0x02,
|
|
0xAE, 0x02, 0xBD, 0x02, 0xDA, 0x02, 0xDB);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xC8, 0x01, 0x37, 0x01, 0x91, 0x01,
|
|
0xBF, 0x01, 0xCC, 0x01, 0xCF, 0x01, 0xD1, 0x01, 0xD3, 0x01, 0xD5);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x01, 0xD7, 0x01, 0xD9, 0x01, 0xDC, 0x01,
|
|
0xDF, 0x01, 0xE8, 0x01, 0xF2, 0x01, 0xFC, 0x02, 0x07, 0x02, 0x14);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x02, 0x23, 0x02, 0x32, 0x02, 0x42, 0x02,
|
|
0x50, 0x02, 0x5E, 0x02, 0x79, 0x02, 0x7A);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xBF, 0x01, 0x2E, 0x01, 0x88, 0x01,
|
|
0xB6, 0x01, 0xC4, 0x01, 0xC9, 0x01, 0xCC, 0x01, 0xD0, 0x01, 0xD4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x01, 0xDA, 0x01, 0xE0, 0x01, 0xE7, 0x01,
|
|
0xF0, 0x02, 0x04, 0x02, 0x17, 0x02, 0x29, 0x02, 0x3D, 0x02, 0x52);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x02, 0x6B, 0x02, 0x84, 0x02, 0x9B, 0x02,
|
|
0xB1, 0x02, 0xC5, 0x02, 0xED, 0x02, 0xED);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x10);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xA7, 0x00, 0xBC, 0x00, 0xE5, 0x01,
|
|
0x24, 0x01, 0x47, 0x01, 0x69, 0x01, 0x79, 0x01, 0x82, 0x01, 0x95);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x01, 0xA5, 0x01, 0xAC, 0x01, 0xB3, 0x01,
|
|
0xB8, 0x01, 0xBE, 0x01, 0xC4, 0x01, 0xCA, 0x01, 0xCF, 0x01, 0xD4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x01, 0xD9, 0x01, 0xDE, 0x01, 0xE3, 0x01,
|
|
0xE8, 0x01, 0xED, 0x01, 0xF7, 0x01, 0xF7);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xC8, 0x00, 0xDD, 0x01, 0x06, 0x01,
|
|
0x45, 0x01, 0x67, 0x01, 0x88, 0x01, 0x97, 0x01, 0xA0, 0x01, 0xB1);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x01, 0xC0, 0x01, 0xC5, 0x01, 0xCA, 0x01,
|
|
0xCD, 0x01, 0xCF, 0x01, 0xD0, 0x01, 0xD2, 0x01, 0xD3, 0x01, 0xD4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x01, 0xD5, 0x01, 0xD5, 0x01, 0xD6, 0x01,
|
|
0xD7, 0x01, 0xD8, 0x01, 0xD9, 0x01, 0xD9);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0xBF, 0x00, 0xD4, 0x00, 0xFD, 0x01,
|
|
0x3C, 0x01, 0x5E, 0x01, 0x7F, 0x01, 0x8E, 0x01, 0x97, 0x01, 0xA8);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x01, 0xB7, 0x01, 0xBC, 0x01, 0xC1, 0x01,
|
|
0xC5, 0x01, 0xC9, 0x01, 0xCB, 0x01, 0xCE, 0x01, 0xD0, 0x01, 0xD2);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x01, 0xD3, 0x01, 0xD5, 0x01, 0xD8, 0x01,
|
|
0xDA, 0x01, 0xDC, 0x01, 0xE1, 0x01, 0xE1);
|
|
|
|
//80Hz gamma code);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x2B);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x02, 0xDA, 0x03, 0xD9, 0x03, 0xE0, 0x03,
|
|
0xEF, 0x03, 0xF9, 0x04, 0x00, 0x04, 0x06, 0x04, 0x0C, 0x04, 0x18);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x04, 0x29, 0x04, 0x3C, 0x04, 0x48, 0x04,
|
|
0x4C, 0x04, 0x53, 0x04, 0x63, 0x04, 0x73, 0x00, 0x00, 0x00, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
0x00, 0x00, 0x00, 0x00, 0x4B, 0x0D, 0xAB);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x02, 0xE3, 0x03, 0xE2, 0x03, 0xE9, 0x03,
|
|
0xF7, 0x04, 0x00, 0x04, 0x05, 0x04, 0x09, 0x04, 0x0D, 0x04, 0x15);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x04, 0x19, 0x04, 0x1F, 0x04, 0x25, 0x04,
|
|
0x2A, 0x04, 0x47, 0x04, 0x5C, 0x04, 0x71, 0x00, 0x00, 0x00, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
0x00, 0x00, 0x00, 0x01, 0xDD, 0x0D, 0xAB);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x02, 0xD4, 0x03, 0xD3, 0x03, 0xDB, 0x03,
|
|
0xEB, 0x03, 0xF6, 0x03, 0xFE, 0x04, 0x05, 0x04, 0x0C, 0x04, 0x1A);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x04, 0x26, 0x04, 0x3A, 0x04, 0x4B, 0x04,
|
|
0x4E, 0x04, 0x53, 0x04, 0x63, 0x04, 0x73, 0x00, 0x00, 0x00, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
0x00, 0x00, 0x00, 0x00, 0x4B, 0x0D, 0xAB);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x2A);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xD2, 0x01, 0xD1, 0x01, 0xF9, 0x02,
|
|
0x58, 0x02, 0xB3, 0x03, 0x12, 0x03, 0x60, 0x03, 0x9F, 0x04, 0x0F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x04, 0x7F, 0x04, 0xE0, 0x05, 0x27, 0x05,
|
|
0x6D, 0x05, 0xF9, 0x06, 0x73, 0x06, 0xDD, 0x07, 0x3F, 0x07, 0xA0);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x08, 0x03, 0x08, 0x66, 0x08, 0xB6, 0x09,
|
|
0x0F, 0x09, 0x68, 0x0A, 0x1F, 0x0A, 0x20);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xA0, 0x01, 0x9F, 0x01, 0xBE, 0x02,
|
|
0x02, 0x02, 0x4D, 0x02, 0xA1, 0x02, 0xED, 0x03, 0x27, 0x03, 0x8D);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x03, 0xF3, 0x04, 0x46, 0x04, 0x85, 0x04,
|
|
0xC4, 0x05, 0x42, 0x05, 0xAE, 0x06, 0x10, 0x06, 0x68, 0x06, 0xC0);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x07, 0x12, 0x07, 0x62, 0x07, 0xB0, 0x07,
|
|
0xFA, 0x08, 0x44, 0x08, 0xDC, 0x08, 0xDD);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x9A, 0x01, 0x99, 0x01, 0xCE, 0x02,
|
|
0x47, 0x02, 0xBD, 0x03, 0x33, 0x03, 0x98, 0x03, 0xDE, 0x04, 0x59);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x04, 0xD4, 0x05, 0x39, 0x05, 0x84, 0x05,
|
|
0xCC, 0x06, 0x5B, 0x06, 0xDD, 0x07, 0x52, 0x07, 0xBA, 0x08, 0x22);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x08, 0x8B, 0x08, 0xF4, 0x09, 0x4A, 0x09,
|
|
0xA9, 0x0A, 0x08, 0x0A, 0xDC, 0x0A, 0xDD);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x29);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xD2, 0x01, 0xB7, 0x01, 0xF3, 0x02,
|
|
0x47, 0x02, 0x9A, 0x02, 0xEE, 0x03, 0x3A, 0x03, 0x7A, 0x03, 0xE3);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x04, 0x48, 0x04, 0xA6, 0x04, 0xF5, 0x05,
|
|
0x35, 0x05, 0xB3, 0x06, 0x29, 0x06, 0x92, 0x06, 0xF0, 0x07, 0x48);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x07, 0x9F, 0x07, 0xF8, 0x08, 0x51, 0x08,
|
|
0x9D, 0x08, 0xEA, 0x09, 0x8B, 0x09, 0x8F);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xA0, 0x01, 0x85, 0x01, 0xB9, 0x01,
|
|
0xF6, 0x02, 0x38, 0x02, 0x81, 0x02, 0xC8, 0x03, 0x05, 0x03, 0x65);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x03, 0xC0, 0x04, 0x14, 0x04, 0x59, 0x04,
|
|
0x92, 0x05, 0x03, 0x05, 0x6D, 0x05, 0xCB, 0x06, 0x21, 0x06, 0x70);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x06, 0xBF, 0x07, 0x09, 0x07, 0x51, 0x07,
|
|
0x97, 0x07, 0xDB, 0x08, 0x61, 0x08, 0x64);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x9A, 0x01, 0x7F, 0x01, 0xC6, 0x02,
|
|
0x31, 0x02, 0x9C, 0x03, 0x06, 0x03, 0x67, 0x03, 0xB5, 0x04, 0x29);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x04, 0x97, 0x04, 0xFD, 0x05, 0x50, 0x05,
|
|
0x92, 0x06, 0x13, 0x06, 0x8F, 0x07, 0x00, 0x07, 0x66, 0x07, 0xC4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x08, 0x21, 0x08, 0x7F, 0x08, 0xDE, 0x09,
|
|
0x2F, 0x09, 0x81, 0x0A, 0x30, 0x0A, 0x35);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x28);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xD2, 0x01, 0x99, 0x01, 0xE7, 0x02,
|
|
0x34, 0x02, 0x7C, 0x02, 0xC5, 0x03, 0x0B, 0x03, 0x4A, 0x03, 0xAE);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x04, 0x07, 0x04, 0x5E, 0x04, 0xAE, 0x04,
|
|
0xF2, 0x05, 0x61, 0x05, 0xCD, 0x06, 0x33, 0x06, 0x8E, 0x06, 0xE0);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x07, 0x2D, 0x07, 0x79, 0x07, 0xC6, 0x08,
|
|
0x13, 0x08, 0x5E, 0x08, 0xE3, 0x08, 0xE6);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xA0, 0x01, 0x67, 0x01, 0xAF, 0x01, 0xE8,
|
|
0x02, 0x20, 0x02, 0x5D, 0x02, 0x9C, 0x02, 0xD7, 0x03, 0x34);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x03, 0x86, 0x03, 0xD3, 0x04, 0x1B, 0x04, 0x57,
|
|
0x04, 0xBA, 0x05, 0x1B, 0x05, 0x76, 0x05, 0xC7, 0x06, 0x12);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x06, 0x58, 0x06, 0x9D, 0x06, 0xDF, 0x07, 0x1F,
|
|
0x07, 0x5D, 0x07, 0xD5, 0x07, 0xD8);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x9A, 0x01, 0x61, 0x01, 0xB8, 0x02, 0x18,
|
|
0x02, 0x75, 0x02, 0xD2, 0x03, 0x2B, 0x03, 0x7A, 0x03, 0xEE);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x04, 0x51, 0x04, 0xAE, 0x05, 0x05, 0x05, 0x4D,
|
|
0x05, 0xC0, 0x06, 0x2F, 0x06, 0x99, 0x06, 0xFB, 0x07, 0x55);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x07, 0xA8, 0x07, 0xF9, 0x08, 0x4A, 0x08, 0x9C,
|
|
0x08, 0xEC, 0x09, 0x7A, 0x09, 0x7D);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x27);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xD2, 0x01, 0x74, 0x01, 0xD1, 0x02, 0x1B,
|
|
0x02, 0x57, 0x02, 0x92, 0x02, 0xCE, 0x03, 0x07, 0x03, 0x66);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0xB7, 0x03, 0xFF, 0x04, 0x46, 0x04, 0x8A,
|
|
0x04, 0xFC, 0x05, 0x56, 0x05, 0xAF, 0x06, 0x03, 0x06, 0x53);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x06, 0x9B, 0x06, 0xDE, 0x07, 0x1D, 0x07, 0x5B,
|
|
0x07, 0x9A, 0x08, 0x17, 0x08, 0x1A);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xA0, 0x01, 0x42, 0x01, 0x9B, 0x01, 0xD6,
|
|
0x02, 0x04, 0x02, 0x33, 0x02, 0x65, 0x02, 0x98, 0x02, 0xF1);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x03, 0x3C, 0x03, 0x7F, 0x03, 0xBE, 0x03, 0xFA,
|
|
0x04, 0x60, 0x04, 0xB0, 0x05, 0x00, 0x05, 0x4C, 0x05, 0x92);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x05, 0xD3, 0x06, 0x10, 0x06, 0x4A, 0x06, 0x82,
|
|
0x06, 0xB9, 0x07, 0x22, 0x07, 0x25);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x9A, 0x01, 0x3C, 0x01, 0xA0, 0x01, 0xF9,
|
|
0x02, 0x46, 0x02, 0x92, 0x02, 0xDD, 0x03, 0x25, 0x03, 0x9B);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0xF8, 0x04, 0x49, 0x04, 0x95, 0x04, 0xDD,
|
|
0x05, 0x57, 0x05, 0xB5, 0x06, 0x10, 0x06, 0x68, 0x06, 0xBB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x07, 0x0A, 0x07, 0x53, 0x07, 0x97, 0x07, 0xD9,
|
|
0x08, 0x1B, 0x08, 0xA0, 0x08, 0xA3);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x26);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xD2, 0x01, 0x41, 0x01, 0xA5, 0x01, 0xF2,
|
|
0x02, 0x23, 0x02, 0x4C, 0x02, 0x74, 0x02, 0x9D, 0x02, 0xED);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x32, 0x03, 0x71, 0x03, 0xA9, 0x03, 0xDB,
|
|
0x04, 0x3D, 0x04, 0x98, 0x04, 0xE5, 0x05, 0x28, 0x05, 0x65);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA2, 0x05, 0xDC, 0x06, 0x14, 0x06, 0x4B,
|
|
0x06, 0x7D, 0x06, 0xDB, 0x06, 0xDD);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xA0, 0x01, 0x0F, 0x01, 0x71, 0x01, 0xB5,
|
|
0x01, 0xDC, 0x01, 0xFB, 0x02, 0x1B, 0x02, 0x3C, 0x02, 0x81);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xC1, 0x02, 0xFB, 0x03, 0x2F, 0x03, 0x5E,
|
|
0x03, 0xB6, 0x04, 0x06, 0x04, 0x4C, 0x04, 0x87, 0x04, 0xBD);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF4, 0x05, 0x29, 0x05, 0x5B, 0x05, 0x8B,
|
|
0x05, 0xB8, 0x06, 0x0D, 0x06, 0x0F);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x9A, 0x01, 0x09, 0x01, 0x70, 0x01, 0xC8,
|
|
0x02, 0x03, 0x02, 0x38, 0x02, 0x6C, 0x02, 0x9F, 0x03, 0x04);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x5B, 0x03, 0xA8, 0x03, 0xE7, 0x04, 0x21,
|
|
0x04, 0x8B, 0x04, 0xEB, 0x05, 0x3F, 0x05, 0x85, 0x05, 0xC4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x02, 0x06, 0x3F, 0x06, 0x7A, 0x06, 0xB3,
|
|
0x06, 0xE9, 0x07, 0x4F, 0x07, 0x52);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x25);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xD2, 0x01, 0x41, 0x01, 0xA5, 0x01, 0xF2,
|
|
0x02, 0x23, 0x02, 0x4C, 0x02, 0x74, 0x02, 0x9D, 0x02, 0xED);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x32, 0x03, 0x71, 0x03, 0xA9, 0x03, 0xDB,
|
|
0x04, 0x3D, 0x04, 0x98, 0x04, 0xE5, 0x05, 0x28, 0x05, 0x65);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA2, 0x05, 0xDC, 0x06, 0x14, 0x06, 0x4B,
|
|
0x06, 0x7D, 0x06, 0xDB, 0x06, 0xDD);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xA0, 0x01, 0x0F, 0x01, 0x71, 0x01, 0xB5,
|
|
0x01, 0xDC, 0x01, 0xFB, 0x02, 0x1B, 0x02, 0x3C, 0x02, 0x81);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xC1, 0x02, 0xFB, 0x03, 0x2F, 0x03, 0x5E,
|
|
0x03, 0xB6, 0x04, 0x06, 0x04, 0x4C, 0x04, 0x87, 0x04, 0xBD);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF4, 0x05, 0x29, 0x05, 0x5B, 0x05, 0x8B,
|
|
0x05, 0xB8, 0x06, 0x0D, 0x06, 0x0F);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x9A, 0x01, 0x09, 0x01, 0x70, 0x01, 0xC8,
|
|
0x02, 0x03, 0x02, 0x38, 0x02, 0x6C, 0x02, 0x9F, 0x03, 0x04);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x5B, 0x03, 0xA8, 0x03, 0xE7, 0x04, 0x21,
|
|
0x04, 0x8B, 0x04, 0xEB, 0x05, 0x3F, 0x05, 0x85, 0x05, 0xC4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x02, 0x06, 0x3F, 0x06, 0x7A, 0x06, 0xB3,
|
|
0x06, 0xE9, 0x07, 0x4F, 0x07, 0x52);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x24);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xD2, 0x01, 0x41, 0x01, 0xA5, 0x01, 0xF2,
|
|
0x02, 0x23, 0x02, 0x4C, 0x02, 0x74, 0x02, 0x9D, 0x02, 0xED);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x32, 0x03, 0x71, 0x03, 0xA9, 0x03, 0xDB,
|
|
0x04, 0x3D, 0x04, 0x98, 0x04, 0xE5, 0x05, 0x28, 0x05, 0x65);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA2, 0x05, 0xDC, 0x06, 0x14, 0x06, 0x4B,
|
|
0x06, 0x7D, 0x06, 0xDB, 0x06, 0xDD);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xA0, 0x01, 0x0F, 0x01, 0x71, 0x01, 0xB5,
|
|
0x01, 0xDC, 0x01, 0xFB, 0x02, 0x1B, 0x02, 0x3C, 0x02, 0x81);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xC1, 0x02, 0xFB, 0x03, 0x2F, 0x03, 0x5E,
|
|
0x03, 0xB6, 0x04, 0x06, 0x04, 0x4C, 0x04, 0x87, 0x04, 0xBD);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF4, 0x05, 0x29, 0x05, 0x5B, 0x05, 0x8B,
|
|
0x05, 0xB8, 0x06, 0x0D, 0x06, 0x0F);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x9A, 0x01, 0x09, 0x01, 0x70, 0x01, 0xC8,
|
|
0x02, 0x03, 0x02, 0x38, 0x02, 0x6C, 0x02, 0x9F, 0x03, 0x04);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x5B, 0x03, 0xA8, 0x03, 0xE7, 0x04, 0x21,
|
|
0x04, 0x8B, 0x04, 0xEB, 0x05, 0x3F, 0x05, 0x85, 0x05, 0xC4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x02, 0x06, 0x3F, 0x06, 0x7A, 0x06, 0xB3,
|
|
0x06, 0xE9, 0x07, 0x4F, 0x07, 0x52);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x23);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xD2, 0x01, 0x41, 0x01, 0xA5, 0x01, 0xF2,
|
|
0x02, 0x23, 0x02, 0x4C, 0x02, 0x74, 0x02, 0x9D, 0x02, 0xED);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x32, 0x03, 0x71, 0x03, 0xA9, 0x03, 0xDB,
|
|
0x04, 0x3D, 0x04, 0x98, 0x04, 0xE5, 0x05, 0x28, 0x05, 0x65);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA2, 0x05, 0xDC, 0x06, 0x14, 0x06, 0x4B,
|
|
0x06, 0x7D, 0x06, 0xDB, 0x06, 0xDD);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xA0, 0x01, 0x0F, 0x01, 0x71, 0x01, 0xB5,
|
|
0x01, 0xDC, 0x01, 0xFB, 0x02, 0x1B, 0x02, 0x3C, 0x02, 0x81);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xC1, 0x02, 0xFB, 0x03, 0x2F, 0x03, 0x5E,
|
|
0x03, 0xB6, 0x04, 0x06, 0x04, 0x4C, 0x04, 0x87, 0x04, 0xBD);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF4, 0x05, 0x29, 0x05, 0x5B, 0x05, 0x8B,
|
|
0x05, 0xB8, 0x06, 0x0D, 0x06, 0x0F);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x9A, 0x01, 0x09, 0x01, 0x70, 0x01, 0xC8,
|
|
0x02, 0x03, 0x02, 0x38, 0x02, 0x6C, 0x02, 0x9F, 0x03, 0x04);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x5B, 0x03, 0xA8, 0x03, 0xE7, 0x04, 0x21,
|
|
0x04, 0x8B, 0x04, 0xEB, 0x05, 0x3F, 0x05, 0x85, 0x05, 0xC4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x02, 0x06, 0x3F, 0x06, 0x7A, 0x06, 0xB3,
|
|
0x06, 0xE9, 0x07, 0x4F, 0x07, 0x52);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x22);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xD2, 0x01, 0x41, 0x01, 0xA5, 0x01, 0xF2,
|
|
0x02, 0x23, 0x02, 0x4C, 0x02, 0x74, 0x02, 0x9D, 0x02, 0xED);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x32, 0x03, 0x71, 0x03, 0xA9, 0x03, 0xDB,
|
|
0x04, 0x3D, 0x04, 0x98, 0x04, 0xE5, 0x05, 0x28, 0x05, 0x65);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA2, 0x05, 0xDC, 0x06, 0x14, 0x06, 0x4B,
|
|
0x06, 0x7D, 0x06, 0xDB, 0x06, 0xDD);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xA0, 0x01, 0x0F, 0x01, 0x71, 0x01, 0xB5,
|
|
0x01, 0xDC, 0x01, 0xFB, 0x02, 0x1B, 0x02, 0x3C, 0x02, 0x81);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xC1, 0x02, 0xFB, 0x03, 0x2F, 0x03, 0x5E,
|
|
0x03, 0xB6, 0x04, 0x06, 0x04, 0x4C, 0x04, 0x87, 0x04, 0xBD);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF4, 0x05, 0x29, 0x05, 0x5B, 0x05, 0x8B,
|
|
0x05, 0xB8, 0x06, 0x0D, 0x06, 0x0F);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x9A, 0x01, 0x09, 0x01, 0x70, 0x01, 0xC8,
|
|
0x02, 0x03, 0x02, 0x38, 0x02, 0x6C, 0x02, 0x9F, 0x03, 0x04);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x5B, 0x03, 0xA8, 0x03, 0xE7, 0x04, 0x21,
|
|
0x04, 0x8B, 0x04, 0xEB, 0x05, 0x3F, 0x05, 0x85, 0x05, 0xC4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x02, 0x06, 0x3F, 0x06, 0x7A, 0x06, 0xB3,
|
|
0x06, 0xE9, 0x07, 0x4F, 0x07, 0x52);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x21);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xD2, 0x01, 0x41, 0x01, 0xA5, 0x01, 0xF2,
|
|
0x02, 0x23, 0x02, 0x4C, 0x02, 0x74, 0x02, 0x9D, 0x02, 0xED);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x32, 0x03, 0x71, 0x03, 0xA9, 0x03, 0xDB,
|
|
0x04, 0x3D, 0x04, 0x98, 0x04, 0xE5, 0x05, 0x28, 0x05, 0x65);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA2, 0x05, 0xDC, 0x06, 0x14, 0x06, 0x4B,
|
|
0x06, 0x7D, 0x06, 0xDB, 0x06, 0xDD);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xA0, 0x01, 0x0F, 0x01, 0x71, 0x01, 0xB5,
|
|
0x01, 0xDC, 0x01, 0xFB, 0x02, 0x1B, 0x02, 0x3C, 0x02, 0x81);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xC1, 0x02, 0xFB, 0x03, 0x2F, 0x03, 0x5E,
|
|
0x03, 0xB6, 0x04, 0x06, 0x04, 0x4C, 0x04, 0x87, 0x04, 0xBD);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF4, 0x05, 0x29, 0x05, 0x5B, 0x05, 0x8B,
|
|
0x05, 0xB8, 0x06, 0x0D, 0x06, 0x0F);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x9A, 0x01, 0x09, 0x01, 0x70, 0x01, 0xC8,
|
|
0x02, 0x03, 0x02, 0x38, 0x02, 0x6C, 0x02, 0x9F, 0x03, 0x04);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x5B, 0x03, 0xA8, 0x03, 0xE7, 0x04, 0x21,
|
|
0x04, 0x8B, 0x04, 0xEB, 0x05, 0x3F, 0x05, 0x85, 0x05, 0xC4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x02, 0x06, 0x3F, 0x06, 0x7A, 0x06, 0xB3,
|
|
0x06, 0xE9, 0x07, 0x4F, 0x07, 0x52);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x20);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xD2, 0x00, 0xE7, 0x01, 0x10, 0x01, 0x50,
|
|
0x01, 0x76, 0x01, 0x9B, 0x01, 0xB0, 0x01, 0xBE, 0x01, 0xDB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x01, 0xF6, 0x02, 0x08, 0x02, 0x1A, 0x02, 0x2B,
|
|
0x02, 0x4A, 0x02, 0x68, 0x02, 0x86, 0x02, 0xA4, 0x02, 0xC2);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x02, 0xE0, 0x02, 0xFC, 0x03, 0x16, 0x03, 0x2F,
|
|
0x03, 0x47, 0x03, 0x76, 0x03, 0x77);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0xA0, 0x00, 0xB5, 0x00, 0xDE, 0x01, 0x1E,
|
|
0x01, 0x43, 0x01, 0x67, 0x01, 0x7A, 0x01, 0x87, 0x01, 0xA1);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x01, 0xB8, 0x01, 0xC6, 0x01, 0xD5, 0x01, 0xE2,
|
|
0x01, 0xF9, 0x02, 0x11, 0x02, 0x29, 0x02, 0x42, 0x02, 0x5C);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x02, 0x76, 0x02, 0x8F, 0x02, 0xA7, 0x02, 0xBF,
|
|
0x02, 0xD5, 0x02, 0xFF, 0x03, 0x00);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x9A, 0x00, 0xAF, 0x00, 0xD8, 0x01, 0x19,
|
|
0x01, 0x3F, 0x01, 0x66, 0x01, 0x7C, 0x01, 0x8D, 0x01, 0xAE);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x01, 0xCC, 0x01, 0xE2, 0x01, 0xF8, 0x02, 0x0D,
|
|
0x02, 0x35, 0x02, 0x5C, 0x02, 0x82, 0x02, 0xA8, 0x02, 0xCE);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x02, 0xF4, 0x03, 0x17, 0x03, 0x37, 0x03, 0x58,
|
|
0x03, 0x75, 0x03, 0xAD, 0x03, 0xAE);
|
|
//60Hz gamma code);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x3B);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x02, 0xDA, 0x03, 0xD9, 0x03, 0xE0, 0x03, 0xEF,
|
|
0x03, 0xF9, 0x04, 0x00, 0x04, 0x06, 0x04, 0x0C, 0x04, 0x18);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x04, 0x29, 0x04, 0x3C, 0x04, 0x48, 0x04, 0x4C,
|
|
0x04, 0x53, 0x04, 0x63, 0x04, 0x73, 0x00, 0x00, 0x00, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
0x00, 0x00, 0x00, 0x4B, 0x0D, 0xAB);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x02, 0xE3, 0x03, 0xE2, 0x03, 0xE9, 0x03, 0xF7,
|
|
0x04, 0x00, 0x04, 0x05, 0x04, 0x09, 0x04, 0x0D, 0x04, 0x15);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x04, 0x19, 0x04, 0x1F, 0x04, 0x25, 0x04, 0x2A,
|
|
0x04, 0x47, 0x04, 0x5C, 0x04, 0x71, 0x00, 0x00, 0x00, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
0x00, 0x00, 0x01, 0xDD, 0x0D, 0xAB);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x02, 0xD4, 0x03, 0xD3, 0x03, 0xDB, 0x03, 0xEB,
|
|
0x03, 0xF6, 0x03, 0xFE, 0x04, 0x05, 0x04, 0x0C, 0x04, 0x1A);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x04, 0x26, 0x04, 0x3A, 0x04, 0x4B, 0x04, 0x4E,
|
|
0x04, 0x53, 0x04, 0x63, 0x04, 0x73, 0x00, 0x00, 0x00, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
0x00, 0x00, 0x00, 0x4B, 0x0D, 0xAB);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x3A);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xB8, 0x01, 0xB7, 0x01, 0xDF, 0x02, 0x48,
|
|
0x02, 0xA1, 0x02, 0xFD, 0x03, 0x58, 0x03, 0x9B, 0x04, 0x11);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x04, 0x85, 0x04, 0xDC, 0x05, 0x31, 0x05, 0x72,
|
|
0x05, 0xF4, 0x06, 0x76, 0x06, 0xDA, 0x07, 0x46, 0x07, 0xA8);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x08, 0x08, 0x08, 0x60, 0x08, 0xBA, 0x09, 0x0D,
|
|
0x09, 0x64, 0x0A, 0x1F, 0x0A, 0x22);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0x60, 0x01, 0x5F, 0x01, 0x88, 0x01, 0xE5,
|
|
0x02, 0x3B, 0x02, 0x8E, 0x02, 0xE1, 0x03, 0x22, 0x03, 0x8E);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x03, 0xF6, 0x04, 0x43, 0x04, 0x90, 0x04, 0xCB,
|
|
0x05, 0x3E, 0x05, 0xB1, 0x06, 0x0E, 0x06, 0x6A, 0x06, 0xBF);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x07, 0x14, 0x07, 0x63, 0x07, 0xB2, 0x07, 0xFB,
|
|
0x08, 0x43, 0x08, 0xDC, 0x08, 0xDF);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x67, 0x01, 0x66, 0x01, 0xA5, 0x02, 0x3C,
|
|
0x02, 0xAD, 0x03, 0x1E, 0x03, 0x90, 0x03, 0xDC, 0x04, 0x5B);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x04, 0xDA, 0x05, 0x35, 0x05, 0x90, 0x05, 0xD3,
|
|
0x06, 0x59, 0x06, 0xDF, 0x07, 0x4F, 0x07, 0xBF, 0x08, 0x25);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x08, 0x8F, 0x08, 0xF1, 0x09, 0x4E, 0x09, 0xAA,
|
|
0x0A, 0x0A, 0x0A, 0xD7, 0x0A, 0xDA);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x39);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xB8, 0x01, 0x9D, 0x01, 0xD9, 0x02, 0x35,
|
|
0x02, 0x88, 0x02, 0xDA, 0x03, 0x2C, 0x03, 0x74, 0x03, 0xE3);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x04, 0x4C, 0x04, 0xA8, 0x04, 0xF6, 0x05, 0x3E,
|
|
0x05, 0xB3, 0x06, 0x28, 0x06, 0x94, 0x06, 0xEF, 0x07, 0x4F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x07, 0xA7, 0x07, 0xFD, 0x08, 0x4D, 0x08, 0x9E,
|
|
0x08, 0xEA, 0x09, 0x88, 0x09, 0x8C);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0x60, 0x01, 0x45, 0x01, 0x82, 0x01, 0xD4,
|
|
0x02, 0x23, 0x02, 0x6E, 0x02, 0xB9, 0x02, 0xFC, 0x03, 0x63);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x03, 0xC2, 0x04, 0x15, 0x04, 0x5A, 0x04, 0x9C,
|
|
0x05, 0x04, 0x05, 0x6C, 0x05, 0xCC, 0x06, 0x20, 0x06, 0x72);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x06, 0xBE, 0x07, 0x0B, 0x07, 0x52, 0x07, 0x99,
|
|
0x07, 0xDD, 0x08, 0x60, 0x08, 0x63);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x67, 0x01, 0x4C, 0x01, 0x9B, 0x02, 0x21,
|
|
0x02, 0x8D, 0x02, 0xF3, 0x03, 0x59, 0x03, 0xB0, 0x04, 0x29);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x04, 0x9B, 0x04, 0xFF, 0x05, 0x50, 0x05, 0x9D,
|
|
0x06, 0x16, 0x06, 0x8E, 0x07, 0x00, 0x07, 0x65, 0x07, 0xC8);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x08, 0x24, 0x08, 0x83, 0x08, 0xDC, 0x09, 0x31,
|
|
0x09, 0x84, 0x0A, 0x31, 0x0A, 0x35);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x38);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xB8, 0x01, 0x7F, 0x01, 0xCD, 0x02, 0x20,
|
|
0x02, 0x6A, 0x02, 0xB2, 0x02, 0xF9, 0x03, 0x3E, 0x03, 0xAB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x04, 0x09, 0x04, 0x61, 0x04, 0xB0, 0x04, 0xF4,
|
|
0x05, 0x67, 0x05, 0xCD, 0x06, 0x32, 0x06, 0x90, 0x06, 0xDF);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x07, 0x32, 0x07, 0x81, 0x07, 0xCC, 0x08, 0x15,
|
|
0x08, 0x5B, 0x08, 0xE3, 0x08, 0xE6);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0x60, 0x01, 0x27, 0x01, 0x76, 0x01, 0xC1,
|
|
0x02, 0x07, 0x02, 0x49, 0x02, 0x8A, 0x02, 0xCA, 0x03, 0x2F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x03, 0x85, 0x03, 0xD5, 0x04, 0x1C, 0x04, 0x58,
|
|
0x04, 0xC1, 0x05, 0x1B, 0x05, 0x75, 0x05, 0xC8, 0x06, 0x12);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x06, 0x59, 0x06, 0x9D, 0x06, 0xE0, 0x07, 0x21,
|
|
0x07, 0x5E, 0x07, 0xD7, 0x07, 0xDA);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x67, 0x01, 0x2E, 0x01, 0x8B, 0x02, 0x02,
|
|
0x02, 0x66, 0x02, 0xC1, 0x03, 0x1A, 0x03, 0x6E, 0x03, 0xEC);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x04, 0x52, 0x04, 0xB2, 0x05, 0x07, 0x05, 0x4D,
|
|
0x05, 0xC8, 0x06, 0x31, 0x06, 0x98, 0x06, 0xFB, 0x07, 0x54);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x07, 0xAA, 0x07, 0xFC, 0x08, 0x4D, 0x08, 0x9E,
|
|
0x08, 0xEB, 0x09, 0x7D, 0x09, 0x80);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x37);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xB8, 0x01, 0x5A, 0x01, 0xB7, 0x02, 0x05,
|
|
0x02, 0x44, 0x02, 0x80, 0x02, 0xBB, 0x02, 0xF5, 0x03, 0x5D);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0xB4, 0x04, 0x01, 0x04, 0x49, 0x04, 0x8C,
|
|
0x04, 0xFE, 0x05, 0x5C, 0x05, 0xB0, 0x06, 0x03, 0x06, 0x53);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x06, 0x9D, 0x06, 0xDD, 0x07, 0x21, 0x07, 0x62,
|
|
0x07, 0xA1, 0x08, 0x19, 0x08, 0x1C);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0x60, 0x01, 0x02, 0x01, 0x60, 0x01, 0xA9,
|
|
0x01, 0xE3, 0x02, 0x1B, 0x02, 0x51, 0x02, 0x86, 0x02, 0xE7);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x03, 0x38, 0x03, 0x7E, 0x03, 0xBF, 0x03, 0xFC,
|
|
0x04, 0x61, 0x04, 0xB7, 0x05, 0x02, 0x05, 0x4B, 0x05, 0x92);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x05, 0xD4, 0x06, 0x10, 0x06, 0x4A, 0x06, 0x82,
|
|
0x06, 0xB9, 0x07, 0x24, 0x07, 0x27);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x67, 0x01, 0x09, 0x01, 0x71, 0x01, 0xDC,
|
|
0x02, 0x33, 0x02, 0x82, 0x02, 0xCC, 0x03, 0x14, 0x03, 0x92);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0xF6, 0x04, 0x49, 0x04, 0x98, 0x04, 0xE0,
|
|
0x05, 0x58, 0x05, 0xBC, 0x06, 0x13, 0x06, 0x68, 0x06, 0xBA);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x07, 0x0A, 0x07, 0x52, 0x07, 0x98, 0x07, 0xDC,
|
|
0x08, 0x1E, 0x08, 0xA2, 0x08, 0xA5);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x36);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xB8, 0x01, 0x27, 0x01, 0x8B, 0x01, 0xDA,
|
|
0x02, 0x0D, 0x02, 0x38, 0x02, 0x62, 0x02, 0x8B, 0x02, 0xDB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x24, 0x03, 0x69, 0x03, 0xA4, 0x03, 0xDB,
|
|
0x04, 0x40, 0x04, 0x9A, 0x04, 0xE7, 0x05, 0x2C, 0x05, 0x6A);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA3, 0x05, 0xDC, 0x06, 0x14, 0x06, 0x4B,
|
|
0x06, 0x7E, 0x06, 0xDA, 0x06, 0xDC);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0x60, 0x00, 0xCF, 0x01, 0x33, 0x01, 0x81,
|
|
0x01, 0xB0, 0x01, 0xD8, 0x01, 0xFF, 0x02, 0x25, 0x02, 0x6E);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xB2, 0x02, 0xF2, 0x03, 0x2A, 0x03, 0x5B,
|
|
0x03, 0xB7, 0x04, 0x08, 0x04, 0x4D, 0x04, 0x8B, 0x04, 0xC4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF7, 0x05, 0x29, 0x05, 0x5A, 0x05, 0x8B,
|
|
0x05, 0xB9, 0x06, 0x0D, 0x06, 0x0F);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x67, 0x00, 0xD6, 0x01, 0x40, 0x01, 0xA1,
|
|
0x01, 0xE7, 0x02, 0x23, 0x02, 0x5A, 0x02, 0x8F, 0x02, 0xF3);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x4D, 0x03, 0xA0, 0x03, 0xE4, 0x04, 0x20,
|
|
0x04, 0x8E, 0x04, 0xEE, 0x05, 0x40, 0x05, 0x88, 0x05, 0xCB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x06, 0x06, 0x40, 0x06, 0x7A, 0x06, 0xB2,
|
|
0x06, 0xE9, 0x07, 0x4E, 0x07, 0x51);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x35);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xB8, 0x01, 0x27, 0x01, 0x8B, 0x01, 0xDA,
|
|
0x02, 0x0D, 0x02, 0x38, 0x02, 0x62, 0x02, 0x8B, 0x02, 0xDB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x24, 0x03, 0x69, 0x03, 0xA4, 0x03, 0xDB,
|
|
0x04, 0x40, 0x04, 0x9A, 0x04, 0xE7, 0x05, 0x2C, 0x05, 0x6A);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA3, 0x05, 0xDC, 0x06, 0x14, 0x06, 0x4B,
|
|
0x06, 0x7E, 0x06, 0xDA, 0x06, 0xDC);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0x60, 0x00, 0xCF, 0x01, 0x33, 0x01, 0x81,
|
|
0x01, 0xB0, 0x01, 0xD8, 0x01, 0xFF, 0x02, 0x25, 0x02, 0x6E);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xB2, 0x02, 0xF2, 0x03, 0x2A, 0x03, 0x5B,
|
|
0x03, 0xB7, 0x04, 0x08, 0x04, 0x4D, 0x04, 0x8B, 0x04, 0xC4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF7, 0x05, 0x29, 0x05, 0x5A, 0x05, 0x8B,
|
|
0x05, 0xB9, 0x06, 0x0D, 0x06, 0x0F);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x67, 0x00, 0xD6, 0x01, 0x40, 0x01, 0xA1,
|
|
0x01, 0xE7, 0x02, 0x23, 0x02, 0x5A, 0x02, 0x8F, 0x02, 0xF3);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x4D, 0x03, 0xA0, 0x03, 0xE4, 0x04, 0x20,
|
|
0x04, 0x8E, 0x04, 0xEE, 0x05, 0x40, 0x05, 0x88, 0x05, 0xCB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x06, 0x06, 0x40, 0x06, 0x7A, 0x06, 0xB2,
|
|
0x06, 0xE9, 0x07, 0x4E, 0x07, 0x51);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x34);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xB8, 0x01, 0x27, 0x01, 0x8B, 0x01, 0xDA,
|
|
0x02, 0x0D, 0x02, 0x38, 0x02, 0x62, 0x02, 0x8B, 0x02, 0xDB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x24, 0x03, 0x69, 0x03, 0xA4, 0x03, 0xDB,
|
|
0x04, 0x40, 0x04, 0x9A, 0x04, 0xE7, 0x05, 0x2C, 0x05, 0x6A);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA3, 0x05, 0xDC, 0x06, 0x14, 0x06, 0x4B,
|
|
0x06, 0x7E, 0x06, 0xDA, 0x06, 0xDC);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0x60, 0x00, 0xCF, 0x01, 0x33, 0x01, 0x81,
|
|
0x01, 0xB0, 0x01, 0xD8, 0x01, 0xFF, 0x02, 0x25, 0x02, 0x6E);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xB2, 0x02, 0xF2, 0x03, 0x2A, 0x03, 0x5B,
|
|
0x03, 0xB7, 0x04, 0x08, 0x04, 0x4D, 0x04, 0x8B, 0x04, 0xC4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF7, 0x05, 0x29, 0x05, 0x5A, 0x05, 0x8B,
|
|
0x05, 0xB9, 0x06, 0x0D, 0x06, 0x0F);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x67, 0x00, 0xD6, 0x01, 0x40, 0x01, 0xA1,
|
|
0x01, 0xE7, 0x02, 0x23, 0x02, 0x5A, 0x02, 0x8F, 0x02, 0xF3);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x4D, 0x03, 0xA0, 0x03, 0xE4, 0x04, 0x20,
|
|
0x04, 0x8E, 0x04, 0xEE, 0x05, 0x40, 0x05, 0x88, 0x05, 0xCB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x06, 0x06, 0x40, 0x06, 0x7A, 0x06, 0xB2,
|
|
0x06, 0xE9, 0x07, 0x4E, 0x07, 0x51);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x33);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xB8, 0x01, 0x27, 0x01, 0x8B, 0x01, 0xDA,
|
|
0x02, 0x0D, 0x02, 0x38, 0x02, 0x62, 0x02, 0x8B, 0x02, 0xDB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x24, 0x03, 0x69, 0x03, 0xA4, 0x03, 0xDB,
|
|
0x04, 0x40, 0x04, 0x9A, 0x04, 0xE7, 0x05, 0x2C, 0x05, 0x6A);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA3, 0x05, 0xDC, 0x06, 0x14, 0x06, 0x4B,
|
|
0x06, 0x7E, 0x06, 0xDA, 0x06, 0xDC);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0x60, 0x00, 0xCF, 0x01, 0x33, 0x01, 0x81,
|
|
0x01, 0xB0, 0x01, 0xD8, 0x01, 0xFF, 0x02, 0x25, 0x02, 0x6E);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xB2, 0x02, 0xF2, 0x03, 0x2A, 0x03, 0x5B,
|
|
0x03, 0xB7, 0x04, 0x08, 0x04, 0x4D, 0x04, 0x8B, 0x04, 0xC4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF7, 0x05, 0x29, 0x05, 0x5A, 0x05, 0x8B,
|
|
0x05, 0xB9, 0x06, 0x0D, 0x06, 0x0F);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x67, 0x00, 0xD6, 0x01, 0x40, 0x01, 0xA1,
|
|
0x01, 0xE7, 0x02, 0x23, 0x02, 0x5A, 0x02, 0x8F, 0x02, 0xF3);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x4D, 0x03, 0xA0, 0x03, 0xE4, 0x04, 0x20,
|
|
0x04, 0x8E, 0x04, 0xEE, 0x05, 0x40, 0x05, 0x88, 0x05, 0xCB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x06, 0x06, 0x40, 0x06, 0x7A, 0x06, 0xB2,
|
|
0x06, 0xE9, 0x07, 0x4E, 0x07, 0x51);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x32);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xB8, 0x01, 0x27, 0x01, 0x8B, 0x01, 0xDA,
|
|
0x02, 0x0D, 0x02, 0x38, 0x02, 0x62, 0x02, 0x8B, 0x02, 0xDB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x24, 0x03, 0x69, 0x03, 0xA4, 0x03, 0xDB,
|
|
0x04, 0x40, 0x04, 0x9A, 0x04, 0xE7, 0x05, 0x2C, 0x05, 0x6A);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA3, 0x05, 0xDC, 0x06, 0x14, 0x06, 0x4B,
|
|
0x06, 0x7E, 0x06, 0xDA, 0x06, 0xDC);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0x60, 0x00, 0xCF, 0x01, 0x33, 0x01, 0x81,
|
|
0x01, 0xB0, 0x01, 0xD8, 0x01, 0xFF, 0x02, 0x25, 0x02, 0x6E);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xB2, 0x02, 0xF2, 0x03, 0x2A, 0x03, 0x5B,
|
|
0x03, 0xB7, 0x04, 0x08, 0x04, 0x4D, 0x04, 0x8B, 0x04, 0xC4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF7, 0x05, 0x29, 0x05, 0x5A, 0x05, 0x8B,
|
|
0x05, 0xB9, 0x06, 0x0D, 0x06, 0x0F);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x67, 0x00, 0xD6, 0x01, 0x40, 0x01, 0xA1,
|
|
0x01, 0xE7, 0x02, 0x23, 0x02, 0x5A, 0x02, 0x8F, 0x02, 0xF3);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x4D, 0x03, 0xA0, 0x03, 0xE4, 0x04, 0x20,
|
|
0x04, 0x8E, 0x04, 0xEE, 0x05, 0x40, 0x05, 0x88, 0x05, 0xCB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x06, 0x06, 0x40, 0x06, 0x7A, 0x06, 0xB2,
|
|
0x06, 0xE9, 0x07, 0x4E, 0x07, 0x51);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x31);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xB8, 0x01, 0x27, 0x01, 0x8B, 0x01, 0xDA,
|
|
0x02, 0x0D, 0x02, 0x38, 0x02, 0x62, 0x02, 0x8B, 0x02, 0xDB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x03, 0x24, 0x03, 0x69, 0x03, 0xA4, 0x03, 0xDB,
|
|
0x04, 0x40, 0x04, 0x9A, 0x04, 0xE7, 0x05, 0x2C, 0x05, 0x6A);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x05, 0xA3, 0x05, 0xDC, 0x06, 0x14, 0x06, 0x4B,
|
|
0x06, 0x7E, 0x06, 0xDA, 0x06, 0xDC);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0x60, 0x00, 0xCF, 0x01, 0x33, 0x01, 0x81,
|
|
0x01, 0xB0, 0x01, 0xD8, 0x01, 0xFF, 0x02, 0x25, 0x02, 0x6E);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x02, 0xB2, 0x02, 0xF2, 0x03, 0x2A, 0x03, 0x5B,
|
|
0x03, 0xB7, 0x04, 0x08, 0x04, 0x4D, 0x04, 0x8B, 0x04, 0xC4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x04, 0xF7, 0x05, 0x29, 0x05, 0x5A, 0x05, 0x8B,
|
|
0x05, 0xB9, 0x06, 0x0D, 0x06, 0x0F);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x67, 0x00, 0xD6, 0x01, 0x40, 0x01, 0xA1,
|
|
0x01, 0xE7, 0x02, 0x23, 0x02, 0x5A, 0x02, 0x8F, 0x02, 0xF3);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x03, 0x4D, 0x03, 0xA0, 0x03, 0xE4, 0x04, 0x20,
|
|
0x04, 0x8E, 0x04, 0xEE, 0x05, 0x40, 0x05, 0x88, 0x05, 0xCB);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x06, 0x06, 0x06, 0x40, 0x06, 0x7A, 0x06, 0xB2,
|
|
0x06, 0xE9, 0x07, 0x4E, 0x07, 0x51);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBF, 0x30);
|
|
//R+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB0, 0x00, 0xB8, 0x00, 0xCD, 0x00, 0xF6, 0x01, 0x36,
|
|
0x01, 0x5C, 0x01, 0x81, 0x01, 0x96, 0x01, 0xA5, 0x01, 0xC2);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB1, 0x01, 0xDE, 0x01, 0xF1, 0x02, 0x04, 0x02, 0x15,
|
|
0x02, 0x36, 0x02, 0x55, 0x02, 0x74, 0x02, 0x92, 0x02, 0xB0);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x02, 0xCE, 0x02, 0xEB, 0x03, 0x06, 0x03, 0x21,
|
|
0x03, 0x3B, 0x03, 0x6E, 0x03, 0x6F);
|
|
//G+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0x60, 0x00, 0x75, 0x00, 0x9E, 0x00, 0xDE,
|
|
0x01, 0x04, 0x01, 0x29, 0x01, 0x3E, 0x01, 0x4C, 0x01, 0x6A);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x01, 0x84, 0x01, 0x96, 0x01, 0xA8, 0x01, 0xB8,
|
|
0x01, 0xD6, 0x01, 0xF3, 0x02, 0x10, 0x02, 0x2C, 0x02, 0x47);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB5, 0x02, 0x62, 0x02, 0x7D, 0x02, 0x96, 0x02, 0xAF,
|
|
0x02, 0xC8, 0x02, 0xF7, 0x02, 0xF8);
|
|
//B+);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB6, 0x00, 0x67, 0x00, 0x7C, 0x00, 0xA5, 0x00, 0xE6,
|
|
0x01, 0x0E, 0x01, 0x36, 0x01, 0x4D, 0x01, 0x60, 0x01, 0x84);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB7, 0x01, 0xA6, 0x01, 0xC0, 0x01, 0xDA, 0x01, 0xF3,
|
|
0x02, 0x20, 0x02, 0x49, 0x02, 0x71, 0x02, 0x98, 0x02, 0xBE);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB8, 0x02, 0xE3, 0x03, 0x06, 0x03, 0x28, 0x03, 0x4A,
|
|
0x03, 0x69, 0x03, 0xA6, 0x03, 0xA7);
|
|
//By Gamma Update Echo);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xCE, 0x01);
|
|
//By 26h/51h/38h/39h Change);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xCC, 0x00);
|
|
|
|
//CMD2_Page0);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x00, 0x08, 0x00, 0x18, 0x00, 0x18, 0x00,
|
|
0x31, 0x00, 0x31, 0x00, 0x62, 0x00, 0x62, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0x46, 0x01,
|
|
0x46, 0x01, 0x47, 0x01, 0x47, 0x02, 0xF5, 0x02, 0xF5, 0x04, 0xA3);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x20);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB3, 0x04, 0xA3, 0x06, 0x51, 0x06, 0x51, 0x07,
|
|
0xFF, 0x07, 0xFF, 0x0F, 0xFF);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x08, 0xE0, 0x08, 0xE0, 0x08, 0x70, 0x08,
|
|
0x70, 0x07, 0xC0, 0x07, 0xC0, 0x06, 0x6C, 0x06, 0x6C, 0x03, 0xDC, 0x03, 0xDC, 0x00,
|
|
0x34, 0x00, 0x34, 0x00, 0x30, 0x00, 0x30, 0x00, 0x30, 0x00, 0x30);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x20);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB4, 0x00, 0x30, 0x00, 0x30, 0x00, 0x30, 0x00,
|
|
0x30, 0x00, 0x30, 0x00, 0x30, 0x00, 0x30);
|
|
|
|
//CMD2_Page2);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x02);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB9, 0x00, 0x04, 0x00, 0x0C, 0x00, 0x1C, 0x00,
|
|
0x2C, 0x00, 0x3C, 0x00, 0x4C, 0x00, 0x5C, 0x00, 0x7C, 0x00, 0x9C, 0x00, 0xBC, 0x00,
|
|
0xDC, 0x00, 0xFC);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBA, 0x01, 0x3C, 0x01, 0x7C, 0x01, 0xBC, 0x01,
|
|
0xFC, 0x02, 0x3C, 0x02, 0x7C, 0x02, 0xBC, 0x02, 0xFC, 0x03, 0x3C, 0x03, 0x7C, 0x03,
|
|
0xFC, 0x03, 0xFF);
|
|
}
|
|
|
|
static void lcm_panel_init(struct nt37801_lcm *ctx)
|
|
{
|
|
ctx->reset_gpio =
|
|
devm_gpiod_get(ctx->dev, "reset", GPIOD_OUT_HIGH);
|
|
if (IS_ERR(ctx->reset_gpio)) {
|
|
dev_info(ctx->dev, "%s: cannot get reset_gpio %ld\n",
|
|
__func__, PTR_ERR(ctx->reset_gpio));
|
|
return;
|
|
}
|
|
gpiod_set_value(ctx->reset_gpio, 0);
|
|
udelay(15 * 1000);
|
|
gpiod_set_value(ctx->reset_gpio, 1);
|
|
udelay(1 * 1000);
|
|
gpiod_set_value(ctx->reset_gpio, 0);
|
|
udelay(10 * 1000);
|
|
gpiod_set_value(ctx->reset_gpio, 1);
|
|
udelay(10 * 1000);
|
|
devm_gpiod_put(ctx->dev, ctx->reset_gpio);
|
|
|
|
lcm_init_code(ctx);
|
|
|
|
lcm_gamma_init(ctx);
|
|
|
|
switch (current_fps) {
|
|
case 120:
|
|
push_table(ctx, fhdplus120_init_setting, sizeof(fhdplus120_init_setting) /
|
|
sizeof(struct LCM_setting_table));
|
|
break;
|
|
case 96:
|
|
push_table(ctx, fhdplus96_init_setting, sizeof(fhdplus96_init_setting) /
|
|
sizeof(struct LCM_setting_table));
|
|
break;
|
|
case 80:
|
|
push_table(ctx, fhdplus80_init_setting, sizeof(fhdplus80_init_setting) /
|
|
sizeof(struct LCM_setting_table));
|
|
break;
|
|
case 60:
|
|
push_table(ctx, fhdplus60_init_setting, sizeof(fhdplus60_init_setting) /
|
|
sizeof(struct LCM_setting_table));
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
pr_info("%s-\n", __func__);
|
|
}
|
|
|
|
static int nt37801_lcm_disable(struct drm_panel *panel)
|
|
{
|
|
struct nt37801_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
if (!ctx->enabled)
|
|
return 0;
|
|
|
|
if (ctx->backlight) {
|
|
ctx->backlight->props.power = FB_BLANK_POWERDOWN;
|
|
backlight_update_status(ctx->backlight);
|
|
}
|
|
|
|
ctx->enabled = false;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int nt37801_lcm_unprepare(struct drm_panel *panel)
|
|
{
|
|
struct nt37801_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
if (!ctx->prepared)
|
|
return 0;
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x28);
|
|
msleep(50);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x10);
|
|
msleep(150);
|
|
|
|
/*
|
|
* ctx->reset_gpio = devm_gpiod_get(ctx->dev, "reset", GPIOD_OUT_HIGH);
|
|
* gpiod_set_value(ctx->reset_gpio, 0);
|
|
* devm_gpiod_put(ctx->dev, ctx->reset_gpio);
|
|
*/
|
|
if (ctx->gate_ic == 0) {
|
|
ctx->bias_neg =
|
|
devm_gpiod_get_index(ctx->dev, "bias", 1, GPIOD_OUT_HIGH);
|
|
gpiod_set_value(ctx->bias_neg, 0);
|
|
devm_gpiod_put(ctx->dev, ctx->bias_neg);
|
|
|
|
usleep_range(2000, 2001);
|
|
|
|
ctx->bias_pos =
|
|
devm_gpiod_get_index(ctx->dev, "bias", 0, GPIOD_OUT_HIGH);
|
|
gpiod_set_value(ctx->bias_pos, 0);
|
|
devm_gpiod_put(ctx->dev, ctx->bias_pos);
|
|
} else if (ctx->gate_ic == 4831) {
|
|
_gate_ic_i2c_panel_bias_enable(0);
|
|
_gate_ic_Power_off();
|
|
}
|
|
ctx->error = 0;
|
|
ctx->prepared = false;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int nt37801_lcm_prepare(struct drm_panel *panel)
|
|
{
|
|
struct nt37801_lcm *ctx = panel_to_lcm(panel);
|
|
int ret;
|
|
|
|
pr_info("%s+\n", __func__);
|
|
if (ctx->prepared)
|
|
return 0;
|
|
|
|
// lcd reset H -> L -> L
|
|
ctx->reset_gpio = devm_gpiod_get(ctx->dev, "reset", GPIOD_OUT_HIGH);
|
|
gpiod_set_value(ctx->reset_gpio, 1);
|
|
usleep_range(10000, 10001);
|
|
gpiod_set_value(ctx->reset_gpio, 0);
|
|
msleep(20);
|
|
gpiod_set_value(ctx->reset_gpio, 1);
|
|
devm_gpiod_put(ctx->dev, ctx->reset_gpio);
|
|
// end
|
|
if (ctx->gate_ic == 0) {
|
|
ctx->bias_pos =
|
|
devm_gpiod_get_index(ctx->dev, "bias", 0, GPIOD_OUT_HIGH);
|
|
gpiod_set_value(ctx->bias_pos, 1);
|
|
devm_gpiod_put(ctx->dev, ctx->bias_pos);
|
|
|
|
usleep_range(2000, 2001);
|
|
ctx->bias_neg =
|
|
devm_gpiod_get_index(ctx->dev, "bias", 1, GPIOD_OUT_HIGH);
|
|
gpiod_set_value(ctx->bias_neg, 1);
|
|
devm_gpiod_put(ctx->dev, ctx->bias_neg);
|
|
} else if (ctx->gate_ic == 4831) {
|
|
_gate_ic_Power_on();
|
|
_gate_ic_i2c_panel_bias_enable(1);
|
|
}
|
|
#ifndef BYPASSI2C
|
|
_lcm_i2c_write_bytes(0x0, 0xf);
|
|
_lcm_i2c_write_bytes(0x1, 0xf);
|
|
#endif
|
|
lcm_panel_init(ctx);
|
|
|
|
ret = ctx->error;
|
|
if (ret < 0)
|
|
nt37801_lcm_unprepare(panel);
|
|
|
|
ctx->prepared = true;
|
|
|
|
#if defined(CONFIG_MTK_PANEL_EXT)
|
|
mtk_panel_tch_rst(panel);
|
|
#endif
|
|
#ifdef PANEL_SUPPORT_READBACK
|
|
lcm_panel_get_data(ctx);
|
|
#endif
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int nt37801_lcm_enable(struct drm_panel *panel)
|
|
{
|
|
struct nt37801_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
if (ctx->enabled)
|
|
return 0;
|
|
|
|
if (ctx->backlight) {
|
|
ctx->backlight->props.power = FB_BLANK_UNBLANK;
|
|
backlight_update_status(ctx->backlight);
|
|
}
|
|
|
|
ctx->enabled = true;
|
|
|
|
return 0;
|
|
}
|
|
|
|
//RTE60
|
|
static const struct drm_display_mode default_mode = {
|
|
.clock = 166300,
|
|
.hdisplay = HACT_FHDP,
|
|
.hsync_start = HACT_FHDP + MODE1_HFP,
|
|
.hsync_end = HACT_FHDP + MODE1_HFP + MODE1_HSA,
|
|
.htotal = HACT_FHDP + MODE1_HFP + MODE1_HSA + MODE1_HBP,
|
|
.vdisplay = VACT_FHDP,
|
|
.vsync_start = VACT_FHDP + MODE1_VFP,
|
|
.vsync_end = VACT_FHDP + MODE1_VFP + MODE1_VSA,
|
|
.vtotal = VACT_FHDP + MODE1_VFP + MODE1_VSA + MODE1_VBP,
|
|
};
|
|
|
|
//RTE80
|
|
static const struct drm_display_mode performance_mode = {
|
|
.clock = 221300,
|
|
.hdisplay = HACT_FHDP,
|
|
.hsync_start = HACT_FHDP + MODE1_HFP,
|
|
.hsync_end = HACT_FHDP + MODE1_HFP + MODE1_HSA,
|
|
.htotal = HACT_FHDP + MODE1_HFP + MODE1_HSA + MODE1_HBP,
|
|
.vdisplay = VACT_FHDP,
|
|
.vsync_start = VACT_FHDP + MODE1_VFP,
|
|
.vsync_end = VACT_FHDP + MODE1_VFP + MODE1_VSA,
|
|
.vtotal = VACT_FHDP + MODE1_VFP + MODE1_VSA + MODE1_VBP,
|
|
};
|
|
|
|
//RTE96
|
|
static const struct drm_display_mode performance_mode1 = {
|
|
.clock = 266300,
|
|
.hdisplay = HACT_FHDP,
|
|
.hsync_start = HACT_FHDP + MODE1_HFP,
|
|
.hsync_end = HACT_FHDP + MODE1_HFP + MODE1_HSA,
|
|
.htotal = HACT_FHDP + MODE1_HFP + MODE1_HSA + MODE1_HBP,
|
|
.vdisplay = VACT_FHDP,
|
|
.vsync_start = VACT_FHDP + MODE1_VFP,
|
|
.vsync_end = VACT_FHDP + MODE1_VFP + MODE1_VSA,
|
|
.vtotal = VACT_FHDP + MODE1_VFP + MODE1_VSA + MODE1_VBP,
|
|
};
|
|
|
|
//RTE120
|
|
static const struct drm_display_mode performance_mode2 = {
|
|
.clock = 332600,
|
|
.hdisplay = HACT_FHDP,
|
|
.hsync_start = HACT_FHDP + MODE1_HFP,
|
|
.hsync_end = HACT_FHDP + MODE1_HFP + MODE1_HSA,
|
|
.htotal = HACT_FHDP + MODE1_HFP + MODE1_HSA + MODE1_HBP,
|
|
.vdisplay = VACT_FHDP,
|
|
.vsync_start = VACT_FHDP + MODE1_VFP,
|
|
.vsync_end = VACT_FHDP + MODE1_VFP + MODE1_VSA,
|
|
.vtotal = VACT_FHDP + MODE1_VFP + MODE1_VSA + MODE1_VBP,
|
|
};
|
|
|
|
#if defined(CONFIG_MTK_PANEL_EXT)
|
|
//RTE60
|
|
static struct mtk_panel_params ext_params = {
|
|
.pll_clk = 420,
|
|
.cust_esd_check = 0,
|
|
.esd_check_enable = 1,
|
|
.lcm_esd_check_table[0] = {
|
|
.cmd = 0x0a,
|
|
.count = 1,
|
|
.para_list[0] = 0x1c,
|
|
},
|
|
.lcm_color_mode = MTK_DRM_COLOR_MODE_DISPLAY_P3,
|
|
.physical_width_um = 70200,
|
|
.physical_height_um = 152100,
|
|
.output_mode = MTK_PANEL_DSC_SINGLE_PORT,
|
|
.dsc_params = {
|
|
.enable = 1,
|
|
.ver = 17,
|
|
.slice_mode = 0,
|
|
.rgb_swap = 0,
|
|
.dsc_cfg = 40,
|
|
.rct_on = 1,
|
|
.bit_per_channel = 10,
|
|
.dsc_line_buf_depth = 11,
|
|
.bp_enable = 1,
|
|
.bit_per_pixel = 128,
|
|
.pic_height = 2400,
|
|
.pic_width = 1080,
|
|
.slice_height = 12,
|
|
.slice_width = 1080,
|
|
.chunk_size = 1080,
|
|
.xmit_delay = 512,
|
|
.dec_delay = 796,
|
|
.scale_value = 32,
|
|
.increment_interval = 382,
|
|
.decrement_interval = 15,
|
|
.line_bpg_offset = 12,
|
|
.nfl_bpg_offset = 2235,
|
|
.slice_bpg_offset = 1085,
|
|
.initial_offset = 6144,
|
|
.final_offset = 4336,
|
|
.flatness_minqp = 3,
|
|
.flatness_maxqp = 12,
|
|
.rc_model_size = 8192,
|
|
.rc_edge_factor = 6,
|
|
.rc_quant_incr_limit0 = 11,
|
|
.rc_quant_incr_limit1 = 11,
|
|
.rc_tgt_offset_hi = 3,
|
|
.rc_tgt_offset_lo = 3,
|
|
},
|
|
.data_rate = DATA_RATE,
|
|
|
|
/*Msync 2.0*/
|
|
.msync2_enable = 1,
|
|
.msync_cmd_table = {
|
|
.te_type = REQUEST_TE,
|
|
.msync_max_fps = 120,
|
|
.msync_min_fps = 43,
|
|
.msync_level_num = 20,
|
|
.delay_frame_num = 2,
|
|
.request_te_tb = {
|
|
|
|
/* Request-TE level */
|
|
.rte_te_level[0] = {
|
|
.level_id = 0,
|
|
.level_fps = 60,
|
|
.max_fps = 60,
|
|
.min_fps = 48,
|
|
},
|
|
.rte_te_level[1] = {
|
|
.level_id = 1,
|
|
.level_fps = 80,
|
|
.max_fps = 80,
|
|
.min_fps = 60,
|
|
},
|
|
.rte_te_level[2] = {
|
|
.level_id = 3,
|
|
.level_fps = 120,
|
|
.max_fps = 120,
|
|
.min_fps = 80,
|
|
},
|
|
},
|
|
},
|
|
|
|
};
|
|
|
|
//RTE80
|
|
//RTE120
|
|
static struct mtk_panel_params ext_params_120hz = {
|
|
.pll_clk = 420,
|
|
.cust_esd_check = 0,
|
|
.esd_check_enable = 1,
|
|
.lcm_esd_check_table[0] = {
|
|
.cmd = 0x0a,
|
|
.count = 1,
|
|
.para_list[0] = 0x1c,
|
|
},
|
|
.lcm_color_mode = MTK_DRM_COLOR_MODE_DISPLAY_P3,
|
|
.physical_width_um = 70200,
|
|
.physical_height_um = 152100,
|
|
.output_mode = MTK_PANEL_DSC_SINGLE_PORT,
|
|
.dsc_params = {
|
|
.enable = 1,
|
|
.ver = 17,
|
|
.slice_mode = 0,
|
|
.rgb_swap = 0,
|
|
.dsc_cfg = 40,
|
|
.rct_on = 1,
|
|
.bit_per_channel = 10,
|
|
.dsc_line_buf_depth = 11,
|
|
.bp_enable = 1,
|
|
.bit_per_pixel = 128,
|
|
.pic_height = 2400,
|
|
.pic_width = 1080,
|
|
.slice_height = 12,
|
|
.slice_width = 1080,
|
|
.chunk_size = 1080,
|
|
.xmit_delay = 512,
|
|
.dec_delay = 796,
|
|
.scale_value = 32,
|
|
.increment_interval = 382,
|
|
.decrement_interval = 15,
|
|
.line_bpg_offset = 12,
|
|
.nfl_bpg_offset = 2235,
|
|
.slice_bpg_offset = 1085,
|
|
.initial_offset = 6144,
|
|
.final_offset = 4336,
|
|
.flatness_minqp = 3,
|
|
.flatness_maxqp = 12,
|
|
.rc_model_size = 8192,
|
|
.rc_edge_factor = 6,
|
|
.rc_quant_incr_limit0 = 11,
|
|
.rc_quant_incr_limit1 = 11,
|
|
.rc_tgt_offset_hi = 3,
|
|
.rc_tgt_offset_lo = 3,
|
|
},
|
|
.data_rate = DATA_RATE,
|
|
|
|
/*Msync 2.0*/
|
|
.msync2_enable = 1,
|
|
.msync_cmd_table = {
|
|
.te_type = REQUEST_TE,
|
|
.msync_max_fps = 120,
|
|
.msync_min_fps = 43,
|
|
.msync_level_num = 20,
|
|
.delay_frame_num = 2,
|
|
.request_te_tb = {
|
|
|
|
/* Request-TE level */
|
|
.rte_te_level[0] = {
|
|
.level_id = 0,
|
|
.level_fps = 60,
|
|
.max_fps = 60,
|
|
.min_fps = 48,
|
|
},
|
|
.rte_te_level[1] = {
|
|
.level_id = 1,
|
|
.level_fps = 80,
|
|
.max_fps = 80,
|
|
.min_fps = 60,
|
|
},
|
|
.rte_te_level[2] = {
|
|
.level_id = 3,
|
|
.level_fps = 120,
|
|
.max_fps = 120,
|
|
.min_fps = 80,
|
|
},
|
|
},
|
|
},
|
|
|
|
};
|
|
|
|
struct drm_display_mode *get_mode_by_id(struct drm_connector *connector,
|
|
unsigned int mode)
|
|
{
|
|
struct drm_display_mode *m;
|
|
unsigned int i = 0;
|
|
|
|
list_for_each_entry(m, &connector->modes, head) {
|
|
if (i == mode)
|
|
return m;
|
|
i++;
|
|
}
|
|
return NULL;
|
|
}
|
|
|
|
static int mtk_panel_ext_param_set(struct drm_panel *panel,
|
|
struct drm_connector *connector, unsigned int mode)
|
|
{
|
|
struct mtk_panel_ext *ext = find_panel_ext(panel);
|
|
int ret = 0;
|
|
struct drm_display_mode *m = get_mode_by_id(connector, mode);
|
|
|
|
if (drm_mode_vrefresh(m) == MODE_0_FPS)
|
|
ext->params = &ext_params;
|
|
else if (drm_mode_vrefresh(m) == MODE_1_FPS)
|
|
ext->params = &ext_params;
|
|
else if (drm_mode_vrefresh(m) == MODE_2_FPS)
|
|
ext->params = &ext_params;
|
|
else if (drm_mode_vrefresh(m) == MODE_3_FPS)
|
|
ext->params = &ext_params_120hz;
|
|
else
|
|
ret = 1;
|
|
|
|
if (!ret)
|
|
current_fps = drm_mode_vrefresh(m);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int mtk_panel_ext_param_get(struct drm_panel *panel,
|
|
struct drm_connector *connector,
|
|
struct mtk_panel_params **ext_param,
|
|
unsigned int mode)
|
|
{
|
|
int ret = 0;
|
|
struct drm_display_mode *m = get_mode_by_id(connector, mode);
|
|
|
|
if (mode == 0)
|
|
*ext_param = &ext_params;
|
|
else if (mode == 1)
|
|
*ext_param = &ext_params;
|
|
else if (mode == 2)
|
|
*ext_param = &ext_params;
|
|
else if (mode == 3)
|
|
*ext_param = &ext_params_120hz;
|
|
else
|
|
ret = 1;
|
|
|
|
if (!ret)
|
|
current_fps = drm_mode_vrefresh(m);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int panel_ext_reset(struct drm_panel *panel, int on)
|
|
{
|
|
struct nt37801_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
ctx->reset_gpio =
|
|
devm_gpiod_get(ctx->dev, "reset", GPIOD_OUT_HIGH);
|
|
if (IS_ERR(ctx->reset_gpio)) {
|
|
dev_info(ctx->dev, "%s: cannot get reset_gpio %ld\n",
|
|
__func__, PTR_ERR(ctx->reset_gpio));
|
|
return PTR_ERR(ctx->reset_gpio);
|
|
}
|
|
gpiod_set_value(ctx->reset_gpio, on);
|
|
devm_gpiod_put(ctx->dev, ctx->reset_gpio);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int lcm_setbacklight_cmdq(void *dsi, dcs_write_gce cb,
|
|
void *handle, unsigned int level)
|
|
{
|
|
char bl_tb[] = {0x51, 0x07, 0xff};
|
|
unsigned int dbv = level << 1;
|
|
|
|
if (level) {
|
|
bl_tb0[1] = (dbv >> 8) & 0xFF;
|
|
bl_tb0[2] = dbv & 0xFF;
|
|
}
|
|
bl_tb[1] = (dbv >> 8) & 0xFF;
|
|
bl_tb[2] = dbv & 0xFF;
|
|
|
|
if (!cb)
|
|
return -1;
|
|
pr_info("%s %d %d %d\n", __func__, level, bl_tb[1], bl_tb[2]);
|
|
cb(dsi, handle, bl_tb, ARRAY_SIZE(bl_tb));
|
|
return 0;
|
|
}
|
|
|
|
//RTE60
|
|
static void mode_switch_to_60(struct drm_panel *panel,
|
|
enum MTK_PANEL_MODE_SWITCH_STAGE stage)
|
|
{
|
|
struct nt37801_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
if (stage == BEFORE_DSI_POWERDOWN) {
|
|
} else if (stage == AFTER_DSI_POWERON) {
|
|
DDPINFO("%s:%d switch to 60fps\n", __func__, __LINE__);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x05);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBE, 0x08);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBE, 0x45);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC5, 0x00, 0x0B, 0x0B, 0x0B);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x90, 0x13, 0x03);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x91, 0xAB, 0x28, 0x00, 0x0C, 0xC2, 0x00,
|
|
0x03, 0x1C, 0x01, 0x7E, 0x00, 0x0F, 0x08, 0xBB,
|
|
0x04, 0x3D, 0x10, 0xF0);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x1F, 0x70);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x35, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x5A, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x2A, 0x00, 0x00, 0x04, 0x37);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x2B, 0x00, 0x00, 0x09, 0x5F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x53, 0x28);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x05);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x08, 0x08);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x09);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x5F, 0x5F);
|
|
|
|
/*RTE*/
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x13);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x02, 0x64);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x1F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x38);
|
|
/* AFP */
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x26);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x01, 0xF4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x20);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x02, 0x00);
|
|
/* Valid TE period */
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x40, 0x07);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x40, 0x12, 0xBC);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x03);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x40, 0x15, 0x20);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x2F, 0x03);
|
|
}
|
|
}
|
|
|
|
//RTE80
|
|
static void mode_switch_to_80(struct drm_panel *panel,
|
|
enum MTK_PANEL_MODE_SWITCH_STAGE stage)
|
|
{
|
|
struct nt37801_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
if (stage == BEFORE_DSI_POWERDOWN) {
|
|
} else if (stage == AFTER_DSI_POWERON) {
|
|
DDPINFO("%s:%d switch to 80fps\n", __func__, __LINE__);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x05);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBE, 0x08);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBE, 0x45);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC5, 0x00, 0x0B, 0x0B, 0x0B);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x90, 0x13, 0x03);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x91, 0xAB, 0x28, 0x00, 0x0C, 0xC2, 0x00,
|
|
0x03, 0x1C, 0x01, 0x7E, 0x00, 0x0F, 0x08, 0xBB,
|
|
0x04, 0x3D, 0x10, 0xF0);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x1F, 0x70);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x35, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x5A, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x2A, 0x00, 0x00, 0x04, 0x37);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x2B, 0x00, 0x00, 0x09, 0x5F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x53, 0x28);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x05);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x08, 0x08);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x09);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x5F, 0x5F);
|
|
|
|
|
|
/*RTE*/
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x13);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x02, 0x64);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x1F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x38);
|
|
/* AFP */
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x26);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x01, 0xF4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x20);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x02, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x40, 0x07);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x40, 0x0D, 0xF8);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x03);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x40, 0x10, 0x5C);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x2F, 0x02);
|
|
}
|
|
}
|
|
|
|
//RTE96
|
|
static void mode_switch_to_96(struct drm_panel *panel,
|
|
enum MTK_PANEL_MODE_SWITCH_STAGE stage)
|
|
{
|
|
struct nt37801_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
if (stage == BEFORE_DSI_POWERDOWN) {
|
|
|
|
} else if (stage == AFTER_DSI_POWERON) {
|
|
DDPINFO("%s:%d switch to 96fps\n", __func__, __LINE__);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x05);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBE, 0x08);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBE, 0x45);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC5, 0x00, 0x0B, 0x0B, 0x0B);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x90, 0x13, 0x03);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x91, 0xAB, 0x28, 0x00, 0x0C, 0xC2, 0x00,
|
|
0x03, 0x1C, 0x01, 0x7E, 0x00, 0x0F, 0x08, 0xBB,
|
|
0x04, 0x3D, 0x10, 0xF0);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x1F, 0x70);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x35, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x5A, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x2A, 0x00, 0x00, 0x04, 0x37);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x2B, 0x00, 0x00, 0x09, 0x5F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x53, 0x28);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x05);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x08, 0x08);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x09);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x5F, 0x5F);
|
|
|
|
/*RTE*/
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x13);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x02, 0x64);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x1F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x38);
|
|
/* AFP */
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x22);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x01, 0xF4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x20);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x02, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x40, 0x07);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x40, 0x09, 0x2C);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x03);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x40, 0x0B, 0x90);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x2F, 0x01);
|
|
}
|
|
}
|
|
|
|
//RTE120
|
|
static void mode_switch_to_120(struct drm_panel *panel,
|
|
enum MTK_PANEL_MODE_SWITCH_STAGE stage)
|
|
{
|
|
struct nt37801_lcm *ctx = panel_to_lcm(panel);
|
|
|
|
if (stage == BEFORE_DSI_POWERDOWN) {
|
|
} else if (stage == AFTER_DSI_POWERON) {
|
|
DDPINFO("%s:%d switch to 120fps\n", __func__, __LINE__);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x05);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBE, 0x08);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xBE, 0x45);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC5, 0x00, 0x0B, 0x0B, 0x0B);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x90, 0x13, 0x03);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x91, 0xAB, 0x28, 0x00, 0x0C, 0xC2, 0x00,
|
|
0x03, 0x1C, 0x01, 0x7E, 0x00, 0x0F, 0x08, 0xBB,
|
|
0x04, 0x3D, 0x10, 0xF0);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x1F, 0x70);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x35, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x5A, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x2A, 0x00, 0x00, 0x04, 0x37);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x2B, 0x00, 0x00, 0x09, 0x5F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x53, 0x28);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x05);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x08, 0x08);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x09);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xB2, 0x5F, 0x5F);
|
|
|
|
/*RTE*/
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x13);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x02, 0x64);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x1F);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x38);
|
|
/* AFP */
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x22);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x01, 0xF4);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x20);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0xC0, 0x02, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x40, 0x07);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x01);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x40, 0x09, 0x2C);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x6F, 0x03);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x40, 0x0B, 0x90);
|
|
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x2F, 0x00);
|
|
nt37801_lcm_dcs_write_seq_static(ctx, 0x26, 0x00);
|
|
}
|
|
}
|
|
|
|
static int mode_switch(struct drm_panel *panel,
|
|
struct drm_connector *connector, unsigned int cur_mode,
|
|
unsigned int dst_mode, enum MTK_PANEL_MODE_SWITCH_STAGE stage)
|
|
{
|
|
int ret = 0;
|
|
struct drm_display_mode *m = get_mode_by_id(connector, dst_mode);
|
|
|
|
if (cur_mode == dst_mode)
|
|
return ret;
|
|
|
|
if (drm_mode_vrefresh(m) == MODE_0_FPS) { /*switch to 60 */
|
|
mode_switch_to_60(panel, stage);
|
|
DDPMSG("%s:%d switch to 60fps\n", __func__, __LINE__);
|
|
} else if (drm_mode_vrefresh(m) == MODE_1_FPS) { /*switch to 80 */
|
|
mode_switch_to_80(panel, stage);
|
|
DDPMSG("%s:%d switch to 80fps\n", __func__, __LINE__);
|
|
} else if (drm_mode_vrefresh(m) == MODE_2_FPS) { /*switch to 96 */
|
|
mode_switch_to_96(panel, stage);
|
|
DDPMSG("%s:%d switch to 96fps\n", __func__, __LINE__);
|
|
} else if (drm_mode_vrefresh(m) == MODE_3_FPS) { /*switch to 120 */
|
|
mode_switch_to_120(panel, stage);
|
|
DDPMSG("%s:%d switch to 120fps\n", __func__, __LINE__);
|
|
} else
|
|
ret = 1;
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int panel_ata_check(struct drm_panel *panel)
|
|
{
|
|
struct nt37801_lcm *ctx = panel_to_lcm(panel);
|
|
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
|
|
unsigned char data[3] = {0x00, 0x00, 0x00};
|
|
unsigned char id[3] = {0x01, 0x25, 0x00};
|
|
ssize_t ret;
|
|
|
|
ret = mipi_dsi_dcs_read(dsi, 0x4, data, 3);
|
|
if (ret < 0) {
|
|
pr_info("%s error\n", __func__);
|
|
return 0;
|
|
}
|
|
|
|
pr_notice("ATA read data %x %x %x\n", data[0], data[1], data[2]);
|
|
|
|
if (data[0] == id[0] && data[1] == id[1] && data[2] == id[2])
|
|
return 1;
|
|
|
|
pr_notice("ATA expect read data is %x %x %x\n", id[0], id[1], id[2]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
struct mtk_panel_para_table request_te_cmd[] = {
|
|
{2, {0x3F, 0x00}},
|
|
};
|
|
|
|
//RTE60
|
|
struct mtk_panel_para_table msync_level_60[] = {
|
|
{6, {0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00}},
|
|
|
|
/*RTE*/
|
|
/* EM cycle 612 */
|
|
{2, {0x6F, 0x13}},
|
|
{3, {0xC0, 0x02, 0x64}},
|
|
/* XXXX */
|
|
{2, {0x6F, 0x1F}},
|
|
{2, {0xC0, 0x38}},
|
|
/* AFP */
|
|
{2, {0x6F, 0x28}},
|
|
{3, {0xC0, 0x03, 0xE8}},
|
|
/* protection period */
|
|
{2, {0x6F, 0x20}},
|
|
{3, {0xC0, 0x02, 0x00}},
|
|
/* Valid TE period */
|
|
{2, {0x40, 0x07}},
|
|
{2, {0x6F, 0x01}},
|
|
{3, {0x40, 0x09, 0x7A}},
|
|
{2, {0x6F, 0x03}},
|
|
{3, {0x40, 0x17, 0xD0}},
|
|
|
|
/* 3.5 Frame Rate 60Hz GIR OFF */
|
|
{2, {0x2F, 0x13}},
|
|
};
|
|
|
|
//RTE80
|
|
struct mtk_panel_para_table msync_level_80[] = {
|
|
{6, {0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00}},
|
|
|
|
/*RTE*/
|
|
/* EM cycle 612 */
|
|
{2, {0x6F, 0x13}},
|
|
{3, {0xC0, 0x02, 0x64}},
|
|
/* XXXX */
|
|
{2, {0x6F, 0x1F}},
|
|
{2, {0xC0, 0x38}},
|
|
/* AFP */
|
|
{2, {0x6F, 0x26}},
|
|
{3, {0xC0, 0x03, 0xE8}},
|
|
/* protection period */
|
|
{2, {0x6F, 0x20}},
|
|
{3, {0xC0, 0x02, 0x00}},
|
|
/* Valid TE period */
|
|
{2, {0x40, 0x07}},
|
|
{2, {0x6F, 0x01}},
|
|
{3, {0x40, 0x09, 0x7A}},
|
|
{2, {0x6F, 0x03}},
|
|
{3, {0x40, 0x13, 0x08}},
|
|
|
|
/* 3.5 Frame Rate 80Hz GIR OFF */
|
|
{2, {0x2F, 0x12}},
|
|
};
|
|
|
|
//RTE96
|
|
struct mtk_panel_para_table msync_level_96[] = {
|
|
{6, {0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00}},
|
|
|
|
/*RTE*/
|
|
/* EM cycle 612 */
|
|
{2, {0x6F, 0x13}},
|
|
{3, {0xC0, 0x02, 0x64}},
|
|
/* XXXX */
|
|
{2, {0x6F, 0x1F}},
|
|
{2, {0xC0, 0x38}},
|
|
/* AFP */
|
|
{2, {0x6F, 0x24}},
|
|
{3, {0xC0, 0x03, 0xE8}},
|
|
/* protection period */
|
|
{2, {0x6F, 0x20}},
|
|
{3, {0xC0, 0x02, 0x00}},
|
|
/* Valid TE period */
|
|
{2, {0x40, 0x07}},
|
|
{2, {0x6F, 0x01}},
|
|
{3, {0x40, 0x09, 0x7A}},
|
|
{2, {0x6F, 0x03}},
|
|
{3, {0x40, 0x10, 0xA4}},
|
|
|
|
/* 3.5 Frame Rate 96Hz GIR OFF */
|
|
{2, {0x2F, 0x11}},
|
|
};
|
|
|
|
//RTE120
|
|
struct mtk_panel_para_table msync_level_120[] = {
|
|
{6, {0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00}},
|
|
|
|
/*RTE*/
|
|
/* EM cycle 612 */
|
|
{2, {0x6F, 0x13}},
|
|
{3, {0xC0, 0x02, 0x64}},
|
|
/* XXXX */
|
|
{2, {0x6F, 0x1F}},
|
|
{2, {0xC0, 0x38}},
|
|
/* AFP */
|
|
{2, {0x6F, 0x22}},
|
|
{3, {0xC0, 0x03, 0xE8}},
|
|
/* protection period */
|
|
{2, {0x6F, 0x20}},
|
|
{3, {0xC0, 0x02, 0x00}},
|
|
/* Valid TE period */
|
|
{2, {0x40, 0x07}},
|
|
{2, {0x6F, 0x01}},
|
|
{3, {0x40, 0x09, 0x7A}},
|
|
{2, {0x6F, 0x03}},
|
|
{3, {0x40, 0x0E, 0x40}},
|
|
|
|
/* 3.5 Frame Rate 120Hz GIR OFF */
|
|
{2, {0x2F, 0x10}},
|
|
{2, {0x26, 0x00}},
|
|
};
|
|
|
|
struct mtk_panel_para_table msync_close_rte_60fps[] = {
|
|
{2, {0x2F, 0x03}},
|
|
};
|
|
|
|
struct mtk_panel_para_table msync_close_rte_80fps[] = {
|
|
{2, {0x2F, 0x02}},
|
|
};
|
|
|
|
struct mtk_panel_para_table msync_close_rte_96fps[] = {
|
|
{2, {0x2F, 0x01}},
|
|
};
|
|
|
|
struct mtk_panel_para_table msync_close_rte_120fps[] = {
|
|
{2, {0x2F, 0x00}},
|
|
};
|
|
|
|
static int msync_te_level_switch_grp(void *dsi, dcs_grp_write_gce cb,
|
|
void *handle, struct drm_panel *panel, unsigned int fps_level)
|
|
{
|
|
int ret = 0;
|
|
struct mtk_panel_ext *ext = find_panel_ext(panel);
|
|
|
|
DDPMSG("[Msync2.0]%s:%d fps_level:%d\n", __func__, __LINE__, fps_level);
|
|
if (fps_level <= 60) { /*switch to 60 */
|
|
DDPMSG("%s:%d switch to 60fps\n", __func__, __LINE__);
|
|
cb(dsi, handle, msync_level_60, ARRAY_SIZE(msync_level_60));
|
|
ext->params->pll_clk = ext_params.pll_clk;
|
|
ext->params->data_rate = ext_params.data_rate;
|
|
|
|
} else if (fps_level <= 80) { /*switch to 80 */
|
|
DDPMSG("[Msync2.0]%s:%d switch to 80fps\n", __func__, __LINE__);
|
|
cb(dsi, handle, msync_level_80, ARRAY_SIZE(msync_level_80));
|
|
ext->params->pll_clk = ext_params.pll_clk;
|
|
ext->params->data_rate = ext_params.data_rate;
|
|
|
|
} else if (fps_level <= 120) { /*switch to 120 */
|
|
DDPMSG("[Msync2.0]%s:%d switch to 120fps\n", __func__, __LINE__);
|
|
cb(dsi, handle, msync_level_120, ARRAY_SIZE(msync_level_120));
|
|
ext->params->pll_clk = ext_params_120hz.pll_clk;
|
|
ext->params->data_rate = ext_params_120hz.data_rate;
|
|
|
|
} else if (fps_level == 0xEEEE) { /*send request TE*/
|
|
DDPMSG("[Msync2.0]%s:%d send request TE\n", __func__, __LINE__);
|
|
cb(dsi, handle, request_te_cmd, ARRAY_SIZE(request_te_cmd));
|
|
|
|
} else if (fps_level == 0xFFFF) { /*close request te */
|
|
DDPMSG("[Msync2.0]%s:%d Close MTE done, current fps:%d\n",
|
|
__func__, __LINE__, current_fps);
|
|
if (current_fps == 60) {
|
|
cb(dsi, handle, msync_close_rte_60fps, ARRAY_SIZE(msync_close_rte_60fps));
|
|
ext->params->pll_clk = ext_params.pll_clk;
|
|
ext->params->data_rate = ext_params.data_rate;
|
|
} else if (current_fps == 80) {
|
|
cb(dsi, handle, msync_close_rte_80fps, ARRAY_SIZE(msync_close_rte_80fps));
|
|
ext->params->pll_clk = ext_params.pll_clk;
|
|
ext->params->data_rate = ext_params.data_rate;
|
|
|
|
} else {
|
|
cb(dsi, handle, msync_close_rte_120fps, ARRAY_SIZE(msync_close_rte_120fps));
|
|
ext->params->pll_clk = ext_params_120hz.pll_clk;
|
|
ext->params->data_rate = ext_params_120hz.data_rate;
|
|
}
|
|
/*cb(dsi, handle, msync_default, ARRAY_SIZE(msync_default));*/
|
|
} else
|
|
ret = 1;
|
|
|
|
DDPMSG("[Msync2.0]%s:%d fps_level:%d\n", __func__, __LINE__, fps_level);
|
|
return ret;
|
|
}
|
|
|
|
int msync_cmd_set_min_fps(void *dsi, dcs_write_gce cb,
|
|
void *handle, unsigned int flag)
|
|
{
|
|
int ret = 0;
|
|
unsigned int fps_level = (flag & 0xFFFF0000) >> 16;
|
|
unsigned int min_fps = flag & 0xFFFF;
|
|
char bl_tb0[] = {0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00};
|
|
char bl_tb1[] = {0x6F, 0x22};
|
|
char bl_tb2[] = {0xC0, 0x01, 0xF4};
|
|
char bl_tb3[] = {0x6F, 0x03};
|
|
char bl_tb4[] = {0x40, 0x09, 0x6F};
|
|
char bl_tb5[] = {0x2F, 0x00};
|
|
|
|
DDPMSG("%s:%d flag:0x%08x, fps_level:%u min_fps:%u\n",
|
|
__func__, __LINE__, flag, fps_level, min_fps);
|
|
|
|
/* When MTE off, min fps need set to vrefresh*/
|
|
if (fps_level == MTE_OFF)
|
|
fps_level = min_fps;
|
|
|
|
if (fps_level <= MODE_0_FPS) { /*switch to 60 */
|
|
DDPMSG("%s:%d fps_level:%u min_fps:%u\n",
|
|
__func__, __LINE__, fps_level, min_fps);
|
|
if (min_fps >= 60) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x09;
|
|
bl_tb4[2] = 0x6F;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
} else if (min_fps >= 53) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x09;
|
|
bl_tb4[2] = 0x6F;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
} else if (min_fps >= 48) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x09;
|
|
bl_tb4[2] = 0x6F;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
}
|
|
|
|
} else if (fps_level <= MODE_1_FPS) { /*switch to 80 */
|
|
DDPMSG("%s:%d fps_level:%u min_fps:%u\n",
|
|
__func__, __LINE__, fps_level, min_fps);
|
|
if (min_fps >= 80) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x09;
|
|
bl_tb4[2] = 0x6F;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
} else if (min_fps >= 68) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x09;
|
|
bl_tb4[2] = 0x6F;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
} else if (min_fps >= 60) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x09;
|
|
bl_tb4[2] = 0x6F;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
} else if (min_fps >= 53) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x09;
|
|
bl_tb4[2] = 0x6F;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
} else if (min_fps >= 48) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x09;
|
|
bl_tb4[2] = 0x6F;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
}
|
|
|
|
} else if (fps_level <= MODE_2_FPS) { /*switch to 96 */
|
|
DDPMSG("%s:%d fps_level:%u min_fps:%u\n",
|
|
__func__, __LINE__, fps_level, min_fps);
|
|
if (min_fps >= 96) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x09;
|
|
bl_tb4[2] = 0x6F;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
} else if (min_fps >= 80) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x09;
|
|
bl_tb4[2] = 0x6F;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
} else if (min_fps >= 68) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x09;
|
|
bl_tb4[2] = 0x6F;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
} else if (min_fps >= 60) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x09;
|
|
bl_tb4[2] = 0x6F;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
} else if (min_fps >= 53) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x09;
|
|
bl_tb4[2] = 0x6F;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
} else if (min_fps >= 48) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x09;
|
|
bl_tb4[2] = 0x6F;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
}
|
|
|
|
} else if (fps_level <= MODE_3_FPS) { /*switch to 120 */
|
|
DDPMSG("%s:%d fps_level:%u min_fps:%u\n",
|
|
__func__, __LINE__, fps_level, min_fps);
|
|
if (min_fps >= 120) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x09;
|
|
bl_tb4[2] = 0x6F;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
bl_tb4[1] = 0x00;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb5));
|
|
} else if (min_fps >= 96) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x01;
|
|
bl_tb2[2] = 0xF4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x0B;
|
|
bl_tb4[2] = 0x70;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
bl_tb4[1] = 0x10;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb5));
|
|
} else if (min_fps >= 80) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x03;
|
|
bl_tb2[2] = 0xE8;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x0D;
|
|
bl_tb4[2] = 0x64;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
bl_tb4[1] = 0x10;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb5));
|
|
} else if (min_fps >= 68) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x05;
|
|
bl_tb2[2] = 0xDC;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x0F;
|
|
bl_tb4[2] = 0x58;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
bl_tb4[1] = 0x10;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb5));
|
|
} else if (min_fps >= 60) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x07;
|
|
bl_tb2[2] = 0xD0;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x11;
|
|
bl_tb4[2] = 0x4C;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
bl_tb4[1] = 0x10;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb5));
|
|
} else if (min_fps >= 53) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x09;
|
|
bl_tb2[2] = 0xC4;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x13;
|
|
bl_tb4[2] = 0x40;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
bl_tb4[1] = 0x10;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb5));
|
|
} else if (min_fps >= 48) {
|
|
cb(dsi, handle, bl_tb0, ARRAY_SIZE(bl_tb0));
|
|
cb(dsi, handle, bl_tb1, ARRAY_SIZE(bl_tb1));
|
|
bl_tb2[1] = 0x0B;
|
|
bl_tb2[2] = 0xB8;
|
|
cb(dsi, handle, bl_tb2, ARRAY_SIZE(bl_tb2));
|
|
cb(dsi, handle, bl_tb3, ARRAY_SIZE(bl_tb3));
|
|
bl_tb4[1] = 0x15;
|
|
bl_tb4[2] = 0x34;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb4));
|
|
bl_tb4[1] = 0x10;
|
|
cb(dsi, handle, bl_tb4, ARRAY_SIZE(bl_tb5));
|
|
}
|
|
|
|
} else
|
|
ret = 1;
|
|
|
|
return ret;
|
|
}
|
|
|
|
static struct mtk_panel_funcs ext_funcs = {
|
|
.reset = panel_ext_reset,
|
|
.ext_param_set = mtk_panel_ext_param_set,
|
|
.ext_param_get = mtk_panel_ext_param_get,
|
|
.set_backlight_cmdq = lcm_setbacklight_cmdq,
|
|
.mode_switch = mode_switch,
|
|
.ata_check = panel_ata_check,
|
|
.msync_te_level_switch_grp = msync_te_level_switch_grp,
|
|
.msync_cmd_set_min_fps = msync_cmd_set_min_fps,
|
|
};
|
|
#endif
|
|
|
|
struct panel_desc {
|
|
const struct drm_display_mode *modes;
|
|
unsigned int num_modes;
|
|
|
|
unsigned int bpc;
|
|
|
|
struct {
|
|
unsigned int width;
|
|
unsigned int height;
|
|
} size;
|
|
|
|
struct {
|
|
unsigned int prepare;
|
|
unsigned int enable;
|
|
unsigned int disable;
|
|
unsigned int unprepare;
|
|
} delay;
|
|
};
|
|
|
|
static int nt37801_lcm_get_modes(struct drm_panel *panel, struct drm_connector *connector)
|
|
{
|
|
struct drm_display_mode *mode;
|
|
struct drm_display_mode *mode1;
|
|
struct drm_display_mode *mode2;
|
|
struct drm_display_mode *mode3;
|
|
|
|
mode = drm_mode_duplicate(connector->dev, &default_mode);
|
|
if (!mode) {
|
|
dev_info(connector->dev->dev, "failed to add mode %ux%ux@%u\n",
|
|
default_mode.hdisplay, default_mode.vdisplay,
|
|
drm_mode_vrefresh(&default_mode));
|
|
return -ENOMEM;
|
|
}
|
|
|
|
drm_mode_set_name(mode);
|
|
mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
|
|
drm_mode_probed_add(connector, mode);
|
|
|
|
mode1 = drm_mode_duplicate(connector->dev, &performance_mode);
|
|
if (!mode1) {
|
|
dev_info(connector->dev->dev, "failed to add mode %ux%ux@%u\n",
|
|
performance_mode.hdisplay,
|
|
performance_mode.vdisplay,
|
|
drm_mode_vrefresh(&performance_mode));
|
|
return -ENOMEM;
|
|
}
|
|
|
|
drm_mode_set_name(mode1);
|
|
mode1->type = DRM_MODE_TYPE_DRIVER;
|
|
drm_mode_probed_add(connector, mode1);
|
|
|
|
mode2 = drm_mode_duplicate(connector->dev, &performance_mode1);
|
|
if (!mode2) {
|
|
dev_info(connector->dev->dev, "failed to add mode %ux%ux@%u\n",
|
|
performance_mode1.hdisplay,
|
|
performance_mode1.vdisplay,
|
|
drm_mode_vrefresh(&performance_mode1));
|
|
return -ENOMEM;
|
|
}
|
|
|
|
drm_mode_set_name(mode2);
|
|
mode2->type = DRM_MODE_TYPE_DRIVER;
|
|
drm_mode_probed_add(connector, mode2);
|
|
|
|
mode3 = drm_mode_duplicate(connector->dev, &performance_mode2);
|
|
if (!mode3) {
|
|
dev_info(connector->dev->dev, "failed to add mode %ux%ux@%u\n",
|
|
performance_mode2.hdisplay,
|
|
performance_mode2.vdisplay,
|
|
drm_mode_vrefresh(&performance_mode2));
|
|
return -ENOMEM;
|
|
}
|
|
|
|
drm_mode_set_name(mode3);
|
|
mode3->type = DRM_MODE_TYPE_DRIVER;
|
|
drm_mode_probed_add(connector, mode3);
|
|
|
|
connector->display_info.width_mm = 70;
|
|
connector->display_info.height_mm = 152;
|
|
|
|
return 1;
|
|
}
|
|
|
|
static const struct drm_panel_funcs lcm_drm_funcs = {
|
|
.disable = nt37801_lcm_disable,
|
|
.unprepare = nt37801_lcm_unprepare,
|
|
.prepare = nt37801_lcm_prepare,
|
|
.enable = nt37801_lcm_enable,
|
|
.get_modes = nt37801_lcm_get_modes,
|
|
};
|
|
|
|
static int lcm_probe(struct mipi_dsi_device *dsi)
|
|
{
|
|
struct device *dev = &dsi->dev;
|
|
struct device_node *dsi_node, *remote_node = NULL, *endpoint = NULL;
|
|
struct nt37801_lcm *ctx;
|
|
struct device_node *backlight;
|
|
unsigned int value;
|
|
int ret;
|
|
|
|
pr_info("%s+ samsung,nt37801,cmd,120hz\n", __func__);
|
|
|
|
dsi_node = of_get_parent(dev->of_node);
|
|
if (dsi_node) {
|
|
endpoint = of_graph_get_next_endpoint(dsi_node, NULL);
|
|
if (endpoint) {
|
|
remote_node = of_graph_get_remote_port_parent(endpoint);
|
|
if (!remote_node) {
|
|
pr_info("No panel connected,skip probe lcm\n");
|
|
return -ENODEV;
|
|
}
|
|
pr_info("device node name:%s\n", remote_node->name);
|
|
}
|
|
}
|
|
if (remote_node != dev->of_node) {
|
|
pr_info("%s+ skip probe due to not current lcm\n", __func__);
|
|
return -ENODEV;
|
|
}
|
|
|
|
ctx = devm_kzalloc(dev, sizeof(struct nt37801_lcm), GFP_KERNEL);
|
|
if (!ctx)
|
|
return -ENOMEM;
|
|
|
|
mipi_dsi_set_drvdata(dsi, ctx);
|
|
|
|
ctx->dev = dev;
|
|
dsi->lanes = 4;
|
|
dsi->format = MIPI_DSI_FMT_RGB888;
|
|
dsi->mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET
|
|
| MIPI_DSI_CLOCK_NON_CONTINUOUS;
|
|
|
|
ret = of_property_read_u32(dev->of_node, "gate-ic", &value);
|
|
if (ret < 0)
|
|
value = 0;
|
|
else
|
|
ctx->gate_ic = value;
|
|
|
|
backlight = of_parse_phandle(dev->of_node, "backlight", 0);
|
|
if (backlight) {
|
|
ctx->backlight = of_find_backlight_by_node(backlight);
|
|
of_node_put(backlight);
|
|
|
|
if (!ctx->backlight)
|
|
return -EPROBE_DEFER;
|
|
}
|
|
|
|
ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
|
|
if (IS_ERR(ctx->reset_gpio)) {
|
|
dev_info(dev, "%s: cannot get reset-gpios %ld\n",
|
|
__func__, PTR_ERR(ctx->reset_gpio));
|
|
return PTR_ERR(ctx->reset_gpio);
|
|
}
|
|
devm_gpiod_put(dev, ctx->reset_gpio);
|
|
if (ctx->gate_ic == 0) {
|
|
ctx->bias_pos = devm_gpiod_get_index(dev, "bias", 0, GPIOD_OUT_HIGH);
|
|
if (IS_ERR(ctx->bias_pos)) {
|
|
dev_info(dev, "cannot get bias-gpios 0 %ld\n",
|
|
PTR_ERR(ctx->bias_pos));
|
|
return PTR_ERR(ctx->bias_pos);
|
|
}
|
|
devm_gpiod_put(dev, ctx->bias_pos);
|
|
|
|
ctx->bias_neg = devm_gpiod_get_index(dev, "bias", 1, GPIOD_OUT_HIGH);
|
|
if (IS_ERR(ctx->bias_neg)) {
|
|
dev_info(dev, "cannot get bias-gpios 1 %ld\n",
|
|
PTR_ERR(ctx->bias_neg));
|
|
return PTR_ERR(ctx->bias_neg);
|
|
}
|
|
devm_gpiod_put(dev, ctx->bias_neg);
|
|
}
|
|
ctx->prepared = true;
|
|
ctx->enabled = true;
|
|
|
|
drm_panel_init(&ctx->panel, dev, &lcm_drm_funcs, DRM_MODE_CONNECTOR_DSI);
|
|
|
|
drm_panel_add(&ctx->panel);
|
|
|
|
ret = mipi_dsi_attach(dsi);
|
|
if (ret < 0)
|
|
drm_panel_remove(&ctx->panel);
|
|
|
|
#if defined(CONFIG_MTK_PANEL_EXT)
|
|
//mtk_panel_tch_handle_reg(&ctx->panel);
|
|
ret = mtk_panel_ext_create(dev, &ext_params, &ext_funcs, &ctx->panel);
|
|
if (ret < 0)
|
|
return ret;
|
|
#endif
|
|
|
|
pr_info("%s-samsung,nt37801 cmd 120hz\n", __func__);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int lcm_remove(struct mipi_dsi_device *dsi)
|
|
{
|
|
struct nt37801_lcm *ctx = mipi_dsi_get_drvdata(dsi);
|
|
#if defined(CONFIG_MTK_PANEL_EXT)
|
|
struct mtk_panel_ctx *ext_ctx = find_panel_ctx(&ctx->panel);
|
|
#endif
|
|
|
|
mipi_dsi_detach(dsi);
|
|
drm_panel_remove(&ctx->panel);
|
|
|
|
#if defined(CONFIG_MTK_PANEL_EXT)
|
|
mtk_panel_detach(ext_ctx);
|
|
mtk_panel_remove(ext_ctx);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id lcm_of_match[] = {
|
|
{ .compatible = "nt37801,msync2_rte", },
|
|
{ }
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, lcm_of_match);
|
|
|
|
static struct mipi_dsi_driver lcm_driver = {
|
|
.probe = lcm_probe,
|
|
.remove = lcm_remove,
|
|
.driver = {
|
|
.name = "nt37801_msync2_rte",
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = lcm_of_match,
|
|
},
|
|
};
|
|
|
|
module_mipi_dsi_driver(lcm_driver);
|
|
|
|
MODULE_AUTHOR("Yonggang Yu <yonggang.yu@mediatek.com>");
|
|
MODULE_DESCRIPTION("nt37801 fqhdplus dphy oled panel driver for msync2.0 RTE");
|
|
MODULE_LICENSE("GPL v2");
|