200 lines
5.9 KiB
C
200 lines
5.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef _MTK_EEMG_
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#define _MTK_EEMG_
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#include <linux/kernel.h>
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//#include <mt-plat/sync_write.h>
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#include "mtk_eemgpu_config.h"
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#define EN_EEMGPU (1) /* enable/disable EEM (SW) */
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/* have 5 banks */
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enum eemg_ctrl_id {
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EEMG_CTRL_GPU,
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EEMG_CTRL_GPU_HI,
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NR_EEMG_CTRL,
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};
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enum eemg_det_id {
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EEMG_DET_GPU = EEMG_CTRL_GPU,
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EEMG_DET_GPU_HI = EEMG_CTRL_GPU_HI,
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NR_EEMG_DET,
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};
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enum mt_eemg_add_extra_mode {
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NO_EXTRA,
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ADD_EXTRA,
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UNDEF_EXTRA,
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};
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/* internal use */
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/* EEM detector is disabled by who */
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enum {
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BY_PROCFS = BIT(0),
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BY_INIT_ERROR = BIT(1),
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BY_MON_ERROR = BIT(2),
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};
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enum eemg_phase {
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EEMG_PHASE_INIT01,
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EEMG_PHASE_INIT02,
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EEMG_PHASE_MON,
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EEMG_PHASE_CORN,
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NR_EEMG_PHASE,
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};
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enum eemg_features {
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FEA_INIT01 = BIT(EEMG_PHASE_INIT01),
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FEA_INIT02 = BIT(EEMG_PHASE_INIT02),
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FEA_MON = BIT(EEMG_PHASE_MON),
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FEA_CORN = BIT(EEMG_PHASE_CORN),
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};
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enum {
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EEMG_VOLT_NONE = 0,
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EEMG_VOLT_UPDATE = BIT(0),
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EEMG_VOLT_RESTORE = BIT(1),
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};
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enum {
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EEM_NORMAL_T = 0,
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EEM_LOW_T,
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EEM_EXTRALOW_T,
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EEM_HIGH_T
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};
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enum eemg_loo_role {
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NO_LOO_BANK = 0,
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LOW_BANK = 1,
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HIGH_BANK = 2,
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NR_EEMG_LOO_BANK,
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};
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extern u32 get_devinfo_with_index(u32 index);
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extern unsigned int eemg_corn_flag;
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extern const unsigned int reg_gpu_addr_off[DUMP_LEN];
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#if IS_ENABLED(CONFIG_MTK_AEE_FEATURE)
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#define CONFIG_EEMG_AEE_RR_REC 1
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#endif
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#ifdef CONFIG_EEMG_AEE_RR_REC
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enum eemg_state {
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EEMG_GPU_IS_SET_VOLT = 3, /* G */
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EEMG_GPU_HI_IS_SET_VOLT = 4,
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EEMG_CPU_BIG_HI_IS_SET_VOLT = 4,
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};
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extern void aee_rr_rec_ptp_devinfo_0(u32 val);
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extern void aee_rr_rec_ptp_devinfo_1(u32 val);
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extern void aee_rr_rec_ptp_devinfo_2(u32 val);
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extern void aee_rr_rec_ptp_devinfo_3(u32 val);
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extern void aee_rr_rec_ptp_devinfo_4(u32 val);
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extern void aee_rr_rec_ptp_devinfo_5(u32 val);
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extern void aee_rr_rec_ptp_devinfo_6(u32 val);
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extern void aee_rr_rec_ptp_devinfo_7(u32 val);
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extern void aee_rr_rec_ptp_e0(u32 val);
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extern void aee_rr_rec_ptp_e1(u32 val);
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extern void aee_rr_rec_ptp_e2(u32 val);
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extern void aee_rr_rec_ptp_e3(u32 val);
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extern void aee_rr_rec_ptp_e4(u32 val);
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extern void aee_rr_rec_ptp_e5(u32 val);
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extern void aee_rr_rec_ptp_e6(u32 val);
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extern void aee_rr_rec_ptp_e7(u32 val);
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extern void aee_rr_rec_ptp_e8(u32 val);
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extern void aee_rr_rec_ptp_e9(u32 val);
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extern void aee_rr_rec_ptp_e10(u32 val);
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extern void aee_rr_rec_ptp_e11(u32 val);
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extern void aee_rr_rec_ptp_vboot(u64 val);
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extern void aee_rr_rec_ptp_cpu_big_volt(u64 val);
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extern void aee_rr_rec_ptp_cpu_big_volt_1(u64 val);
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extern void aee_rr_rec_ptp_cpu_big_volt_2(u64 val);
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extern void aee_rr_rec_ptp_cpu_big_volt_3(u64 val);
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extern void aee_rr_rec_ptp_gpu_volt(u64 val);
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extern void aee_rr_rec_ptp_gpu_volt_1(u64 val);
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extern void aee_rr_rec_ptp_gpu_volt_2(u64 val);
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extern void aee_rr_rec_ptp_gpu_volt_3(u64 val);
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extern void aee_rr_rec_ptp_cpu_little_volt(u64 val);
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extern void aee_rr_rec_ptp_cpu_little_volt_1(u64 val);
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extern void aee_rr_rec_ptp_cpu_little_volt_2(u64 val);
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extern void aee_rr_rec_ptp_cpu_little_volt_3(u64 val);
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extern void aee_rr_rec_ptp_cpu_2_little_volt(u64 val);
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extern void aee_rr_rec_ptp_cpu_2_little_volt_1(u64 val);
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extern void aee_rr_rec_ptp_cpu_2_little_volt_2(u64 val);
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extern void aee_rr_rec_ptp_cpu_2_little_volt_3(u64 val);
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extern void aee_rr_rec_ptp_cpu_cci_volt(u64 val);
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extern void aee_rr_rec_ptp_cpu_cci_volt_1(u64 val);
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extern void aee_rr_rec_ptp_cpu_cci_volt_2(u64 val);
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extern void aee_rr_rec_ptp_cpu_cci_volt_3(u64 val);
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extern void aee_rr_rec_ptp_temp(u64 val);
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extern void aee_rr_rec_ptp_status(u8 val);
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extern void aee_rr_rec_eemg_pi_offset(u8 val);
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extern u32 aee_rr_curr_ptp_devinfo_0(void);
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extern u32 aee_rr_curr_ptp_devinfo_1(void);
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extern u32 aee_rr_curr_ptp_devinfo_2(void);
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extern u32 aee_rr_curr_ptp_devinfo_3(void);
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extern u32 aee_rr_curr_ptp_devinfo_4(void);
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extern u32 aee_rr_curr_ptp_devinfo_5(void);
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extern u32 aee_rr_curr_ptp_devinfo_6(void);
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extern u32 aee_rr_curr_ptp_devinfo_7(void);
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extern u32 aee_rr_curr_ptp_e0(void);
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extern u32 aee_rr_curr_ptp_e1(void);
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extern u32 aee_rr_curr_ptp_e2(void);
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extern u32 aee_rr_curr_ptp_e3(void);
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extern u32 aee_rr_curr_ptp_e4(void);
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extern u32 aee_rr_curr_ptp_e5(void);
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extern u32 aee_rr_curr_ptp_e6(void);
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extern u32 aee_rr_curr_ptp_e7(void);
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extern u32 aee_rr_curr_ptp_e8(void);
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extern u32 aee_rr_curr_ptp_e9(void);
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extern u32 aee_rr_curr_ptp_e10(void);
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extern u32 aee_rr_curr_ptp_e11(void);
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extern u64 aee_rr_curr_ptp_vboot(void);
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extern u64 aee_rr_curr_ptp_cpu_big_volt(void);
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extern u64 aee_rr_curr_ptp_cpu_big_volt_1(void);
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extern u64 aee_rr_curr_ptp_cpu_big_volt_2(void);
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extern u64 aee_rr_curr_ptp_cpu_big_volt_3(void);
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extern u64 aee_rr_curr_ptp_gpu_volt(void);
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extern u64 aee_rr_curr_ptp_gpu_volt_1(void);
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extern u64 aee_rr_curr_ptp_gpu_volt_2(void);
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extern u64 aee_rr_curr_ptp_gpu_volt_3(void);
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extern u64 aee_rr_curr_ptp_cpu_little_volt(void);
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extern u64 aee_rr_curr_ptp_cpu_little_volt_1(void);
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extern u64 aee_rr_curr_ptp_cpu_little_volt_2(void);
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extern u64 aee_rr_curr_ptp_cpu_little_volt_3(void);
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extern u64 aee_rr_curr_ptp_cpu_2_little_volt(void);
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extern u64 aee_rr_curr_ptp_cpu_2_little_volt_1(void);
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extern u64 aee_rr_curr_ptp_cpu_2_little_volt_2(void);
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extern u64 aee_rr_curr_ptp_cpu_2_little_volt_3(void);
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extern u64 aee_rr_curr_ptp_cpu_cci_volt(void);
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extern u64 aee_rr_curr_ptp_cpu_cci_volt_1(void);
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extern u64 aee_rr_curr_ptp_cpu_cci_volt_2(void);
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extern u64 aee_rr_curr_ptp_cpu_cci_volt_3(void);
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extern u64 aee_rr_curr_ptp_temp(void);
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extern u8 aee_rr_curr_ptp_status(void);
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#endif
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/* EEM Extern Function */
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extern int mt_eemg_status(enum eemg_det_id id);
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extern unsigned int get_efuse_status(void);
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extern unsigned int mt_eemg_is_enabled(void);
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extern void eemg_set_pi_efuse(enum eemg_det_id id,
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unsigned int pi_efuse,
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unsigned int loo_enabled);
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extern void eemg_set_pi_dvtfixed(enum eemg_det_id id,
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unsigned int pi_dvtfixed);
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/* DRCC */
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extern unsigned int drcc_offset_done;
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#endif
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