518 lines
14 KiB
C
518 lines
14 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2021 MediaTek Inc.
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*/
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#ifndef __MTK_PDA_HW_H__
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#define __MTK_PDA_HW_H__
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#include <linux/completion.h>
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#include <linux/io.h>
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#include <linux/types.h>
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#include <linux/platform_device.h>
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#include <linux/ioctl.h>
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#include <linux/firmware.h>
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#include <linux/cdev.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/of_platform.h>
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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#include <linux/io.h>
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#define PDA_MAGIC 'P'
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#define KERNEL_VERSION 1000
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#define PDAROIARRAYMAX 128
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#define FIXROIARRAYMAX 10
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#define OUT_BYTE_PER_ROI 1408
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#define PDA_MAXROI_PER_ROUND 45
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#define PDA_MAX_QUANTITY 4
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#define PDA_CFG_0_REG (0x000)
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#define PDA_CFG_1_REG (0x004)
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#define PDA_CFG_2_REG (0x008)
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#define PDA_CFG_3_REG (0x00c)
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#define PDA_CFG_4_REG (0x010)
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#define PDA_CFG_5_REG (0x014)
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#define PDA_CFG_6_REG (0x018)
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#define PDA_CFG_7_REG (0x01c)
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#define PDA_CFG_8_REG (0x020)
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#define PDA_CFG_9_REG (0x024)
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#define PDA_CFG_10_REG (0x028)
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#define PDA_CFG_11_REG (0x02c)
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#define PDA_CFG_12_REG (0x030)
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#define PDA_CFG_13_REG (0x034)
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#define PDA_CFG_14_REG (0x038)
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#define PDA_CFG_15_REG (0x03c)
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#define PDA_CFG_16_REG (0x040)
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#define PDA_CFG_17_REG (0x044)
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#define PDA_CFG_18_REG (0x048)
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#define PDA_CFG_19_REG (0x04c)
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#define PDA_CFG_20_REG (0x050)
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#define PDA_CFG_21_REG (0x054)
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#define PDA_CFG_22_REG (0x058)
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#define PDA_CFG_23_REG (0x05c)
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#define PDA_CFG_24_REG (0x060)
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#define PDA_CFG_25_REG (0x064)
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#define PDA_CFG_26_REG (0x068)
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#define PDA_CFG_27_REG (0x06c)
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#define PDA_CFG_28_REG (0x070)
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#define PDA_CFG_29_REG (0x074)
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#define PDA_CFG_30_REG (0x078)
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#define PDA_CFG_31_REG (0x07c)
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#define PDA_CFG_32_REG (0x080)
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#define PDA_CFG_33_REG (0x084)
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#define PDA_CFG_34_REG (0x088)
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#define PDA_CFG_35_REG (0x08c)
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#define PDA_CFG_36_REG (0x090)
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#define PDA_CFG_37_REG (0x094)
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#define PDA_CFG_38_REG (0x098)
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#define PDA_CFG_39_REG (0x09c)
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#define PDA_CFG_40_REG (0x0a0)
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#define PDA_CFG_41_REG (0x0a4)
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#define PDA_CFG_42_REG (0x0a8)
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#define PDA_CFG_43_REG (0x0ac)
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#define PDA_CFG_44_REG (0x0b0)
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#define PDA_CFG_45_REG (0x0b4)
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#define PDA_CFG_46_REG (0x0b8)
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#define PDA_CFG_47_REG (0x0bc)
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#define PDA_CFG_48_REG (0x0c0)
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#define PDA_CFG_49_REG (0x0c4)
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#define PDA_CFG_50_REG (0x0c8)
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#define PDA_CFG_51_REG (0x0cc)
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#define PDA_CFG_52_REG (0x0d0)
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#define PDA_CFG_53_REG (0x0d4)
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#define PDA_CFG_54_REG (0x0d8)
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#define PDA_CFG_55_REG (0x0dc)
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#define PDA_CFG_56_REG (0x0e0)
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#define PDA_CFG_57_REG (0x0e4)
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#define PDA_CFG_58_REG (0x0e8)
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#define PDA_CFG_59_REG (0x0ec)
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#define PDA_CFG_60_REG (0x0f0)
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#define PDA_CFG_61_REG (0x0f4)
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#define PDA_CFG_62_REG (0x0f8)
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#define PDA_CFG_63_REG (0x0fc)
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#define PDA_CFG_64_REG (0x100)
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#define PDA_CFG_65_REG (0x104)
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#define PDA_CFG_66_REG (0x108)
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#define PDA_CFG_67_REG (0x10c)
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#define PDA_CFG_68_REG (0x110)
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#define PDA_CFG_69_REG (0x114)
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#define PDA_CFG_70_REG (0x118)
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#define PDA_CFG_71_REG (0x11c)
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#define PDA_CFG_72_REG (0x120)
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#define PDA_CFG_73_REG (0x124)
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#define PDA_CFG_74_REG (0x128)
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#define PDA_CFG_75_REG (0x12c)
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#define PDA_CFG_76_REG (0x130)
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#define PDA_CFG_77_REG (0x134)
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#define PDA_CFG_78_REG (0x138)
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#define PDA_CFG_79_REG (0x13c)
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#define PDA_CFG_80_REG (0x140)
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#define PDA_CFG_81_REG (0x144)
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#define PDA_CFG_82_REG (0x148)
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#define PDA_CFG_83_REG (0x14c)
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#define PDA_CFG_84_REG (0x150)
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#define PDA_CFG_85_REG (0x154)
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#define PDA_CFG_86_REG (0x158)
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#define PDA_CFG_87_REG (0x15c)
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#define PDA_CFG_88_REG (0x160)
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#define PDA_CFG_89_REG (0x164)
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#define PDA_CFG_90_REG (0x168)
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#define PDA_CFG_91_REG (0x16c)
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#define PDA_CFG_92_REG (0x170)
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#define PDA_CFG_93_REG (0x174)
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#define PDA_CFG_94_REG (0x178)
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#define PDA_CFG_95_REG (0x17c)
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#define PDA_CFG_96_REG (0x180)
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#define PDA_CFG_97_REG (0x184)
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#define PDA_CFG_98_REG (0x188)
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#define PDA_CFG_99_REG (0x18c)
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#define PDA_CFG_100_REG (0x190)
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#define PDA_CFG_101_REG (0x194)
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#define PDA_CFG_102_REG (0x198)
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#define PDA_CFG_103_REG (0x19c)
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#define PDA_CFG_104_REG (0x1a0)
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#define PDA_CFG_105_REG (0x1a4)
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#define PDA_CFG_106_REG (0x1a8)
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#define PDA_CFG_107_REG (0x1ac)
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#define PDA_CFG_108_REG (0x1b0)
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#define PDA_CFG_109_REG (0x1b4)
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#define PDA_CFG_110_REG (0x1b8)
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#define PDA_CFG_111_REG (0x1bc)
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#define PDA_CFG_112_REG (0x1c0)
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#define PDA_CFG_113_REG (0x1c4)
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#define PDA_CFG_114_REG (0x1c8)
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#define PDA_CFG_115_REG (0x1cc)
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#define PDA_CFG_116_REG (0x1d0)
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#define PDA_CFG_117_REG (0x1d4)
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#define PDA_CFG_118_REG (0x1d8)
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#define PDA_CFG_119_REG (0x1dc)
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#define PDA_CFG_120_REG (0x1e0)
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#define PDA_CFG_121_REG (0x1e4)
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#define PDA_CFG_122_REG (0x1e8)
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#define PDA_CFG_123_REG (0x1ec)
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#define PDA_CFG_124_REG (0x1f0)
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#define PDA_CFG_125_REG (0x1f4)
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#define PDA_CFG_126_REG (0x1f8)
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#define PDA_PDAI_P1_BASE_ADDR_REG (0x300)
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#define PDA_PDATI_P1_BASE_ADDR_REG (0x304)
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#define PDA_PDAI_P2_BASE_ADDR_REG (0x308)
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#define PDA_PDATI_P2_BASE_ADDR_REG (0x30c)
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#define PDA_PDAI_STRIDE_REG (0x310)
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#define PDA_PDAI_P1_CON0_REG (0x314)
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#define PDA_PDAI_P1_CON1_REG (0x318)
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#define PDA_PDAI_P1_CON2_REG (0x31c)
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#define PDA_PDAI_P1_CON3_REG (0x320)
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#define PDA_PDAI_P1_CON4_REG (0x324)
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#define PDA_PDATI_P1_CON0_REG (0x328)
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#define PDA_PDATI_P1_CON1_REG (0x32c)
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#define PDA_PDATI_P1_CON2_REG (0x330)
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#define PDA_PDATI_P1_CON3_REG (0x334)
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#define PDA_PDATI_P1_CON4_REG (0x338)
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#define PDA_PDAI_P2_CON0_REG (0x33c)
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#define PDA_PDAI_P2_CON1_REG (0x340)
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#define PDA_PDAI_P2_CON2_REG (0x344)
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#define PDA_PDAI_P2_CON3_REG (0x348)
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#define PDA_PDAI_P2_CON4_REG (0x34c)
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#define PDA_PDATI_P2_CON0_REG (0x350)
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#define PDA_PDATI_P2_CON1_REG (0x354)
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#define PDA_PDATI_P2_CON2_REG (0x358)
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#define PDA_PDATI_P2_CON3_REG (0x35c)
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#define PDA_PDATI_P2_CON4_REG (0x360)
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#define PDA_PDAO_P1_BASE_ADDR_REG (0x364)
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#define PDA_PDAO_P1_XSIZE_REG (0x368)
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#define PDA_PDAO_P1_CON0_REG (0x36c)
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#define PDA_PDAO_P1_CON1_REG (0x370)
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#define PDA_PDAO_P1_CON2_REG (0x374)
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#define PDA_PDAO_P1_CON3_REG (0x378)
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#define PDA_PDAO_P1_CON4_REG (0x37c)
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#define PDA_PDA_DMA_EN_REG (0x380)
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#define PDA_PDA_DMA_RST_REG (0x384)
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#define PDA_PDA_DMA_TOP_REG (0x388)
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#define PDA_PDA_SECURE_REG (0x38c)
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#define PDA_PDA_TILE_STATUS_REG (0x390)
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#define PDA_PDA_DCM_DIS_REG (0x394)
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#define PDA_PDA_DCM_ST_REG (0x398)
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#define PDA_PDAI_P1_ERR_STAT_REG (0x39c)
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#define PDA_PDATI_P1_ERR_STAT_REG (0x3a0)
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#define PDA_PDAI_P2_ERR_STAT_REG (0x3a4)
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#define PDA_PDATI_P2_ERR_STAT_REG (0x3a8)
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#define PDA_PDAO_P1_ERR_STAT_REG (0x3ac)
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#define PDA_PDA_ERR_STAT_EN_REG (0x3b0)
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#define PDA_PDA_ERR_STAT_REG (0x3b4)
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#define PDA_PDA_TOP_CTL_REG (0x3b8)
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#define PDA_PDA_DEBUG_SEL_REG (0x3bc)
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#define PDA_PDA_IRQ_TRIG_REG (0x3c0)
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#define PDA_PDAI_P1_BASE_ADDR_MSB_REG (0x3c4)
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#define PDA_PDATI_P1_BASE_ADDR_MSB_REG (0x3c8)
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#define PDA_PDAI_P2_BASE_ADDR_MSB_REG (0x3cc)
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#define PDA_PDATI_P2_BASE_ADDR_MSB_REG (0x3d0)
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#define PDA_PDAO_P1_BASE_ADDR_MSB_REG (0x3d4)
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#define PDA_PDAO_DMA_EXISTED_ECO_REG (0x3d8)
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#define PDA_PDA_DEBUG_DATA_REG (0x3dc)
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union _REG_PDA_CFG_0_ {
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struct /* 0x0000 */
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{
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unsigned int PDA_WIDTH : 16; /* 0.. 16, 0x0000FFFF */
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unsigned int PDA_HEIGHT : 16; /* 16.. 32, 0xFFFF0080 */
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} Bits;
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unsigned int Raw;
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};
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union _REG_PDA_CFG_1_ {
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struct /* 0x0004 */
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{
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unsigned int PDA_EN : 1; /* 0.. 0, 0x00000001 */
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unsigned int PDA_PR_XNUM : 5; /* 1.. 5, 0x0000003E */
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unsigned int PDA_PR_YNUM : 5; /* 6.. 10, 0x00007C0 */
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unsigned int PDA_PAT_WIDTH : 10; /* 11.. 20, 0x001FF800 */
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unsigned int PDA_BIN_FCTR : 2; /* 21.. 22, 0x00600000 */
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unsigned int PDA_RNG_ST : 6; /* 23.. 28, 0x1F800080 */
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unsigned int PDA_SHF_0 : 3; /* 29.. 31, 0xE0000000 */
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} Bits;
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unsigned int Raw;
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};
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union _REG_PDA_CFG_2_ {
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struct /* 0x0008 */
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{
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unsigned int PDA_SHF_1 : 3;
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unsigned int PDA_SHF_2 : 3;
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unsigned int PDA_RGN_NUM : 6;
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unsigned int PDA_TBL_STRIDE : 16;
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unsigned int rsv_28 : 4;
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} Bits;
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unsigned int Raw;
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};
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union _REG_PDA_CFG_3_ {
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struct /* 0x000C */
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{
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unsigned int PDA_POS_L_0 : 9;
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unsigned int PDA_POS_L_1 : 9;
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unsigned int PDA_POS_L_2 : 9;
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unsigned int rsv_27 : 5;
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} Bits;
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unsigned int Raw;
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};
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union _REG_PDA_CFG_4_ {
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struct /* 0x0010 */
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{
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unsigned int PDA_POS_L_3 : 9;
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unsigned int PDA_POS_L_4 : 9;
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unsigned int PDA_POS_L_5 : 9;
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unsigned int rsv_27 : 5;
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} Bits;
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unsigned int Raw;
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};
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union _REG_PDA_CFG_5_ {
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struct /* 0x0014 */
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{
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unsigned int PDA_POS_L_6 : 9;
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unsigned int PDA_POS_L_7 : 9;
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unsigned int PDA_POS_L_8 : 9;
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unsigned int rsv_27 : 5;
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} Bits;
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unsigned int Raw;
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};
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union _REG_PDA_CFG_6_ {
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struct /* 0x0018 */
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{
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unsigned int PDA_POS_L_9 : 9;
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unsigned int PDA_POS_L_10 : 9;
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unsigned int PDA_POS_L_11 : 9;
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unsigned int rsv_27 : 5;
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} Bits;
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unsigned int Raw;
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};
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union _REG_PDA_CFG_7_ {
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struct /* 0x001C */
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{
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unsigned int PDA_POS_L_12 : 9;
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unsigned int PDA_POS_L_13 : 9;
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unsigned int PDA_POS_L_14 : 9;
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unsigned int rsv_27 : 5;
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} Bits;
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unsigned int Raw;
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};
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union _REG_PDA_CFG_8_ {
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struct /* 0x0020 */
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{
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unsigned int PDA_POS_L_15 : 9;
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unsigned int PDA_POS_R_0 : 9;
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unsigned int PDA_POS_R_1 : 9;
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unsigned int rsv_27 : 5;
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} Bits;
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unsigned int Raw;
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};
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union _REG_PDA_CFG_9_ {
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struct /* 0x0024 */
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{
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unsigned int PDA_POS_R_2 : 9;
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unsigned int PDA_POS_R_3 : 9;
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unsigned int PDA_POS_R_4 : 9;
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unsigned int rsv_27 : 5;
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} Bits;
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unsigned int Raw;
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};
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union _REG_PDA_CFG_10_ {
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struct /* 0x0028 */
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{
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unsigned int PDA_POS_R_5 : 9;
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unsigned int PDA_POS_R_6 : 9;
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unsigned int PDA_POS_R_7 : 9;
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unsigned int rsv_27 : 5;
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} Bits;
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unsigned int Raw;
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};
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union _REG_PDA_CFG_11_ {
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struct /* 0x002C */
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{
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unsigned int PDA_POS_R_8 : 9;
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unsigned int PDA_POS_R_9 : 9;
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unsigned int PDA_POS_R_10 : 9;
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unsigned int rsv_27 : 5;
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} Bits;
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unsigned int Raw;
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};
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union _REG_PDA_CFG_12_ {
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struct /* 0x0030 */
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{
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unsigned int PDA_POS_R_11 : 9;
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unsigned int PDA_POS_R_12 : 9;
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unsigned int PDA_POS_R_13 : 9;
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unsigned int rsv_27 : 5;
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} Bits;
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unsigned int Raw;
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};
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union _REG_PDA_CFG_13_ {
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struct /* 0x0034 */
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{
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unsigned int PDA_POS_R_14 : 9;
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unsigned int PDA_POS_R_15 : 9;
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unsigned int rsv_18 : 14;
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} Bits;
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unsigned int Raw;
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};
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struct _pda_a_reg_t_ {
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union _REG_PDA_CFG_0_ PDA_CFG_0;
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union _REG_PDA_CFG_1_ PDA_CFG_1;
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union _REG_PDA_CFG_2_ PDA_CFG_2;
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union _REG_PDA_CFG_3_ PDA_CFG_3;
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union _REG_PDA_CFG_4_ PDA_CFG_4;
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union _REG_PDA_CFG_5_ PDA_CFG_5;
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union _REG_PDA_CFG_6_ PDA_CFG_6;
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union _REG_PDA_CFG_7_ PDA_CFG_7;
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union _REG_PDA_CFG_8_ PDA_CFG_8;
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union _REG_PDA_CFG_9_ PDA_CFG_9;
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union _REG_PDA_CFG_10_ PDA_CFG_10;
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union _REG_PDA_CFG_11_ PDA_CFG_11;
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union _REG_PDA_CFG_12_ PDA_CFG_12;
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union _REG_PDA_CFG_13_ PDA_CFG_13;
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};
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struct PDA_Init_Data {
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unsigned int Kversion;
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};
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//Datastructure for 1024 ROI
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struct PDA_Data_t {
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unsigned int rgn_x[PDAROIARRAYMAX];
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unsigned int rgn_y[PDAROIARRAYMAX];
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unsigned int rgn_h[PDAROIARRAYMAX];
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unsigned int rgn_w[PDAROIARRAYMAX];
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unsigned int rgn_iw[PDAROIARRAYMAX];
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unsigned int xnum;
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unsigned int ynum;
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unsigned int woverlap;
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unsigned int hoverlap;
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unsigned int ImageSize;
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unsigned int TableSize;
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unsigned int OutputSize;
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unsigned int ROInumber;
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int FD_L_Image;
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int FD_R_Image;
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int FD_L_Table;
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int FD_R_Table;
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int FD_Output;
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struct _pda_a_reg_t_ PDA_FrameSetting;
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unsigned int PDA_PDAI_P1_BASE_ADDR;
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unsigned int PDA_PDATI_P1_BASE_ADDR;
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unsigned int PDA_PDAI_P2_BASE_ADDR;
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unsigned int PDA_PDATI_P2_BASE_ADDR;
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unsigned int PDA_PDAO_P1_BASE_ADDR;
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|
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int Status;
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unsigned int Timeout;
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|
|
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unsigned int nNumerousROI;
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};
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|
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struct PDA_Data_t_v2 {
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// flexible roi
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unsigned int rgn_x[PDAROIARRAYMAX];
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unsigned int rgn_y[PDAROIARRAYMAX];
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unsigned int rgn_h[PDAROIARRAYMAX];
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|
unsigned int rgn_w[PDAROIARRAYMAX];
|
|
unsigned int rgn_iw[PDAROIARRAYMAX];
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|
|
|
unsigned int ROInumber;
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|
|
|
// fix roi
|
|
unsigned int fix_rgn_x[FIXROIARRAYMAX];
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|
unsigned int fix_rgn_y[FIXROIARRAYMAX];
|
|
unsigned int fix_rgn_h[FIXROIARRAYMAX];
|
|
unsigned int fix_rgn_w[FIXROIARRAYMAX];
|
|
unsigned int fix_rgn_iw[FIXROIARRAYMAX];
|
|
|
|
unsigned int xnum[FIXROIARRAYMAX];
|
|
unsigned int ynum[FIXROIARRAYMAX];
|
|
unsigned int woverlap[FIXROIARRAYMAX];
|
|
unsigned int hoverlap[FIXROIARRAYMAX];
|
|
|
|
unsigned int nNumerousROI;
|
|
|
|
// common data
|
|
unsigned int ImageSize;
|
|
unsigned int TableSize;
|
|
unsigned int OutputSize;
|
|
|
|
int FD_L_Image;
|
|
int FD_R_Image;
|
|
int FD_L_Table;
|
|
int FD_R_Table;
|
|
int FD_Output;
|
|
|
|
struct _pda_a_reg_t_ PDA_FrameSetting;
|
|
|
|
unsigned int PDA_PDAI_P1_BASE_ADDR;
|
|
unsigned int PDA_PDATI_P1_BASE_ADDR;
|
|
unsigned int PDA_PDAI_P2_BASE_ADDR;
|
|
unsigned int PDA_PDATI_P2_BASE_ADDR;
|
|
unsigned int PDA_PDAO_P1_BASE_ADDR;
|
|
|
|
int Status;
|
|
unsigned int Timeout;
|
|
};
|
|
|
|
struct pda_mmu {
|
|
struct dma_buf *dma_buf;
|
|
struct dma_buf_attachment *attach;
|
|
struct sg_table *sgt;
|
|
};
|
|
|
|
// PDA clock info.
|
|
struct PDA_CLK_STRUCT {
|
|
struct clk *CG_PDA_TOP_MUX;
|
|
};
|
|
|
|
// pda device information
|
|
struct PDA_device {
|
|
int HWstatus;
|
|
void __iomem *m_pda_base;
|
|
int irq;
|
|
};
|
|
|
|
enum PDA_CMD_ENUM {
|
|
PDA_CMD_RESET, /* Reset */
|
|
PDA_CMD_ENQUE_WAITIRQ, /* PDA Enque And Wait Irq */
|
|
PDA_CMD_GET_VERSION, /* PDA Enque And Wait Irq */
|
|
PDA_CMD_TOTAL,
|
|
};
|
|
|
|
#define PDA_RESET _IO(PDA_MAGIC, PDA_CMD_RESET)
|
|
#define PDA_ENQUE_WAITIRQ \
|
|
_IOWR(PDA_MAGIC, PDA_CMD_ENQUE_WAITIRQ, struct PDA_Data_t)
|
|
#define PDA_ENQUE_WAITIRQ_V2 \
|
|
_IOWR(PDA_MAGIC, PDA_CMD_ENQUE_WAITIRQ, struct PDA_Data_t_v2)
|
|
#define PDA_GET_VERSION \
|
|
_IOWR(PDA_MAGIC, PDA_CMD_GET_VERSION, struct PDA_Init_Data)
|
|
|
|
#endif/*__MTK_PDA_HW_H__*/
|