138 lines
2.7 KiB
C
138 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2020 MediaTek Inc.
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*/
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#ifndef __MVPU_CMD_DATA_H__
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#define __MVPU_CMD_DATA_H__
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#define MVPU_PE_NUM 64
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#define MVPU_DUP_BUF_SIZE (2 * MVPU_PE_NUM)
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#define MVPU_REQUEST_NAME_SIZE 32
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#define MVPU_MPU_SEGMENT_NUMS 39
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#define MVPU_MIN_CMDBUF_NUM 2
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#define MVPU_CMD_INFO_IDX 0
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#define MVPU_CMD_KREG_BASE_IDX 1
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#define MVPU_CMD_LITE_SIZE_0 0x12E
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#define MVPU_CMD_LITE_SIZE_1 0x14A
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#ifndef MVPU_SECURITY
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#define MVPU_SECURITY
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#endif
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#ifdef MVPU_SECURITY
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#define BUF_NUM_MASK 0x0000FFFF
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#define KERARG_NUM_MASK 0x3FFF0000
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#define KERARG_NUM_SHIFT 16
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#define SEC_LEVEL_MASK 0xC0000000
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#define SEC_LEVEL_SHIFT 30
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enum MVPU_SEC_LEVEL {
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SEC_LVL_CHECK = 0,
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SEC_LVL_CHECK_ALL = 1,
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SEC_LVL_PROTECT = 2,
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SEC_LVL_END,
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};
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#endif
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struct BundleHeader {
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union {
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unsigned int dwValue;
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struct {
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unsigned int kreg_bundle_thread_mode_cfg : 8;
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unsigned int kreg_bundle_high_priority : 1;
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unsigned int kreg_bundle_interrupt_en : 1;
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unsigned int kreg_0x0000_rsv0 : 2;
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unsigned int kreg_kernel_thread_mode : 2;
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unsigned int kreg_0x0000_rsv1 : 2;
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unsigned int kreg_kernel_num : 16;
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} s;
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} reg_bundle_setting_0;
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union {
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unsigned int dwValue;
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struct {
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unsigned int kreg_bundle_cfg_base : 32;
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} s;
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} reg_bundle_setting_1;
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union {
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unsigned int dwValue;
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struct {
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unsigned int kreg_bundle_event_id : 32;
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} s;
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} reg_bundle_setting_2;
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union {
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unsigned int dwValue;
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struct {
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unsigned int kreg_kernel_start_cnt : 16;
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unsigned int kreg_bundle_skip_dma_num : 4;
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} s;
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} reg_bundle_setting_3;
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};
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/* MVPU command structure*/
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struct mvpu_request {
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struct BundleHeader header;
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uint32_t algo_id;
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char name[MVPU_REQUEST_NAME_SIZE];
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/* driver info, exception etc */
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uint32_t drv_info;
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uint32_t drv_ret;
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/* mpu setting */
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uint16_t mpu_num;
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uint32_t mpu_seg[MVPU_MPU_SEGMENT_NUMS];
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/* debug mode */
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/* 0x0 : debugger */
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/* 0x1 : rv break debug */
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/* 0x2 : safe mode for memory in-order */
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uint16_t debug_mode;
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/* debugger id when rv debug */
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uint16_t debug_id;
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/* PMU setting */
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uint16_t pmu_mode;
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uint16_t pmc_mode;
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uint32_t pmu_buff;
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uint32_t buff_size;
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#ifdef MVPU_SECURITY
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uint32_t batch_name_hash;
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uint32_t buf_num;
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uint32_t rp_num;
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uint64_t sec_chk_addr;
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uint64_t sec_buf_size;
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uint64_t sec_buf_attr;
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uint64_t target_buf_old_base;
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uint64_t target_buf_old_offset;
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uint64_t target_buf_new_base;
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uint64_t target_buf_new_offset;
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uint32_t kerarg_num;
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uint64_t kerarg_buf_id;
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uint64_t kerarg_offset;
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uint64_t kerarg_size;
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uint32_t primem_num;
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uint64_t primem_src_buf_id;
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uint64_t primem_dst_buf_id;
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uint64_t primem_src_offset;
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uint64_t primem_dst_offset;
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uint64_t primem_size;
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#endif
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} __packed;
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#endif
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