302 lines
8.1 KiB
C
302 lines
8.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2018 MediaTek Inc.
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*
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* Author: Daniel Huang <daniel.huang@mediatek.com>
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*
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*/
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#ifndef _MTK_IMGSYS_CMDQ_H_
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#define _MTK_IMGSYS_CMDQ_H_
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#include <linux/platform_device.h>
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#include <linux/soc/mediatek/mtk-cmdq-ext.h>
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#include <linux/dma-fence.h>
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#include "mmdvfs_v3.h"
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#include "mtk_imgsys-dev.h"
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#include "mtk_imgsys-sys.h"
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#define CMDQ_STOP_FUNC (1)
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#ifndef CONFIG_FPGA_EARLY_PORTING
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#define DVFS_QOS_READY (1)
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#else
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#define DVFS_QOS_READY (0)
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#endif
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#define CMDQ_REFACTOR (1)
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#define MAX_FRAME_IN_TASK 64
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#define CMDQ_CB_KTHREAD (1)
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#ifdef GCE_SUPPORT_REPLACE_MODE
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#undef GCE_SUPPORT_REPLACE_MODE
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#endif
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#define GCE_SUPPORT_REPLACE_MODE (0)
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typedef uint32_t pseudo_gce_cmd_addr_t;
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#define IMGSYS_CMDQ_SYSTRACE_BEGIN(fmt, args...) do { \
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if (imgsys_cmdq_ftrace_enabled()) { \
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IMGSYS_TRACE_FORCE_BEGIN(fmt, ##args); \
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} \
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} while (0)
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#define IMGSYS_CMDQ_SYSTRACE_END() do { \
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if (imgsys_cmdq_ftrace_enabled()) { \
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IMGSYS_TRACE_FORCE_END(); \
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} \
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} while (0)
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struct task_timestamp {
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dma_addr_t dma_pa;
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uint32_t *dma_va;
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uint32_t num;
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uint32_t ofst;
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};
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struct mtk_imgsys_cmdq_timestamp {
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u64 tsReqStart;
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u64 tsFlushStart;
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u64 tsCmdqCbStart;
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u64 tsCmdqCbEnd;
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u64 tsCmdqCbWorkStart;
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u64 tsUserCbStart;
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u64 tsUserCbEnd;
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u64 tsReqEnd;
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u64 tsDvfsQosStart;
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u64 tsDvfsQosEnd;
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};
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struct mtk_imgsys_fence {
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u32 event_id;
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u32 thd_idx;
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u32 fence_fd;
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struct dma_fence *kfence;
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struct dma_fence_cb cb;
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};
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struct mtk_imgsys_cb_param {
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#if CMDQ_CB_KTHREAD
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struct kthread_work cmdq_cb_work;
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#else
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struct work_struct cmdq_cb_work;
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#endif
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struct cmdq_pkt *pkt;
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struct swfrm_info_t *frm_info;
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struct mtk_imgsys_cmdq_timestamp cmdqTs;
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struct mtk_imgsys_dev *imgsys_dev;
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struct cmdq_client *clt;
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struct task_timestamp taskTs;
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void (*user_cmdq_cb)(struct cmdq_cb_data data, uint32_t subfidx, bool isLastTaskInReq);
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void (*user_cmdq_err_cb)(struct cmdq_cb_data data, uint32_t fail_subfidx, bool isHWhang,
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uint32_t hangEvent);
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int req_fd;
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int req_no;
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int frm_no;
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u32 hw_comb;
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s32 err;
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u32 frm_idx;
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u32 frm_num;
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u32 blk_idx;
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u32 blk_num;
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u32 is_earlycb;
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s32 group_id;
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u32 thd_idx;
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u32 task_id;
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u32 task_num;
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u32 task_cnt;
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size_t pkt_ofst[MAX_FRAME_IN_TASK];
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bool isBlkLast;
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bool isFrmLast;
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bool isTaskLast;
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struct mtk_imgsys_fence waitfence[KFENCE_MAX];
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struct mtk_imgsys_fence notifence[KFENCE_MAX];
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};
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enum mtk_imgsys_cmd {
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IMGSYS_CMD_LOAD = 0,
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IMGSYS_CMD_MOVE,
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IMGSYS_CMD_READ,
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IMGSYS_CMD_WRITE,
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IMGSYS_CMD_POLL,
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IMGSYS_CMD_WAIT,
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IMGSYS_CMD_UPDATE,
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IMGSYS_CMD_ACQUIRE,
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IMGSYS_CMD_TIME,
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IMGSYS_CMD_STOP
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};
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enum mtk_imgsys_task_pri {
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IMGSYS_PRI_HIGH = 95,
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IMGSYS_PRI_MEDIUM = 85,
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IMGSYS_PRI_LOW = 50
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};
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struct imgsys_event_info {
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int req_fd;
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int req_no;
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int frm_no;
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u64 ts;
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struct swfrm_info_t *frm_info;
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struct cmdq_pkt *pkt;
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struct mtk_imgsys_cb_param *cb_param;
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};
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struct imgsys_event_history {
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int st;
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struct imgsys_event_info set;
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struct imgsys_event_info wait;
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};
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struct imgsys_event_table {
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u16 event; /* cmdq event enum value */
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char dts_name[256];
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};
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struct imgsys_dvfs_group {
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u16 g_id;
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u32 g_hw;
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};
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struct Command {
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enum mtk_imgsys_cmd opcode;
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union {
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// For load, move, read
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struct {
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uint32_t mask;
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pseudo_gce_cmd_addr_t target;
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pseudo_gce_cmd_addr_t source;
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} __packed;
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// For write and poll
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struct {
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uint32_t dummy;
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pseudo_gce_cmd_addr_t address;
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uint32_t value;
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} __packed;
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// For wait and update event
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struct {
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uint32_t event;
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uint32_t action;
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} __packed;
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} u;
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} __packed;
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void imgsys_cmdq_init(struct mtk_imgsys_dev *imgsys_dev, const int nr_imgsys_dev);
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void imgsys_cmdq_release(struct mtk_imgsys_dev *imgsys_dev);
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void imgsys_cmdq_streamon(struct mtk_imgsys_dev *imgsys_dev);
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void imgsys_cmdq_streamoff(struct mtk_imgsys_dev *imgsys_dev);
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int imgsys_cmdq_sendtask(struct mtk_imgsys_dev *imgsys_dev,
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struct swfrm_info_t *frm_info,
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void (*cmdq_cb)(struct cmdq_cb_data data,
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uint32_t uinfo_idx, bool isLastTaskInReq),
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void (*cmdq_err_cb)(struct cmdq_cb_data data,
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uint32_t fail_uinfo_idx, bool isHWhang,
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uint32_t hangEvent));
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/*int imgsys_cmdq_parser(struct swfrm_info_t *frm_info, struct cmdq_pkt *pkt,
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struct Command *cmd, u32 hw_comb,
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dma_addr_t dma_pa, uint32_t *num, u32 thd_idx);
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int imgsys_cmdq_sec_sendtask(struct mtk_imgsys_dev *imgsys_dev);
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void imgsys_cmdq_sec_cmd(struct cmdq_pkt *pkt);
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*/
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void imgsys_cmdq_clearevent(struct mtk_imgsys_dev *imgsys_dev, int event_id);
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bool imgsys_cmdq_ftrace_enabled(void);
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#if DVFS_QOS_READY
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void mtk_imgsys_mmdvfs_init(struct mtk_imgsys_dev *imgsys_dev);
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void mtk_imgsys_mmdvfs_uninit(struct mtk_imgsys_dev *imgsys_dev);
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/*void mtk_imgsys_mmdvfs_set(struct mtk_imgsys_dev *imgsys_dev,
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struct swfrm_info_t *frm_info,
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bool isSet);
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*/
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void mtk_imgsys_mmqos_init(struct mtk_imgsys_dev *imgsys_dev);
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void mtk_imgsys_mmqos_uninit(struct mtk_imgsys_dev *imgsys_dev);
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/*void mtk_imgsys_mmqos_set_by_scen(struct mtk_imgsys_dev *imgsys_dev,
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struct swfrm_info_t *frm_info,
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bool isSet);
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void mtk_imgsys_mmqos_reset(struct mtk_imgsys_dev *imgsys_dev);
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void mtk_imgsys_mmdvfs_mmqos_cal(struct mtk_imgsys_dev *imgsys_dev,
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struct swfrm_info_t *frm_info,
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bool isSet);
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void mtk_imgsys_mmqos_bw_cal(struct mtk_imgsys_dev *imgsys_dev,
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void *smi_port, uint32_t hw_comb,
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uint32_t port_st, uint32_t port_num, uint32_t port_id);
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void mtk_imgsys_mmqos_ts_cal(struct mtk_imgsys_dev *imgsys_dev,
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struct mtk_imgsys_cb_param *cb_param, uint32_t hw_comb);
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*/
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void mtk_imgsys_power_ctrl(struct mtk_imgsys_dev *imgsys_dev, bool isPowerOn);
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void mtk_imgsys_mmqos_monitor(struct mtk_imgsys_dev *imgsys_dev, u32 state);
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#endif
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bool imgsys_cmdq_ts_enable(void);
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u32 imgsys_wpe_bwlog_enable(void);
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bool imgsys_cmdq_ts_dbg_enable(void);
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bool imgsys_dvfs_dbg_enable(void);
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bool imgsys_quick_onoff_enable(void);
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/* ##### */
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struct platform_device *mtk_imgsys_cmdq_get_plat_dev(struct platform_device *pdev);
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struct mtk_imgcmdq_dev {
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struct device *dev;
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const struct imgsys_cmdq_cust_data *cust_data;
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};
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struct imgsys_cmdq_cust_data {
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void (*cmdq_init)(struct mtk_imgsys_dev *imgsys_dev, const int nr_imgsys_dev);
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void (*cmdq_release)(struct mtk_imgsys_dev *imgsys_dev);
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void (*cmdq_streamon)(struct mtk_imgsys_dev *imgsys_dev);
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void (*cmdq_streamoff)(struct mtk_imgsys_dev *imgsys_dev);
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int (*cmdq_sendtask)(struct mtk_imgsys_dev *imgsys_dev,
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struct swfrm_info_t *frm_info,
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void (*cmdq_cb)(struct cmdq_cb_data data,
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uint32_t uinfo_idx, bool isLastTaskInReq),
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void (*cmdq_err_cb)(struct cmdq_cb_data data,
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uint32_t fail_uinfo_idx, bool isHWhang, uint32_t hangEvent));
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int (*cmdq_parser)(struct swfrm_info_t *frm_info, struct cmdq_pkt *pkt,
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struct Command *cmd, u32 hw_comb, u32 cmd_num,
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dma_addr_t dma_pa, uint32_t *num, u32 thd_idx);
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int (*cmdq_sec_sendtask)(struct mtk_imgsys_dev *imgsys_dev);
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void (*cmdq_sec_cmd)(struct cmdq_pkt *pkt);
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void (*cmdq_clearevent)(int event_id);
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#if DVFS_QOS_READY
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void (*mmdvfs_init)(struct mtk_imgsys_dev *imgsys_dev);
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void (*mmdvfs_uninit)(struct mtk_imgsys_dev *imgsys_dev);
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void (*mmdvfs_set)(struct mtk_imgsys_dev *imgsys_dev,
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struct swfrm_info_t *frm_info,
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bool isSet);
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void (*mmqos_init)(struct mtk_imgsys_dev *imgsys_dev);
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void (*mmqos_uninit)(struct mtk_imgsys_dev *imgsys_dev);
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void (*mmqos_set_by_scen)(struct mtk_imgsys_dev *imgsys_dev,
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struct swfrm_info_t *frm_info,
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bool isSet);
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void (*mmqos_reset)(struct mtk_imgsys_dev *imgsys_dev);
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void (*mmdvfs_mmqos_cal)(struct mtk_imgsys_dev *imgsys_dev,
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struct swfrm_info_t *frm_info,
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bool isSet);
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void (*mmqos_bw_cal)(struct mtk_imgsys_dev *imgsys_dev,
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void *smi_port, uint32_t hw_comb,
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uint32_t port_st, uint32_t port_num, uint32_t port_id);
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void (*mmqos_ts_cal)(struct mtk_imgsys_dev *imgsys_dev,
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struct mtk_imgsys_cb_param *cb_param, uint32_t hw_comb);
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void (*power_ctrl)(struct mtk_imgsys_dev *imgsys_dev, bool isPowerOn);
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void (*mmqos_monitor)(struct mtk_imgsys_dev *imgsys_dev, u32 state);
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#endif
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bool (*cmdq_ts_en)(void);
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u32 (*wpe_bwlog_en)(void);
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bool (*cmdq_ts_dbg_en)(void);
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bool (*dvfs_dbg_en)(void);
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bool (*quick_onoff_en)(void);
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};
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#endif /* _MTK_IMGSYS_CMDQ_H_ */
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