874 lines
27 KiB
C
Executable file
874 lines
27 KiB
C
Executable file
#ifndef CTS_CORE_H
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#define CTS_CORE_H
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#include "cts_config.h"
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enum cts_dev_hw_reg {
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#if defined(CONFIG_CTS_ICTYPE_ICNL9922C) ||\
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defined(CONFIG_CTS_ICTYPE_ICNL9951)
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CTS_DEV_HW_REG_HARDWARE_ID = 0x70000u,
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CTS_DEV_HW_REG_CLOCK_GATING = 0x70004u,
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CTS_DEV_HW_REG_RESET_CONFIG = 0x70008u,
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CTS_DEV_HW_REG_BOOT_MODE = 0x70010u,
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CTS_DEV_HW_REG_CURRENT_MODE = 0x70011u,
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CTS_DEV_HW_REG_DDI_REG_CTRL = 0x7002Cu,
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CTS_DEV_HW_REG_CLK_DIV_CFG = 0x70033u,
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CTS_DEV_HW_REG_HPPROG = 0x70074u,
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CTS_DEV_HW_REG_SET_RESET = 0x700F8u,
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CTS_DEV_HW_REG_HW_STATUS = 0x7401Bu,
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CTS_DEV_HW_REG_I2C_CFG = 0x77001u,
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#else
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CTS_DEV_HW_REG_HARDWARE_ID = 0x30000u,
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CTS_DEV_HW_REG_CLOCK_GATING = 0x30004u,
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CTS_DEV_HW_REG_RESET_CONFIG = 0x30008u,
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CTS_DEV_HW_REG_BOOT_MODE = 0x30010u,
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CTS_DEV_HW_REG_CURRENT_MODE = 0x30011u,
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CTS_DEV_HW_REG_DDI_REG_CTRL = 0x3002Cu,
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CTS_DEV_HW_REG_CLK_DIV_CFG = 0x30033u,
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CTS_DEV_HW_REG_HPPROG = 0x30074u,
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CTS_DEV_HW_REG_SET_RESET = 0x300F8u,
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CTS_DEV_HW_REG_HW_STATUS = 0x3401Bu,
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CTS_DEV_HW_REG_I2C_CFG = 0x37001u,
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#endif
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};
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enum cts_dev_boot_mode {
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CTS_DEV_BOOT_MODE_IDLE = 0,
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CTS_DEV_BOOT_MODE_FLASH = 1,
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CTS_DEV_BOOT_MODE_I2C_PRG_9911C = 2,
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CTS_DEV_BOOT_MODE_TCH_PRG_9916 = 2,
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CTS_DEV_BOOT_MODE_SRAM = 3,
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CTS_DEV_BOOT_MODE_DDI_PRG = 4,
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CTS_DEV_BOOT_MODE_SPI_PRG_9911C = 5,
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CTS_DEV_BOOT_MODE_MASK = 7,
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};
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/** I2C addresses(7bits), transfer size and bitrate */
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#define CTS_DEV_NORMAL_MODE_I2CADDR (0x48)
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#define CTS_DEV_PROGRAM_MODE_I2CADDR (0x30)
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#define CTS_DEV_NORMAL_MODE_ADDR_WIDTH (2)
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#define CTS_DEV_PROGRAM_MODE_ADDR_WIDTH (3)
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#define CTS_DEV_NORMAL_MODE_SPIADDR (0xF0)
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#define CTS_DEV_PROGRAM_MODE_SPIADDR (0x60)
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/** Chipone firmware register addresses under normal mode */
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enum cts_device_fw_reg {
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CTS_DEVICE_FW_REG_WORK_MODE = 0x0000,
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CTS_DEVICE_FW_REG_SYS_BUSY = 0x0001,
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CTS_DEVICE_FW_REG_DATA_READY = 0x0002,
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CTS_DEVICE_FW_REG_CMD = 0x0004,
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CTS_DEVICE_FW_REG_POWER_MODE = 0x0005,
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CTS_DEVICE_FW_REG_FW_LIB_MAIN_VERSION = 0x0009,
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CTS_DEVICE_FW_REG_CHIP_TYPE = 0x000A,
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CTS_DEVICE_FW_REG_VERSION = 0x000C,
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CTS_DEVICE_FW_REG_DDI_VERSION = 0x0010,
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CTS_DEVICE_FW_REG_GET_WORK_MODE = 0x003F,
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CTS_DEVICE_FW_REG_FW_LIB_SUB_VERSION = 0x0047,
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CTS_DEVICE_FW_REG_COMPENSATE_CAP_READY = 0x004E,
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CTS_DEVICE_FW_REG_TOUCH_INFO = 0x1000,
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CTS_DEVICE_FW_REG_RAW_DATA = 0x2000,
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CTS_DEVICE_FW_REG_DIFF_DATA = 0x3000,
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CTS_DEVICE_FW_REG_GESTURE_INFO = 0x7000,
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CTS_DEVICE_FW_REG_PANEL_PARAM = 0x8000,
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CTS_DEVICE_FW_REG_NUM_TX = 0x8007,
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CTS_DEVICE_FW_REG_NUM_RX = 0x8008,
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CTS_DEVICE_FW_REG_INT_KEEP_TIME = 0x8047,
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CTS_DEVICE_FW_REG_RAWDATA_TARGET = 0x8049,
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CTS_DEVICE_FW_REG_X_RESOLUTION = 0x8090,
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CTS_DEVICE_FW_REG_Y_RESOLUTION = 0x8092,
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CTS_DEVICE_FW_REG_SWAP_AXES = 0x8094,
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CTS_DEVICE_FW_REG_GLOVE_MODE = 0x8095,
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CTS_DEVICE_FW_REG_TEST_WITH_DISPLAY_ON = 0x80A3,
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CTS_DEVICE_FW_REG_INT_MODE = 0x80D8,
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CTS_DEVICE_FW_REG_EARJACK_DETECT_SUPP = 0x8113,
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CTS_DEVICE_FW_REG_AUTO_COMPENSATE_EN = 0x8114,
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CTS_DEVICE_FW_REG_ESD_PROTECTION = 0x8156,
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CTS_DEVICE_FW_REG_FLAG_BITS = 0x8158,
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CTS_DEVICE_FW_REG_COMPENSATE_CAP = 0xA000,
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CTS_DEVICE_FW_REG_DEBUG_INTF = 0xF000,
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};
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/** Hardware IDs, read from hardware id register */
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enum cts_dev_hwid {
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CTS_DEV_HWID_ICNL9911 = 0x990100u,
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CTS_DEV_HWID_ICNL9911S = 0x990110u,
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CTS_DEV_HWID_ICNL9911C = 0x991110u,
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CTS_DEV_HWID_ICNL9916 = 0x990160u,
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CTS_DEV_HWID_ICNL9916C = 0x99C160u,
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CTS_DEV_HWID_ICNL9922 = 0x990220u,
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CTS_DEV_HWID_ICNL9922C = 0x99C220u,
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CTS_DEV_HWID_ICNL9951 = 0x990510u,
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CTS_DEV_HWID_ANY = 0,
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CTS_DEV_HWID_INVALID = 0xFFFFFFFFu,
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};
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/* Firmware IDs, read from firmware register @ref CTS_DEV_FW_REG_CHIP_TYPE
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* under normal mode
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*/
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enum cts_dev_fwid {
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CTS_DEV_FWID_ICNL9911 = 0x9911u,
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CTS_DEV_FWID_ICNL9911S = 0x9964u,
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CTS_DEV_FWID_ICNL9911C = 0x9954u,
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CTS_DEV_FWID_ICNL9916 = 0x9916u,
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CTS_DEV_FWID_ICNL9916C = 0x9959u,
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CTS_DEV_FWID_ICNL9922 = 0x9922u,
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CTS_DEV_FWID_ICNL9922C = 0x9965u,
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CTS_DEV_FWID_ICNL9951 = 0x9951u,
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CTS_DEV_FWID_ANY = 0u,
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CTS_DEV_FWID_INVALID = 0xFFFFu
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};
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/** Commands written to firmware register @ref CTS_DEVICE_FW_REG_CMD under normal mode */
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enum cts_firmware_cmd {
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CTS_CMD_RESET = 1,
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CTS_CMD_SUSPEND = 2,
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CTS_CMD_ENTER_WRITE_PARA_TO_FLASH_MODE = 3,
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CTS_CMD_WRITE_PARA_TO_FLASH = 4,
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CTS_CMD_WRTITE_INT_HIGH = 5,
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CTS_CMD_WRTITE_INT_LOW = 6,
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CTS_CMD_RELASE_INT_TEST = 7,
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CTS_CMD_RECOVERY_TX_VOL = 0x10,
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CTS_CMD_DEC_TX_VOL_1 = 0x11,
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CTS_CMD_DEC_TX_VOL_2 = 0x12,
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CTS_CMD_DEC_TX_VOL_3 = 0x13,
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CTS_CMD_DEC_TX_VOL_4 = 0x14,
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CTS_CMD_DEC_TX_VOL_5 = 0x15,
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CTS_CMD_DEC_TX_VOL_6 = 0x16,
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CTS_CMD_ENABLE_READ_RAWDATA = 0x20,
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CTS_CMD_DISABLE_READ_RAWDATA = 0x21,
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CTS_CMD_SUSPEND_WITH_GESTURE = 0x40,
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CTS_CMD_QUIT_GESTURE_MONITOR = 0x41,
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CTS_CMD_CHARGER_ATTACHED = 0x55,
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CTS_CMD_EARJACK_ATTACHED = 0x57,
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CTS_CMD_EARJACK_DETACHED = 0x58,
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CTS_CMD_CHARGER_DETACHED = 0x66,
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CTS_CMD_ENABLE_FW_LOG_REDIRECT = 0x86,
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CTS_CMD_DISABLE_FW_LOG_REDIRECT = 0x87,
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CTS_CMD_ENABLE_READ_CNEG = 0x88,
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CTS_CMD_DISABLE_READ_CNEG = 0x89,
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CTS_CMD_FW_LOG_SHOW_FINISH = 0xE0,
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#ifdef CONFIG_CTS_TP_PROXIMITY
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CTS_CMD_PROXIMITY_STATUS = 0x80,
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/* For vivo code, make a distinction between palm func and proximity func */
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CTS_CMD_PROXIMITY_NEAR_VIVO = 0x30,
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CTS_CMD_PROXIMITY_FAR_VIVO = 0x31,
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#endif
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};
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#pragma pack(1)
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/** Touch message read back from chip */
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struct cts_device_touch_msg {
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u8 id;
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__le16 x;
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__le16 y;
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u8 pressure;
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u8 event;
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#define CTS_DEVICE_TOUCH_EVENT_NONE (0)
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#define CTS_DEVICE_TOUCH_EVENT_DOWN (1)
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#define CTS_DEVICE_TOUCH_EVENT_MOVE (2)
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#define CTS_DEVICE_TOUCH_EVENT_STAY (3)
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#define CTS_DEVICE_TOUCH_EVENT_UP (4)
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};
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struct cts_firmware_status {
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uint16_t charger:1;
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uint16_t proximity:1;
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uint16_t earjack:1;
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uint16_t knuckle:1;
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uint16_t glove:1;
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uint16_t pocket:1;
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uint16_t game:1;
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uint16_t reserved:1;
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uint16_t high_temperature:1;
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uint16_t low_temperature:1;
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uint16_t bend_mode:1;
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uint16_t palm_status:1;
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uint16_t noise_mode:1;
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uint16_t base_trace:1;
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uint16_t water_mode:1;
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uint16_t ground:1;
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};
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/** Touch debug messages read back from chip [40 bytes] */
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struct cts_touch_debug_msg {
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u8 protocol_version;
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u8 fw_version;
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u32 reset_flag;
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u16 frame_index;
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u16 firmware_status;
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u8 proximity;
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u8 work_mode;
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u8 power_mode;
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u8 curr_freq;
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u8 esd_0a_status;
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u8 fw_esd_status;
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u8 landscape_mode;
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u16 curr_freq_noise;
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u16 max_diff;
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u8 max_diff_row;
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u8 max_diff_col;
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u16 max_neg_diff;
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u8 max_neg_diff_row;
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u8 max_neg_diff_col;
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u8 data_method;
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u8 data_type;
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u8 reserved[11];
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};
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/** Touch information read back from chip */
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struct cts_device_touch_info {
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u8 vkey_state;
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u8 num_msg;
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struct cts_device_touch_msg msgs[CFG_CTS_MAX_TOUCH_NUM];
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struct cts_touch_debug_msg debug_msg;
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};
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/** Gesture trace point read back from chip */
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struct cts_device_gesture_point {
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__le16 x;
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__le16 y;
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};
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/** Gesture information read back from chip */
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/* total size 112 bytes */
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struct cts_device_gesture_info {
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u8 gesture_id;
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#define CTS_GESTURE_UP (0x11)
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#define CTS_GESTURE_C (0x12)
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#define CTS_GESTURE_O (0x13)
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#define CTS_GESTURE_M (0x14)
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#define CTS_GESTURE_W (0x15)
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#define CTS_GESTURE_E (0x16)
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#define CTS_GESTURE_S (0x17)
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#define CTS_GESTURE_B (0x18)
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#define CTS_GESTURE_T (0x19)
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#define CTS_GESTURE_H (0x1A)
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#define CTS_GESTURE_F (0x1B)
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#define CTS_GESTURE_X (0x1C)
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#define CTS_GESTURE_Z (0x1D)
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#define CTS_GESTURE_V (0x1E)
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#define CTS_GESTURE_D_TAP (0x50)
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#define CTS_GESTURE_TAP (0x7F)
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u8 num_points;
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#define CTS_CHIP_MAX_GESTURE_TRACE_POINT (27u)
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struct cts_device_gesture_point points[CTS_CHIP_MAX_GESTURE_TRACE_POINT];
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u8 reserved[2];
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};
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struct cts_tcs_cmd {
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uint16_t cmd_id : 8;
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uint16_t class_id : 5;
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uint16_t is_write : 1;
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uint16_t is_read : 1;
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uint16_t base_flag : 1;
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};
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#pragma pack()
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struct cts_device;
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enum cts_crc_type {
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CTS_CRC16 = 1,
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CTS_CRC32 = 2,
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};
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/** Chip hardware data, will never change */
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struct cts_device_hwdata {
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const char *name;
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u32 hwid;
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u16 fwid;
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u8 num_row;
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u8 num_col;
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u32 sram_size;
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/* Address width under program mode */
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u8 program_addr_width;
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const struct cts_sfctrl *sfctrl;
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int (*enable_access_ddi_reg)(struct cts_device *cts_dev, bool enable);
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};
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enum int_data_type {
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INT_DATA_TYPE_NONE = 0,
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INT_DATA_TYPE_RAWDATA = BIT(0),
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INT_DATA_TYPE_MANUAL_DIFF = BIT(1),
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INT_DATA_TYPE_REAL_DIFF = BIT(2),
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INT_DATA_TYPE_NOISE_DIFF = BIT(3),
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INT_DATA_TYPE_BASEDATA = BIT(4),
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INT_DATA_TYPE_CNEGDATA = BIT(5),
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INT_DATA_TYPE_MASK = 0x3F,
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};
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enum int_data_method {
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INT_DATA_METHOD_NONE = 0,
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INT_DATA_METHOD_HOST = 1,
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INT_DATA_METHOD_POLLING = 2,
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INT_DATA_METHOD_DEBUG = 3,
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INT_DATA_METHOD_CNT = 4,
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};
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/** Chip firmware data */
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struct cts_device_fwdata {
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u16 version;
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u16 res_x;
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u16 res_y;
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u8 rows;
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u8 cols;
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bool flip_x;
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bool flip_y;
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bool swap_axes;
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u8 ddi_version;
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u8 int_mode;
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u8 esd_method;
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u16 lib_version;
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u16 int_keep_time;
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u16 rawdata_target;
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bool has_int_data;
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u8 int_data_method;
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u16 int_data_types;
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size_t int_data_size;
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};
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/** Chip runtime data */
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struct cts_device_rtdata {
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u8 slave_addr;
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int addr_width;
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bool program_mode;
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bool has_flash;
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bool suspended;
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bool updating;
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bool testing;
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bool update_work_run;
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bool gesture_wakeup_enabled;
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bool charger_exist;
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bool fw_log_redirect_enabled;
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bool glove_mode_enabled;
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u8 esd_count;
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u16 firmware_status;
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struct cts_device_touch_info touch_info;
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struct cts_device_gesture_info gesture_info;
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#ifdef CONFIG_CTS_TP_PROXIMITY
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bool proximity_status;
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int proximity_num;
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#endif
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u16 tcscmd[ALIGN(PAGE_SIZE + 10, 4)];
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int tcscmd_len;
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u16 curr_cmd;
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int curr_len;
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};
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struct cts_device {
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struct cts_platform_data *pdata;
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const struct cts_device_hwdata *hwdata;
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struct cts_device_fwdata fwdata;
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struct cts_device_rtdata rtdata;
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const struct cts_flash *flash;
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bool enabled;
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#ifdef CFG_CTS_FW_UPDATE_FILE_LOAD
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char config_fw_name[CFG_CTS_FW_FILE_NAME_MAX_LEN + 1];
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#endif
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u8 int_data[ALIGN(CFG_CTS_INT_DATA_MAX_SIZE + 10, 4)];
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};
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struct cts_platform_data;
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struct chipone_ts_data {
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#ifdef CONFIG_CTS_I2C_HOST
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struct i2c_client *i2c_client;
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#else
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struct spi_device *spi_client;
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#endif
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struct device *device;
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struct cts_device cts_dev;
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struct cts_platform_data *pdata;
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struct workqueue_struct *workqueue;
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struct delayed_work fw_upgrade_work;
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struct work_struct ts_resume_work;
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#ifdef CONFIG_CTS_CHARGER_DETECT
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void *charger_detect_data;
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#endif
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#ifdef CONFIG_CTS_EARJACK_DETECT
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void *earjack_detect_data;
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#endif
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#ifdef CONFIG_CTS_ESD_PROTECTION
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struct workqueue_struct *esd_workqueue;
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struct delayed_work esd_work;
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bool esd_enabled;
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int esd_check_fail_cnt;
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#endif
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#ifdef CFG_CTS_HEARTBEAT_MECHANISM
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struct workqueue_struct *heart_workqueue;
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struct delayed_work heart_work;
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#endif
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#ifdef CONFIG_CTS_LEGACY_TOOL
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struct proc_dir_entry *procfs_entry;
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#endif
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void *oem_data;
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bool force_reflash;
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struct kobject *suspend_kobj;
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};
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/* drv deleted by chenjiaxi, this is already defined in #include <asm/unaligned.h>, begin */
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#if 0
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static inline u32 get_unaligned_le24(const void *p)
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{
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const u8 *puc = (const u8 *)p;
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return (puc[0] | (puc[1] << 8) | (puc[2] << 16));
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}
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static inline u32 get_unaligned_be24(const void *p)
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{
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const u8 *puc = (const u8 *)p;
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return (puc[2] | (puc[1] << 8) | (puc[0] << 16));
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}
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static inline void put_unaligned_be24(u32 v, void *p)
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{
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u8 *puc = (u8 *) p;
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puc[0] = (v >> 16) & 0xFF;
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puc[1] = (v >> 8) & 0xFF;
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puc[2] = (v >> 0) & 0xFF;
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}
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#endif
|
|
/* drv deleted by chenjiaxi, this is already defined in #include <asm/unaligned.h>, end */
|
|
|
|
#define wrap(max, x) ((max) - 1 - (x))
|
|
|
|
extern void cts_lock_device(const struct cts_device *cts_dev);
|
|
extern void cts_unlock_device(const struct cts_device *cts_dev);
|
|
|
|
extern int cts_dev_readb(const struct cts_device *cts_dev,
|
|
u32 addr, u8 *b, int retry, int delay);
|
|
extern int cts_dev_writeb(const struct cts_device *cts_dev,
|
|
u32 addr, u8 b, int retry, int delay);
|
|
|
|
extern int cts_sram_writeb_retry(const struct cts_device *cts_dev,
|
|
u32 addr, u8 b, int retry, int delay);
|
|
extern int cts_sram_writew_retry(const struct cts_device *cts_dev,
|
|
u32 addr, u16 w, int retry, int delay);
|
|
extern int cts_sram_writel_retry(const struct cts_device *cts_dev,
|
|
u32 addr, u32 l, int retry, int delay);
|
|
extern int cts_sram_writesb_retry(const struct cts_device *cts_dev,
|
|
u32 addr, const void *src, size_t len, int retry, int delay);
|
|
extern int cts_sram_writesb_check_crc_retry(const struct cts_device *cts_dev,
|
|
u32 addr, const void *src, size_t len, u32 crc, int retry);
|
|
|
|
extern int cts_sram_readb_retry(const struct cts_device *cts_dev,
|
|
u32 addr, u8 *b, int retry, int delay);
|
|
extern int cts_sram_readw_retry(const struct cts_device *cts_dev,
|
|
u32 addr, u16 *w, int retry, int delay);
|
|
extern int cts_sram_readl_retry(const struct cts_device *cts_dev,
|
|
u32 addr, u32 *l, int retry, int delay);
|
|
extern int cts_sram_readsb_retry(const struct cts_device *cts_dev,
|
|
u32 addr, void *dst, size_t len, int retry, int delay);
|
|
|
|
extern int cts_fw_reg_writeb_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u8 b, int retry, int delay);
|
|
extern int cts_fw_reg_writew_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u16 w, int retry, int delay);
|
|
extern int cts_fw_reg_writel_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u32 l, int retry, int delay);
|
|
extern int cts_fw_reg_writesb_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, const void *src, size_t len, int retry, int delay);
|
|
|
|
extern int cts_fw_reg_readb_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u8 *b, int retry, int delay);
|
|
extern int cts_fw_reg_readw_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u16 *w, int retry, int delay);
|
|
extern int cts_fw_reg_readl_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u32 *l, int retry, int delay);
|
|
extern int cts_fw_reg_readsb_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, void *dst, size_t len,
|
|
int retry, int delay);
|
|
extern int cts_fw_reg_readsb_retry_delay_idle(const struct cts_device *cts_dev,
|
|
u32 reg_addr, void *dst, size_t len, int retry, int delay, int idle);
|
|
|
|
extern int cts_hw_reg_writeb_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u8 b, int retry, int delay);
|
|
extern int cts_hw_reg_writew_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u16 w, int retry, int delay);
|
|
extern int cts_hw_reg_writel_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u32 l, int retry, int delay);
|
|
extern int cts_hw_reg_writesb_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, const void *src, size_t len, int retry, int delay);
|
|
|
|
extern int cts_hw_reg_readb_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u8 *b, int retry, int delay);
|
|
extern int cts_hw_reg_readw_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u16 *w, int retry, int delay);
|
|
extern int cts_hw_reg_readl_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u32 *l, int retry, int delay);
|
|
extern int cts_hw_reg_readsb_retry(const struct cts_device *cts_dev,
|
|
u32 reg_addr, void *dst, size_t len, int retry, int delay);
|
|
|
|
static inline int cts_hw_reg_readb(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u8 *b)
|
|
{
|
|
return cts_hw_reg_readb_retry(cts_dev, reg_addr, b, 1, 0);
|
|
}
|
|
|
|
static inline int cts_hw_reg_writeb(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u8 b)
|
|
{
|
|
return cts_hw_reg_writeb_retry(cts_dev, reg_addr, b, 1, 0);
|
|
}
|
|
|
|
static inline int cts_hw_reg_writew(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u16 w)
|
|
{
|
|
return cts_hw_reg_writew_retry(cts_dev, reg_addr, w, 1, 0);
|
|
}
|
|
|
|
static inline int cts_fw_reg_writeb(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u8 b)
|
|
{
|
|
return cts_fw_reg_writeb_retry(cts_dev, reg_addr, b, 1, 0);
|
|
}
|
|
|
|
static inline int cts_fw_reg_writew(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u16 w)
|
|
{
|
|
return cts_fw_reg_writew_retry(cts_dev, reg_addr, w, 1, 0);
|
|
}
|
|
|
|
static inline int cts_fw_reg_writel(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u32 l)
|
|
{
|
|
return cts_fw_reg_writel_retry(cts_dev, reg_addr, l, 1, 0);
|
|
}
|
|
|
|
static inline int cts_fw_reg_writesb(const struct cts_device *cts_dev,
|
|
u32 reg_addr, const void *src, size_t len)
|
|
{
|
|
return cts_fw_reg_writesb_retry(cts_dev, reg_addr, src, len, 1, 0);
|
|
}
|
|
|
|
static inline int cts_fw_reg_readb(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u8 *b)
|
|
{
|
|
return cts_fw_reg_readb_retry(cts_dev, reg_addr, b, 1, 0);
|
|
}
|
|
|
|
static inline int cts_fw_reg_readw(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u16 *w)
|
|
{
|
|
return cts_fw_reg_readw_retry(cts_dev, reg_addr, w, 1, 0);
|
|
}
|
|
|
|
static inline int cts_fw_reg_readl(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u32 *l)
|
|
{
|
|
return cts_fw_reg_readl_retry(cts_dev, reg_addr, l, 1, 0);
|
|
}
|
|
|
|
static inline int cts_fw_reg_readsb(const struct cts_device *cts_dev,
|
|
u32 reg_addr, void *dst, size_t len)
|
|
{
|
|
return cts_fw_reg_readsb_retry(cts_dev, reg_addr, dst, len, 1, 0);
|
|
}
|
|
|
|
static inline int cts_fw_reg_readsb_delay_idle(const struct cts_device *cts_dev,
|
|
u32 reg_addr, void *dst, size_t len, int idle)
|
|
{
|
|
return cts_fw_reg_readsb_retry_delay_idle(cts_dev, reg_addr, dst, len,
|
|
1, 0, idle);
|
|
}
|
|
|
|
static inline int cts_hw_reg_writeb_relaxed(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u8 b)
|
|
{
|
|
return cts_hw_reg_writeb_retry(cts_dev, reg_addr, b, 1, 0);
|
|
}
|
|
|
|
static inline int cts_hw_reg_writew_relaxed(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u16 w)
|
|
{
|
|
return cts_hw_reg_writew_retry(cts_dev, reg_addr, w, 1, 0);
|
|
}
|
|
|
|
static inline int cts_hw_reg_writel_relaxed(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u32 l)
|
|
{
|
|
return cts_hw_reg_writel_retry(cts_dev, reg_addr, l, 1, 0);
|
|
}
|
|
|
|
static inline int cts_hw_reg_writesb(const struct cts_device *cts_dev,
|
|
u32 reg_addr, const void *src, size_t len)
|
|
{
|
|
return cts_hw_reg_writesb_retry(cts_dev, reg_addr, src, len, 1, 0);
|
|
}
|
|
|
|
static inline int cts_hw_reg_readb_relaxed(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u8 *b)
|
|
{
|
|
return cts_hw_reg_readb_retry(cts_dev, reg_addr, b, 1, 0);
|
|
}
|
|
|
|
static inline int cts_hw_reg_readw_relaxed(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u16 *w)
|
|
{
|
|
return cts_hw_reg_readw_retry(cts_dev, reg_addr, w, 1, 0);
|
|
}
|
|
|
|
static inline int cts_hw_reg_readl_relaxed(const struct cts_device *cts_dev,
|
|
u32 reg_addr, u32 *l)
|
|
{
|
|
return cts_hw_reg_readl_retry(cts_dev, reg_addr, l, 1, 0);
|
|
}
|
|
|
|
static inline int cts_hw_reg_readsb(const struct cts_device *cts_dev,
|
|
u32 reg_addr, void *dst, size_t len)
|
|
{
|
|
return cts_hw_reg_readsb_retry(cts_dev, reg_addr, dst, len, 1, 0);
|
|
}
|
|
|
|
static inline int cts_sram_writeb(const struct cts_device *cts_dev,
|
|
u32 addr, u8 b)
|
|
{
|
|
return cts_sram_writeb_retry(cts_dev, addr, b, 1, 0);
|
|
}
|
|
|
|
static inline int cts_sram_writew(const struct cts_device *cts_dev,
|
|
u32 addr, u16 w)
|
|
{
|
|
return cts_sram_writew_retry(cts_dev, addr, w, 1, 0);
|
|
}
|
|
|
|
static inline int cts_sram_writel(const struct cts_device *cts_dev,
|
|
u32 addr, u32 l)
|
|
{
|
|
return cts_sram_writel_retry(cts_dev, addr, l, 1, 0);
|
|
}
|
|
|
|
static inline int cts_sram_writesb(const struct cts_device *cts_dev, u32 addr,
|
|
const void *src, size_t len)
|
|
{
|
|
return cts_sram_writesb_retry(cts_dev, addr, src, len, 1, 0);
|
|
}
|
|
|
|
static inline int cts_sram_readb(const struct cts_device *cts_dev,
|
|
u32 addr, u8 *b)
|
|
{
|
|
return cts_sram_readb_retry(cts_dev, addr, b, 1, 0);
|
|
}
|
|
|
|
static inline int cts_sram_readw(const struct cts_device *cts_dev,
|
|
u32 addr, u16 *w)
|
|
{
|
|
return cts_sram_readw_retry(cts_dev, addr, w, 1, 0);
|
|
}
|
|
|
|
static inline int cts_sram_readl(const struct cts_device *cts_dev,
|
|
u32 addr, u32 *l)
|
|
{
|
|
return cts_sram_readl_retry(cts_dev, addr, l, 1, 0);
|
|
}
|
|
|
|
static inline int cts_sram_readsb(const struct cts_device *cts_dev,
|
|
u32 addr, void *dst, size_t len)
|
|
{
|
|
return cts_sram_readsb_retry(cts_dev, addr, dst, len, 1, 0);
|
|
}
|
|
|
|
#ifdef CONFIG_CTS_I2C_HOST
|
|
static inline void cts_set_program_addr(struct cts_device *cts_dev)
|
|
{
|
|
cts_dev->rtdata.slave_addr = CTS_DEV_PROGRAM_MODE_I2CADDR;
|
|
cts_dev->rtdata.program_mode = true;
|
|
cts_dev->rtdata.addr_width = CTS_DEV_PROGRAM_MODE_ADDR_WIDTH;
|
|
}
|
|
|
|
static inline void cts_set_normal_addr(struct cts_device *cts_dev)
|
|
{
|
|
cts_dev->rtdata.slave_addr = CTS_DEV_NORMAL_MODE_I2CADDR;
|
|
cts_dev->rtdata.program_mode = false;
|
|
cts_dev->rtdata.addr_width = CTS_DEV_NORMAL_MODE_ADDR_WIDTH;
|
|
}
|
|
#else
|
|
static inline void cts_set_program_addr(struct cts_device *cts_dev)
|
|
{
|
|
cts_dev->rtdata.slave_addr = CTS_DEV_PROGRAM_MODE_SPIADDR;
|
|
cts_dev->rtdata.program_mode = true;
|
|
cts_dev->rtdata.addr_width = CTS_DEV_PROGRAM_MODE_ADDR_WIDTH;
|
|
}
|
|
|
|
static inline void cts_set_normal_addr(struct cts_device *cts_dev)
|
|
{
|
|
cts_dev->rtdata.slave_addr = CTS_DEV_NORMAL_MODE_SPIADDR;
|
|
cts_dev->rtdata.program_mode = false;
|
|
cts_dev->rtdata.addr_width = CTS_DEV_NORMAL_MODE_ADDR_WIDTH;
|
|
}
|
|
#endif
|
|
|
|
extern int cts_irq_handler(struct cts_device *cts_dev);
|
|
extern void cts_firmware_upgrade_work(struct work_struct *work);
|
|
|
|
extern bool cts_is_device_suspended(const struct cts_device *cts_dev);
|
|
extern int cts_suspend_device(struct cts_device *cts_dev);
|
|
extern int cts_resume_device(struct cts_device *cts_dev);
|
|
|
|
extern bool cts_is_device_program_mode(const struct cts_device *cts_dev);
|
|
extern int cts_enter_program_mode(struct cts_device *cts_dev);
|
|
extern int cts_enter_normal_mode(struct cts_device *cts_dev);
|
|
|
|
extern int cts_probe_device(struct cts_device *cts_dev);
|
|
extern int cts_send_command(const struct cts_device *cts_dev, u8 cmd);
|
|
|
|
extern int cts_get_hwid(struct cts_device *cts_dev, u32 *hwid);
|
|
extern int cts_read_sram_normal_mode(const struct cts_device *cts_dev,
|
|
u32 addr, void *dst, size_t len, int retry, int delay);
|
|
|
|
#ifdef CFG_CTS_GESTURE
|
|
extern void cts_enable_gesture_wakeup(struct cts_device *cts_dev);
|
|
extern void cts_disable_gesture_wakeup(struct cts_device *cts_dev);
|
|
extern bool cts_is_gesture_wakeup_enabled(const struct cts_device *cts_dev);
|
|
extern int cts_get_gesture_info(struct cts_device *cts_dev, void *gesture_info);
|
|
#endif /* CFG_CTS_GESTURE */
|
|
|
|
extern int cts_set_int_data_types(struct cts_device *cts_dev, u16 types);
|
|
extern int cts_set_int_data_method(struct cts_device *cts_dev, u8 method);
|
|
|
|
#ifdef CONFIG_CTS_ESD_PROTECTION
|
|
extern void cts_init_esd_protection(struct chipone_ts_data *cts_data);
|
|
extern void cts_enable_esd_protection(struct chipone_ts_data *cts_data);
|
|
extern void cts_disable_esd_protection(struct chipone_ts_data *cts_data);
|
|
extern void cts_deinit_esd_protection(struct chipone_ts_data *cts_data);
|
|
#else /* CONFIG_CTS_ESD_PROTECTION */
|
|
static inline void cts_init_esd_protection(struct chipone_ts_data *cts_data)
|
|
{
|
|
}
|
|
|
|
static inline void cts_enable_esd_protection(struct chipone_ts_data *cts_data)
|
|
{
|
|
}
|
|
|
|
static inline void cts_disable_esd_protection(struct chipone_ts_data *cts_data)
|
|
{
|
|
}
|
|
|
|
static inline void cts_deinit_esd_protection(struct chipone_ts_data *cts_data)
|
|
{
|
|
}
|
|
#endif /* CONFIG_CTS_ESD_PROTECTION */
|
|
|
|
#ifdef CFG_CTS_HEARTBEAT_MECHANISM
|
|
void cts_show_touch_debug_msg(void *debug);
|
|
void cts_heartbeat_mechanism_work(struct work_struct *work);
|
|
void cts_enable_heartbeat_mechanism(struct chipone_ts_data *cts_data);
|
|
void cts_disable_heartbeat_mechanism(struct chipone_ts_data *cts_data);
|
|
#endif
|
|
|
|
#ifdef CONFIG_CTS_GLOVE
|
|
extern int cts_enter_glove_mode(struct cts_device *cts_dev);
|
|
extern int cts_exit_glove_mode(struct cts_device *cts_dev);
|
|
int cts_is_glove_enabled(const struct cts_device *cts_dev);
|
|
#else
|
|
static inline int cts_enter_glove_mode(struct cts_device *cts_dev)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline int cts_exit_glove_mode(struct cts_device *cts_dev)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline int cts_is_glove_enabled(const struct cts_device *cts_dev)
|
|
{
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_CTS_CHARGER_DETECT
|
|
extern bool cts_is_charger_exist(struct cts_device *cts_dev);
|
|
extern int cts_set_dev_charger_attached(struct cts_device *cts_dev,
|
|
bool attached);
|
|
#else /* CONFIG_CTS_CHARGER_DETECT */
|
|
static inline bool cts_is_charger_exist(struct cts_device *cts_dev)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline int cts_set_dev_charger_attached(struct cts_device *cts_dev,
|
|
bool attached)
|
|
{
|
|
return 0;
|
|
}
|
|
#endif /* CONFIG_CTS_CHARGER_DETECT */
|
|
|
|
#ifdef CONFIG_CTS_EARJACK_DETECT
|
|
extern bool cts_is_earjack_exist(struct cts_device *cts_dev);
|
|
extern int cts_set_dev_earjack_attached(struct cts_device *cts_dev, bool attached);
|
|
#else /* CONFIG_CTS_EARJACK_DETECT */
|
|
static inline bool cts_is_earjack_exist(struct cts_device *cts_dev)
|
|
{
|
|
return false;
|
|
}
|
|
static inline int cts_set_dev_earjack_attached(struct cts_device *cts_dev, bool attached)
|
|
{
|
|
return 0;
|
|
}
|
|
#endif /* CONFIG_CTS_EARJACK_DETECT */
|
|
|
|
#ifdef CONFIG_CTS_LEGACY_TOOL
|
|
extern int cts_tool_init(struct chipone_ts_data *cts_data);
|
|
extern void cts_tool_deinit(struct chipone_ts_data *data);
|
|
#else /* CONFIG_CTS_LEGACY_TOOL */
|
|
static inline int cts_tool_init(struct chipone_ts_data *cts_data)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline void cts_tool_deinit(struct chipone_ts_data *data)
|
|
{
|
|
}
|
|
#endif /* CONFIG_CTS_LEGACY_TOOL */
|
|
|
|
extern bool cts_is_device_enabled(const struct cts_device *cts_dev);
|
|
extern int cts_start_device(struct cts_device *cts_dev);
|
|
extern int cts_stop_device(struct cts_device *cts_dev);
|
|
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#ifdef CFG_CTS_FW_LOG_REDIRECT
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extern int cts_enable_fw_log_redirect(struct cts_device *cts_dev);
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extern int cts_disable_fw_log_redirect(struct cts_device *cts_dev);
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extern bool cts_is_fw_log_redirect(struct cts_device *cts_dev);
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extern int cts_fw_log_show_finish(struct cts_device *cts_dev);
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#endif
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#ifdef CFG_CTS_UPDATE_CRCCHECK
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extern int cts_sram_writesb_boot_crc_retry(const struct cts_device *cts_dev,
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size_t len, u32 crc, int retry);
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#endif
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extern const char *cts_dev_boot_mode2str(u8 boot_mode);
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extern bool cts_is_fwid_valid(u16 fwid);
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extern int cts_reset_device(struct cts_device *cts_dev);
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extern int kstrtobool(const char *s, bool *res);
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#endif /* CTS_CORE_H */
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