492 lines
7.7 KiB
C
492 lines
7.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2020 MediaTek Inc.
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// Author: Owen Chen <owen.chen@mediatek.com>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/seq_file.h>
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#include <dt-bindings/power/mt6853-power.h>
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#ifdef CONFIG_MTK_DEVAPC
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#include <mt-plat/devapc_public.h>
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#endif
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#include "clkdbg.h"
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#include "clkchk.h"
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/*
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* clkdbg dump_state
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*/
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static const char * const clk_names[] = {
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/* topckgen */
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"axi_sel",
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"spm_sel",
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"scp_sel",
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"bus_aximem_sel",
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"disp_sel",
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"mdp_sel",
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"img1_sel",
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"img2_sel",
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"ipe_sel",
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"dpe_sel",
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"cam_sel",
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"ccu_sel",
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"dsp_sel",
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"dsp1_sel",
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"dsp1_npupll_sel",
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"dsp2_sel",
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"dsp2_npupll_sel",
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"ipu_if_sel",
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"mfg_ref_sel",
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"mfg_pll_sel",
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"camtg_sel",
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"camtg2_sel",
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"camtg3_sel",
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"camtg4_sel",
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"camtg5_sel",
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"uart_sel",
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"spi_sel",
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"msdc50_0_h_sel",
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"msdc50_0_sel",
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"msdc30_1_sel",
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"audio_sel",
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"aud_intbus_sel",
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"pwrap_ulposc_sel",
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"atb_sel",
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"sspm_sel",
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"scam_sel",
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"disp_pwm_sel",
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"usb_sel",
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"ssusb_xhci_sel",
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"i2c_sel",
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"seninf_sel",
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"seninf1_sel",
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"seninf2_sel",
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"dxcc_sel",
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"aud_engen1_sel",
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"aud_engen2_sel",
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"aes_ufsfde_sel",
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"ufs_sel",
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"aud_1_sel",
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"aud_2_sel",
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"adsp_sel",
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"dpmaif_main_sel",
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"venc_sel",
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"vdec_sel",
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"camtm_sel",
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"pwm_sel",
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"audio_h_sel",
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"spmi_mst_sel",
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"dvfsrc_sel",
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"aes_msdcfde_sel",
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"mcupm_sel",
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"sflash_sel",
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"apll_i2s0_mck_sel",
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"apll_i2s1_mck_sel",
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"apll_i2s2_mck_sel",
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"apll_i2s3_mck_sel",
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"apll_i2s4_mck_sel",
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"apll_i2s5_mck_sel",
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"apll_i2s6_mck_sel",
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"apll_i2s7_mck_sel",
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"apll_i2s8_mck_sel",
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"apll_i2s9_mck_sel",
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/* topckgen */
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"apll12_div0",
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"apll12_div1",
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"apll12_div2",
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"apll12_div3",
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"apll12_div4",
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"apll12_divb",
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"apll12_div5",
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"apll12_div6",
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"apll12_div7",
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"apll12_div8",
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"apll12_div9",
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/* infracfg_ao */
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"ifrao_pmic_tmr",
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"ifrao_pmic_ap",
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"ifrao_gce",
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"ifrao_gce2",
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"ifrao_therm",
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"ifrao_i2c0",
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"ifrao_i2c1",
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"ifrao_i2c2",
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"ifrao_i2c3",
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"ifrao_pwm_hclk",
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"ifrao_pwm1",
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"ifrao_pwm2",
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"ifrao_pwm3",
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"ifrao_pwm4",
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"ifrao_pwm",
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"ifrao_uart0",
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"ifrao_uart1",
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"ifrao_uart2",
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"ifrao_uart3",
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"ifrao_gce_26m",
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"ifrao_dma",
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"ifrao_btif",
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"ifrao_spi0",
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"ifrao_msdc0",
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"ifrao_msdc1",
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"ifrao_msdc0_clk",
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"ifrao_auxadc",
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"ifrao_cpum",
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"ifrao_ccif1_ap",
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"ifrao_ccif1_md",
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"ifrao_pcie_tl_26m",
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"ifrao_msdc1_clk",
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"ifrao_msdc0_aes_clk",
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"ifrao_pcie_tl_96m",
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"ifrao_pcie_pl_p_250m",
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"ifrao_dapc",
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"ifrao_ccif_ap",
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"ifrao_audio",
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"ifrao_ccif_md",
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"ifrao_secore",
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"ifrao_ssusb",
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"ifrao_disp_pwm",
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"ifrao_cldmabclk",
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"ifrao_audio26m",
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"ifrao_spi1",
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"ifrao_i2c4",
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"ifrao_spi2",
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"ifrao_spi3",
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"ifrao_unipro_sysclk",
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"ifrao_ufs_bclk",
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"ifrao_i2c5",
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"ifrao_i2c5a",
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"ifrao_i2c5_imm",
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"ifrao_i2c1a",
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"ifrao_i2c1_imm",
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"ifrao_i2c2a",
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"ifrao_i2c2_imm",
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"ifrao_spi4",
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"ifrao_spi5",
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"ifrao_cq_dma",
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"ifrao_ufs",
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"ifrao_ufs_aes",
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"ifrao_ssusb_xhci",
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"ifrao_msdc0sf",
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"ifrao_msdc1sf",
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"ifrao_msdc2sf",
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"ifrao_i2c6",
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"ifrao_ap_msdc0",
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"ifrao_md_msdc0",
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"ifrao_ccif5_ap",
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"ifrao_ccif5_md",
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"ifrao_flashif_h_133m",
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"ifrao_ccif2_ap",
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"ifrao_ccif2_md",
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"ifrao_i2c7",
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"ifrao_i2c8",
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"ifrao_fbist2fpc",
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"ifrao_dapc_sync",
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"ifrao_ccif4_ap",
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"ifrao_ccif4_md",
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"ifrao_spi6_ck",
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"ifrao_spi7_ck",
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"ifrao_66m_peri_mclk",
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"ifrao_infra_133m",
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"ifrao_infra_66m",
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"ifrao_peri_bus_133m",
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"ifrao_peri_bus_66m",
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"ifrao_flash_26m",
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"ifrao_sflash_ck",
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"ifrao_ap_dma",
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/* apmixedsys */
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"armpll_ll",
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"armpll_bl0",
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"ccipll",
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"mpll",
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"mainpll",
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"univpll",
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"msdcpll",
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"mmpll",
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"adsppll",
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"mfgpll",
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"tvdpll",
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"apll1",
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"apll2",
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"npupll",
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"usbpll",
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/* apmixedsys */
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"mipic0",
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"mipic1",
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"pll_mipid26m_0_en",
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/* scp_adsp */
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"scp_par_audiodsp",
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/* imp_iic_wrap_c */
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"impc_ap_i2c10",
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"impc_ap_i2c11",
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/* audiosys */
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"aud_afe",
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"aud_22m",
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"aud_24m",
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"aud_apll2_tuner",
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"aud_apll_tuner",
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"aud_tdm_ck",
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"aud_adc",
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"aud_dac",
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"aud_dac_predis",
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"aud_tml",
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"aud_nle",
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"aud_i2s1_bclk",
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"aud_i2s2_bclk",
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"aud_i2s3_bclk",
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"aud_i2s4_bclk",
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"aud_connsys_i2s_asrc",
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"aud_general1_asrc",
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"aud_general2_asrc",
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"aud_dac_hires",
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"aud_adc_hires",
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"aud_adc_hires_tml",
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"aud_adda6_adc",
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"aud_adda6_adc_hires",
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"aud_3rd_dac",
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"aud_3rd_dac_predis",
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"aud_3rd_dac_tml",
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"aud_3rd_dac_hires",
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"aud_i2s5_bclk",
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"aud_i2s6_bclk",
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"aud_i2s7_bclk",
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"aud_i2s8_bclk",
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"aud_i2s9_bclk",
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/* imp_iic_wrap_e */
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"impe_ap_i2c3",
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/* imp_iic_wrap_s */
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"imps_ap_i2c5",
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"imps_ap_i2c7",
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"imps_ap_i2c8",
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"imps_ap_i2c9",
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/* imp_iic_wrap_ws */
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"impws_ap_i2c1",
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"impws_ap_i2c2",
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"impws_ap_i2c4",
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/* imp_iic_wrap_w */
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"impw_ap_i2c0",
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/* imp_iic_wrap_n */
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"impn_ap_i2c6",
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/* mfgcfg */
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"mfg_bg3d",
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/* mmsys_config */
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"mm_disp_mutex0",
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"mm_apb_bus",
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"mm_disp_ovl0",
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"mm_disp_rdma0",
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"mm_disp_ovl0_2l",
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"mm_disp_wdma0",
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"mm_disp_ccorr1",
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"mm_disp_rsz0",
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"mm_disp_aal0",
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"mm_disp_ccorr0",
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"mm_disp_color0",
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"mm_smi_infra",
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"mm_disp_dsc_wrap",
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"mm_disp_gamma0",
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"mm_disp_postmask0",
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"mm_disp_spr0",
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"mm_disp_dither0",
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"mm_smi_common",
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"mm_disp_cm0",
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"mm_dsi0",
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"mm_disp_fake_eng0",
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"mm_disp_fake_eng1",
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"mm_smi_gals",
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"mm_smi_iommu",
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"mm_dsi0_dsi_domain",
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"mm_disp_26m_ck",
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/* imgsys1 */
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"imgsys1_larb9",
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"imgsys1_larb10",
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"imgsys1_dip",
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"imgsys1_gals",
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/* imgsys2 */
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"imgsys2_larb9",
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"imgsys2_larb10",
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"imgsys2_mfb",
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"imgsys2_wpe",
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"imgsys2_mss",
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"imgsys2_gals",
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/* vdec_gcon */
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"vdec_larb1_cken",
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"vdec_cken",
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"vdec_active",
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/* venc_gcon */
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"venc_cke0_larb",
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"venc_cke1_venc",
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"venc_cke2_jpgenc",
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"venc_cke5_gals",
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/* apu_conn */
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"apuc_apu",
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"apuc_ahb",
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"apuc_axi",
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"apuc_isp",
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"apuc_cam_adl",
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"apuc_img_adl",
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"apuc_emi_26m",
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"apuc_vpu_udi",
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"apuc_edma_0",
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"apuc_edma_1",
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"apuc_edmal_0",
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"apuc_edmal_1",
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"apuc_mnoc",
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"apuc_tcm",
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"apuc_md32",
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"apuc_iommu_0",
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"apuc_md32_32k",
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/* apu_vcore */
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"apuv_ahb",
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"apuv_axi",
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"apuv_adl",
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"apuv_qos",
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/* apu0 */
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"apu0_apu",
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"apu0_axi_m",
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"apu0_jtag",
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"apu0_pclk",
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/* apu1 */
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"apu1_apu",
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"apu1_axi_m",
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"apu1_jtag",
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"apu1_pclk",
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/* camsys_main */
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"cam_m_larb13",
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"cam_m_larb14",
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"cam_m_reserved0",
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"cam_m_cam",
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"cam_m_camtg",
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"cam_m_seninf",
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"cam_m_camsv1",
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"cam_m_camsv2",
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"cam_m_camsv3",
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"cam_m_ccu0",
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"cam_m_ccu1",
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"cam_m_mraw0",
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"cam_m_reserved2",
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"cam_m_fake_eng",
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"cam_m_ccu_gals",
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"cam_m_cam2mm_gals",
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/* camsys_rawa */
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"cam_ra_larbx",
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"cam_ra_cam",
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"cam_ra_camtg",
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/* camsys_rawb */
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"cam_rb_larbx",
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"cam_rb_cam",
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"cam_rb_camtg",
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/* ipesys */
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"ipe_larb19",
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"ipe_larb20",
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"ipe_smi_subcom",
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"ipe_fd",
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"ipe_fe",
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"ipe_rsc",
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"ipe_dpe",
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"ipe_gals",
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/* mdpsys_config */
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"mdp_rdma0",
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"mdp_tdshp0",
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"mdp_img_dl_async0",
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"mdp_img_dl_async1",
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"mdp_rdma1",
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"mdp_tdshp1",
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"mdp_smi0",
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"mdp_apb_bus",
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"mdp_wrot0",
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"mdp_rsz0",
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"mdp_hdr0",
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"mdp_mutex0",
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"mdp_wrot1",
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"mdp_rsz1",
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"mdp_fake_eng0",
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"mdp_aal0",
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"mdp_aal1",
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"mdp_color0",
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"mdp_img_dl_rel0_as0",
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"mdp_img_dl_rel1_as1",
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};
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static const char * const *get_all_clk_names(void)
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{
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return clk_names;
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}
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/*
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* clkdbg pwr_status
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*/
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static u32 pwr_ofs[STA_NUM] = {
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[PWR_STA] = 0x16C,
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[PWR_STA2] = 0x170,
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[OTHER_STA] = 0x178,
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};
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u32 *get_spm_pwr_status(void)
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{
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static void __iomem *scpsys_base, *pwr_addr[STA_NUM];
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static u32 pwr_sta[STA_NUM];
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int i;
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for (i = 0; i < STA_NUM; i++) {
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if (!scpsys_base)
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scpsys_base = ioremap(0x10006000, PAGE_SIZE);
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if (pwr_ofs[i] && !pwr_sta[i]) {
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pwr_addr[i] = scpsys_base + pwr_ofs[i];
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pwr_sta[i] = clk_readl(pwr_addr[i]);
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}
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}
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return pwr_sta;
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}
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/*
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* init functions
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*/
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static struct clkdbg_ops clkdbg_mt6853_ops = {
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.get_all_fmeter_clks = NULL,
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.prepare_fmeter = NULL,
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.unprepare_fmeter = NULL,
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.fmeter_freq = NULL,
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.get_all_clk_names = get_all_clk_names,
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.get_spm_pwr_status = get_spm_pwr_status,
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};
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void clkdbg_set_cfg(void)
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{
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set_clkdbg_ops(&clkdbg_mt6853_ops);
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}
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