138 lines
3.2 KiB
C
138 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2022 MediaTek Inc.
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* Author: Owen Chen <owen.chen@mediatek.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt6985-clk.h>
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#define MT_CCF_BRINGUP 1
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/* Regular Number Definition */
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#define INV_OFS -1
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#define INV_BIT -1
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static const struct mtk_gate_regs scp_cg_regs = {
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.set_ofs = 0x154,
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.clr_ofs = 0x158,
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.sta_ofs = 0x154,
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};
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#define GATE_SCP(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &scp_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr_inv, \
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}
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static const struct mtk_gate scp_clks[] = {
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GATE_SCP(CLK_SCP_SET_SPI0, "scp_set_spi0",
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"ulposc_ck"/* parent */, 0),
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GATE_SCP(CLK_SCP_SET_SPI1, "scp_set_spi1",
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"ulposc_ck"/* parent */, 1),
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GATE_SCP(CLK_SCP_SET_SPI2, "scp_set_spi2",
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"ulposc_ck"/* parent */, 2),
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GATE_SCP(CLK_SCP_SET_SPI3, "scp_set_spi3",
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"ulposc_ck"/* parent */, 3),
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};
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static const struct mtk_clk_desc scp_mcd = {
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.clks = scp_clks,
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.num_clks = CLK_SCP_NR_CLK,
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};
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static const struct mtk_gate_regs scp_iic_cg_regs = {
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.set_ofs = 0xE18,
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.clr_ofs = 0xE14,
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.sta_ofs = 0xE10,
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};
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#define GATE_SCP_IIC(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &scp_iic_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr, \
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}
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static const struct mtk_gate scp_iic_clks[] = {
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GATE_SCP_IIC(CLK_SCP_IIC_I2C0, "scp_iic_i2c0",
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"i2c_pseudo_ck"/* parent */, 0),
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GATE_SCP_IIC(CLK_SCP_IIC_I2C1, "scp_iic_i2c1",
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"i2c_pseudo_ck"/* parent */, 1),
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GATE_SCP_IIC(CLK_SCP_IIC_I2C2, "scp_iic_i2c2",
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"i2c_pseudo_ck"/* parent */, 2),
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GATE_SCP_IIC(CLK_SCP_IIC_I2C3, "scp_iic_i2c3",
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"i2c_pseudo_ck"/* parent */, 3),
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GATE_SCP_IIC(CLK_SCP_IIC_I2C4, "scp_iic_i2c4",
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"i2c_pseudo_ck"/* parent */, 4),
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GATE_SCP_IIC(CLK_SCP_IIC_I2C5, "scp_iic_i2c5",
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"i2c_pseudo_ck"/* parent */, 5),
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GATE_SCP_IIC(CLK_SCP_IIC_I2C6, "scp_iic_i2c6",
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"i2c_pseudo_ck"/* parent */, 6),
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GATE_SCP_IIC(CLK_SCP_IIC_I2C7, "scp_iic_i2c7",
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"i2c_pseudo_ck"/* parent */, 7),
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};
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static const struct mtk_clk_desc scp_iic_mcd = {
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.clks = scp_iic_clks,
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.num_clks = CLK_SCP_IIC_NR_CLK,
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};
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static const struct of_device_id of_match_clk_mt6985_vlp[] = {
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{
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.compatible = "mediatek,mt6985-scp",
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.data = &scp_mcd,
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}, {
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.compatible = "mediatek,mt6985-scp_iic",
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.data = &scp_iic_mcd,
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}, {
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/* sentinel */
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}
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};
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static int clk_mt6985_vlp_grp_probe(struct platform_device *pdev)
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{
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int r;
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#if MT_CCF_BRINGUP
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pr_notice("%s: %s init begin\n", __func__, pdev->name);
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#endif
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r = mtk_clk_simple_probe(pdev);
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if (r)
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dev_err(&pdev->dev,
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"could not register clock provider: %s: %d\n",
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pdev->name, r);
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#if MT_CCF_BRINGUP
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pr_notice("%s: %s init end\n", __func__, pdev->name);
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#endif
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return r;
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}
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static struct platform_driver clk_mt6985_vlp_drv = {
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.probe = clk_mt6985_vlp_grp_probe,
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.driver = {
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.name = "clk-mt6985-vlp",
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.of_match_table = of_match_clk_mt6985_vlp,
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},
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};
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module_platform_driver(clk_mt6985_vlp_drv);
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MODULE_LICENSE("GPL");
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