208 lines
5.6 KiB
C
208 lines
5.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2022 MediaTek Inc.
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* Author: Chong-ming Wei <chong-ming.wei@mediatek.com>
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*/
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#ifndef _CLK_MT6886_FMETER_H
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#define _CLK_MT6886_FMETER_H
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/* generate from clock_table.xlsx from TOPCKGEN DE */
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/* CKGEN Part */
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#define FM_AXI_CK 1
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#define FM_AXI_CK_2 2
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#define FM_U_HAXI_CK 3
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#define FM_BUS_AXIMEM_CK 4
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#define FM_DISP0_CK 5
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#define FM_MDP0_CK 6
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#define FM_MMINFRA_CK 7
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#define FM_MMUP_CK 8
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#define FM_DSP_CK 9
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#define FM_DSP1_CK 10
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#define FM_DSP2_CK 11
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#define FM_DSP3_CK 12
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#define FM_DSP4_CK 13
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#define FM_DSP5_CK 14
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#define FM_DSP6_CK 15
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#define FM_DSP7_CK 16
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#define FM_CAMTG_CK 17
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#define FM_CAMTG2_CK 18
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#define FM_CAMTG3_CK 19
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#define FM_CAMTG4_CK 20
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#define FM_CAMTG5_CK 21
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#define FM_CAMTG6_CK 22
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#define FM_UART_CK 23
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#define FM_SPI_CK 24
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#define FM_MSDC_MACRO_CK 25
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#define FM_MSDC30_1_CK 26
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#define FM_MSDC30_2_CK 27
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#define FM_AUDIO_CK 28
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#define FM_AUD_INTBUS_CK 29
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#define FM_ATB_CK 30
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#define FM_DISP_PWM_CK 31
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#define FM_USB_CK 32
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#define FM_USB_XHCI_CK 33
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#define FM_USB_1P_CK 34
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#define FM_USB_XHCI_1P_CK 35
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#define FM_I2C_CK 36
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#define FM_SENINF_CK 37
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#define FM_SENINF1_CK 38
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#define FM_SENINF2_CK 39
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#define FM_SENINF3_CK 40
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#define FM_DXCC_CK 41
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#define FM_AUD_ENGEN1_CK 42
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#define FM_AUD_ENGEN2_CK 43
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#define FM_AES_UFSFDE_CK 44
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#define FM_U_CK 45
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#define FM_U_MBIST_CK 46
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#define FM_PEXTP_MBIST_CK 47
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#define FM_AUD_1_CK 48
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#define FM_AUD_2_CK 49
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#define FM_ADSP_CK 50
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#define FM_DPMAIF_MAIN_CK 51
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#define FM_VENC_CK 52
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#define FM_VDEC_CK 53
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#define FM_PWM_CK 54
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#define FM_AUDIO_H_CK 55
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#define FM_MCUPM_CK 56
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#define FM_MEM_SUB_CK 57
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#define FM_MEM_CK 58
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#define FM_U_MEM_CK 59
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#define FM_EMI_N_CK 60
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#define FM_DSI_OCC_CK 61
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#define FM_CCU_AHB_CK 62
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#define FM_AP2CONN_HOST_CK 63
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#define FM_IMG1_CK 64
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#define FM_IPE_CK 65
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#define FM_CAM_CK 66
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#define FM_CCUSYS_CK 67
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#define FM_CAMTM_CK 68
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#define FM_MCU_ACP_CK 69
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#define FM_CSI_OCC_SCAN_CK 70
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#define FM_IPSWEST_CK 71
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#define FM_IPSNORTH_CK 72
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#define FM_MCU_ATB_CK 73
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#define FM_AXI_L3GIC_CK 74
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#define FM_DUMMY_1_CK 75
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#define FM_DUMMY_2_CK 76
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#define FM_CKGEN_NUM 77
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/* ABIST Part */
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#define FM_LVTS_CKMON_LM 2
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#define FM_LVTS_CKMON_L8 4
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#define FM_LVTS_CKMON_L7 5
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#define FM_LVTS_CKMON_L6 6
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#define FM_LVTS_CKMON_L5 7
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#define FM_LVTS_CKMON_L4 8
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#define FM_LVTS_CKMON_L3 9
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#define FM_LVTS_CKMON_L2 10
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#define FM_LVTS_CKMON_L1 11
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#define FM_RCLRPLL_DIV4_CHC 16
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#define FM_RPHYPLL_DIV4_CHC 17
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#define FM_RCLRPLL_DIV4_CHA 24
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#define FM_RPHYPLL_DIV4_CHA 25
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#define FM_ADSPPLL_CK 28
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#define FM_APLL1_CK 29
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#define FM_APLL2_CK 30
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#define FM_APPLLGP_MON_FM_CK 31
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#define FM_UNIVPLL_DIV3_CK 32
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#define FM_UNIVPLL_DIV4_CK 33
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#define FM_UNIVPLL_DIV5_CK 34
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#define FM_UNIVPLL_DIV6_CK 35
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#define FM_UNIVPLL_DIV7_CK 36
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#define FM_CSI0A_CDPHY_DELAYCAL_CK 37
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#define FM_CSI0B_CDPHY_DELAYCAL_CK 38
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#define FM_CSI1A_DPHY_DELAYCAL_CK 39
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#define FM_CSI1B_DPHY_DELAYCAL_CK 40
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#define FM_CSI2A_DPHY_DELAYCAL_CK 41
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#define FM_CSI2B_DPHY_DELAYCAL_CK 42
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#define FM_CSI3A_DPHY_DELAYCAL_CK 43
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#define FM_CSI3B_DPHY_DELAYCAL_CK 44
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#define FM_DSI0_LNTC_DSICLK 49
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#define FM_DSI0_MPPLL_TST_CK 50
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#define FM_MMPLL_D4_CK 51
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#define FM_MAINPLL_CK 52
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#define FM_MDPLL1_FS26M_GUIDE 53
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#define FM_MMPLL_D5_CK 54
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#define FM_MMPLL_CK 55
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#define FM_MMPLL_D3_CK 56
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#define FM_MPLL_CK 57
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#define FM_MSDCPLL_CK 58
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#define FM_IMGPLL_CK 59
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#define FM_EMIPLL_CK 60
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#define FM_UFSPLL_CK 61
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#define FM_ULPOSC2_MON_V_VCORE_CK 62
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#define FM_ULPOSC_MON_VCROE_CK 63
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#define FM_UNIVPLL_CK 64
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#define FM_UNIVPLL_DIV2_CK 65
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#define FM_UNIVPLL_192M_CK 66
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#define FM_U_CLK2FREQ 67
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#define FM_WBG_DIG_BPLL_CK 68
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#define FM_WBG_DIG_WPLL_CK960 69
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#define FM_466M_FMEM_INFRASYS 70
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#define FM_MCUSYS_ARM_OUT_ALL 71
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#define FM_APPLLGP_MON_FM_CK_2 72
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#define FM_MMPLL_D6_CK 73
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#define FM_MMPLL_D7_CK 74
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#define FM_MMPLL_D9_CK 75
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#define FM_MAINPLL_DIV3_CK 76
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#define FM_MSDC11_IN_CK 77
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#define FM_MSDC01_IN_CK 78
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#define FM_F32K_VCORE_CK 79
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#define FM_MAINPLL_DIV4_CK 80
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#define FM_MAINPLL_DIV5_CK 81
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#define FM_MAINPLL_DIV6_CK 82
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#define FM_MAINPLL_DIV7_CK 83
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#define FM_UNIVPLL_DIV3_CK_2 84
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#define FM_APLL2_CKDIV_CK 85
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#define FM_APLL1_CKDIV_CK 86
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#define FM_ADSPPLL_CKDIV_CK 87
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#define FM_UFSPLL_CKDIV_CK 88
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#define FM_MPLL_CKDIV_CK 89
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#define FM_MMPLL_CKDIV_CK 90
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#define FM_MAINPLL_CKDIV_CK 91
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#define FM_IMGPLL_CKDIV_CK 92
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#define FM_EMIPLL_CKDIV_CK 93
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#define FM_MSDCPLL_CKDIV_CK 94
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#define FM_ABIST_NUM 95
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/* VLPCK Part */
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#define FM_SCP_VLP_CK 1
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#define FM_PWRAP_ULPOSC_CK 2
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#define FM_F26M_APXGPT_VLP_CK 3
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#define FM_DXCC_VLP_CK 4
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#define FM_SPMI_P_CK 5
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#define FM_SPMI_M_CK 6
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#define FM_DVFSRC_CK 7
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#define FM_PWM_VLP_CK 8
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#define FM_AXI_VLP_CK 9
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#define FM_DBGAO_26M_VLP_CK 10
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#define FM_SYSTIMER_26M_VLP_CK 11
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#define FM_SSPM_VLP_CK 12
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#define FM_SSPM_F26M_CK 13
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#define FM_SRCK_CK 14
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#define FM_SCP_SPI_CK 15
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#define FM_SCP_IIC_CK 16
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#define FM_PSVLP_CK 17
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#define FM_MD_BUCK_26M_CK 18
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#define FM_SSPM_ULPOSC_CK 19
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#define FM_CLKRTC 21
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#define FM_OSC_2 22
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#define FM_OSC_CK 23
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#define FM_OSC_CKDIV_CK 26
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#define FM_OSC_CKDIV_2 27
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#define FM_VLPCK_NUM 28
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enum fm_sys_id {
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FM_TOPCKGEN = 0,
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FM_APMIXED = 1,
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FM_VLP_CKSYS = 2,
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FM_MFGPLL = 3,
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FM_MFGSCPLL = 4,
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FM_CCIPLL = 5,
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FM_ARMPLL_LL = 6,
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FM_ARMPLL_BL = 7,
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FM_PTPPLL = 8,
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FM_SYS_NUM = 9,
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};
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#endif /* _CLK_MT6886_FMETER_H */
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