325 lines
8.8 KiB
C
325 lines
8.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2022 MediaTek Inc.
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* Author: Chuan-Wen Chen <chuan-wen.chen@mediatek.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt6835-clk.h>
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#define MT_CCF_BRINGUP 1
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/* Regular Number Definition */
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#define INV_OFS -1
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#define INV_BIT -1
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static const struct mtk_gate_regs impc_cg_regs = {
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.set_ofs = 0xE08,
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.clr_ofs = 0xE04,
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.sta_ofs = 0xE00,
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};
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#define GATE_IMPC(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &impc_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr, \
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}
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static const struct mtk_gate impc_clks[] = {
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GATE_IMPC(CLK_IMPC_AP_CLOCK_I2C10, "impc_ap_clock_i2c10",
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"i2c_pseudo10_ck"/* parent */, 0),
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GATE_IMPC(CLK_IMPC_AP_CLOCK_I2C11, "impc_ap_clock_i2c11",
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"i2c_pseudo11_ck"/* parent */, 1),
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};
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static const struct mtk_clk_desc impc_mcd = {
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.clks = impc_clks,
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.num_clks = CLK_IMPC_NR_CLK,
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};
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static const struct mtk_gate_regs impen_cg_regs = {
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.set_ofs = 0xE08,
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.clr_ofs = 0xE04,
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.sta_ofs = 0xE00,
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};
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#define GATE_IMPEN(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &impen_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr, \
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}
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static const struct mtk_gate impen_clks[] = {
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GATE_IMPEN(CLK_IMPEN_AP_CLOCK_I2C0, "impen_ap_clock_i2c0",
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"i2c_pseudo0_ck"/* parent */, 0),
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GATE_IMPEN(CLK_IMPEN_AP_CLOCK_I2C2, "impen_ap_clock_i2c2",
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"i2c_pseudo2_ck"/* parent */, 1),
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GATE_IMPEN(CLK_IMPEN_AP_CLOCK_I2C4, "impen_ap_clock_i2c4",
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"i2c_pseudo4_ck"/* parent */, 2),
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GATE_IMPEN(CLK_IMPEN_AP_CLOCK_I2C9, "impen_ap_clock_i2c9",
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"i2c_pseudo9_ck"/* parent */, 3),
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};
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static const struct mtk_clk_desc impen_mcd = {
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.clks = impen_clks,
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.num_clks = CLK_IMPEN_NR_CLK,
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};
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static const struct mtk_gate_regs imps_cg_regs = {
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.set_ofs = 0xE08,
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.clr_ofs = 0xE04,
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.sta_ofs = 0xE00,
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};
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#define GATE_IMPS(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &imps_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr, \
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}
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static const struct mtk_gate imps_clks[] = {
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GATE_IMPS(CLK_IMPS_AP_CLOCK_I2C1, "imps_ap_clock_i2c1",
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"i2c_pseudo1_ck"/* parent */, 0),
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GATE_IMPS(CLK_IMPS_AP_CLOCK_I2C6, "imps_ap_clock_i2c6",
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"i2c_pseudo6_ck"/* parent */, 1),
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GATE_IMPS(CLK_IMPS_AP_CLOCK_I2C7, "imps_ap_clock_i2c7",
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"i2c_pseudo7_ck"/* parent */, 2),
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GATE_IMPS(CLK_IMPS_AP_CLOCK_I2C8, "imps_ap_clock_i2c8",
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"i2c_pseudo8_ck"/* parent */, 3),
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};
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static const struct mtk_clk_desc imps_mcd = {
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.clks = imps_clks,
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.num_clks = CLK_IMPS_NR_CLK,
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};
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static const struct mtk_gate_regs impws_cg_regs = {
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.set_ofs = 0xE08,
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.clr_ofs = 0xE04,
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.sta_ofs = 0xE00,
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};
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#define GATE_IMPWS(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &impws_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr, \
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}
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static const struct mtk_gate impws_clks[] = {
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GATE_IMPWS(CLK_IMPWS_AP_CLOCK_I2C3, "impws_ap_clock_i2c3",
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"i2c_pseudo3_ck"/* parent */, 0),
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GATE_IMPWS(CLK_IMPWS_AP_CLOCK_I2C5, "impws_ap_clock_i2c5",
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"i2c_pseudo5_ck"/* parent */, 1),
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};
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static const struct mtk_clk_desc impws_mcd = {
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.clks = impws_clks,
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.num_clks = CLK_IMPWS_NR_CLK,
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};
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static const struct mtk_gate_regs perao0_cg_regs = {
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.set_ofs = 0x28,
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.clr_ofs = 0x2C,
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.sta_ofs = 0x10,
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};
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static const struct mtk_gate_regs perao1_cg_regs = {
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.set_ofs = 0x30,
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.clr_ofs = 0x34,
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.sta_ofs = 0x14,
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};
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static const struct mtk_gate_regs perao2_cg_regs = {
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.set_ofs = 0x38,
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.clr_ofs = 0x3C,
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.sta_ofs = 0x18,
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};
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#define GATE_PERAO0(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &perao0_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr, \
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}
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#define GATE_PERAO1(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &perao1_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr, \
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}
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#define GATE_PERAO2(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &perao2_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_setclr, \
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}
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static const struct mtk_gate perao_clks[] = {
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/* PERAO0 */
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GATE_PERAO0(CLK_PERAOP_UART0, "peraop_uart0",
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"uart_ck"/* parent */, 0),
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GATE_PERAO0(CLK_PERAOP_UART1, "peraop_uart1",
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"uart_ck"/* parent */, 1),
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GATE_PERAO0(CLK_PERAOP_PWM_HCLK, "peraop_pwm_hclk",
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"axip_ck"/* parent */, 3),
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GATE_PERAO0(CLK_PERAOP_PWM_BCLK, "peraop_pwm_bclk",
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"uart_ck"/* parent */, 4),
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GATE_PERAO0(CLK_PERAOP_PWM_FBCLK1, "peraop_pwm_fbclk1",
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"uart_ck"/* parent */, 5),
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GATE_PERAO0(CLK_PERAOP_PWM_FBCLK2, "peraop_pwm_fbclk2",
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"uart_ck"/* parent */, 6),
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GATE_PERAO0(CLK_PERAOP_PWM_FBCLK3, "peraop_pwm_fbclk3",
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"uart_ck"/* parent */, 7),
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GATE_PERAO0(CLK_PERAOP_PWM_FBCLK4, "peraop_pwm_fbclk4",
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"uart_ck"/* parent */, 8),
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GATE_PERAO0(CLK_PERAOP_BTIF_BCLK, "peraop_btif_bclk",
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"uart_ck"/* parent */, 9),
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GATE_PERAO0(CLK_PERAOP_DISP_PWM0, "peraop_disp_pwm0",
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"disp_pwm_ck"/* parent */, 10),
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GATE_PERAO0(CLK_PERAOP_SPI0_BCLK, "peraop_spi0_bclk",
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"spi_ck"/* parent */, 11),
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GATE_PERAO0(CLK_PERAOP_SPI1_BCLK, "peraop_spi1_bclk",
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"spi_ck"/* parent */, 12),
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GATE_PERAO0(CLK_PERAOP_SPI2_BCLK, "peraop_spi2_bclk",
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"spi_ck"/* parent */, 13),
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GATE_PERAO0(CLK_PERAOP_SPI3_BCLK, "peraop_spi3_bclk",
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"spi_ck"/* parent */, 14),
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GATE_PERAO0(CLK_PERAOP_SPI4_BCLK, "peraop_spi4_bclk",
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"spi_ck"/* parent */, 15),
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GATE_PERAO0(CLK_PERAOP_SPI5_BCLK, "peraop_spi5_bclk",
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"spi_ck"/* parent */, 16),
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GATE_PERAO0(CLK_PERAOP_SPI6_BCLK, "peraop_spi6_bclk",
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"spi_ck"/* parent */, 17),
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GATE_PERAO0(CLK_PERAOP_SPI7_BCLK, "peraop_spi7_bclk",
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"spi_ck"/* parent */, 18),
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GATE_PERAO0(CLK_PERAOP_APDMA, "peraop_apdma",
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"axip_ck"/* parent */, 28),
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GATE_PERAO0(CLK_PERAOP_USB_FRMCNT, "peraop_usb_frmcnt",
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"ssusb_fmcnt_ck"/* parent */, 31),
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/* PERAO1 */
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GATE_PERAO1(CLK_PERAOP_USB_SYS, "peraop_usb_sys",
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"usb_ck"/* parent */, 1),
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GATE_PERAO1(CLK_PERAOP_USB_XHCI, "peraop_usb_xhci",
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"ssusb_xhci_ck"/* parent */, 2),
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GATE_PERAO1(CLK_PERAOP_MSDC1_SRC, "peraop_msdc1_src",
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"msdc30_1_ck"/* parent */, 5),
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GATE_PERAO1(CLK_PERAOP_MSDC1_HCLK, "peraop_msdc1_hclk",
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"axip_ck"/* parent */, 6),
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GATE_PERAO1(CLK_PERAOP_MSDC0_SRC, "peraop_msdc0_src",
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"msdc50_0_ck"/* parent */, 18),
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GATE_PERAO1(CLK_PERAOP_MSDC0_HCLK, "peraop_msdc0_hclk",
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"msdc5hclk_ck"/* parent */, 19),
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GATE_PERAO1(CLK_PERAOP_MSDC0_AES, "peraop_msdc0_aes",
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"aes_msdcfde_ck"/* parent */, 20),
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GATE_PERAO1(CLK_PERAOP_MSDC0_XCLK, "peraop_msdc0_xclk",
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"axip_ck"/* parent */, 21),
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GATE_PERAO1(CLK_PERAOP_MSDC0_HCLK_WRAP, "peraop_msdc0_h_wrap",
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"axip_ck"/* parent */, 22),
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GATE_PERAO1(CLK_PERAOP_NFIECC_BCLK, "peraop_nfiecc_bclk",
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"nfi1x_ck"/* parent */, 27),
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GATE_PERAO1(CLK_PERAOP_NFI_BCLK, "peraop_nfi_bclk",
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"nfi1x_ck"/* parent */, 28),
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GATE_PERAO1(CLK_PERAOP_NFI_HCLK, "peraop_nfi_hclk",
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"axip_ck"/* parent */, 29),
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GATE_PERAO1(CLK_AUXADC_BCLK_AP, "auxadc_bclk_ap",
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"f26m_ck"/* parent */, 30),
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GATE_PERAO1(CLK_AUXADC_BCLK_MD, "auxadc_bclk_md",
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"f26m_ck"/* parent */, 31),
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/* PERAO2 */
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GATE_PERAO2(CLK_PERAO_AUDIO_SLV_CKP, "perao_audio_slv_ckp",
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"axip_ck"/* parent */, 0),
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GATE_PERAO2(CLK_PERAO_AUDIO_MST_CKP, "perao_audio_mst_ckp",
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"axip_ck"/* parent */, 1),
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GATE_PERAO2(CLK_PERAO_INTBUS_CKP, "perao_intbus_ckp",
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"aud_intbus_ck"/* parent */, 2),
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};
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static const struct mtk_clk_desc perao_mcd = {
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.clks = perao_clks,
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.num_clks = CLK_PERAO_NR_CLK,
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};
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static const struct of_device_id of_match_clk_mt6835_peri[] = {
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{
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.compatible = "mediatek,mt6835-imp_iic_wrap_c",
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.data = &impc_mcd,
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}, {
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.compatible = "mediatek,mt6835-imp_iic_wrap_en",
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.data = &impen_mcd,
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}, {
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.compatible = "mediatek,mt6835-imp_iic_wrap_s",
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.data = &imps_mcd,
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}, {
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.compatible = "mediatek,mt6835-imp_iic_wrap_ws",
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.data = &impws_mcd,
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}, {
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.compatible = "mediatek,mt6835-pericfg_ao",
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.data = &perao_mcd,
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}, {
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/* sentinel */
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}
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};
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static int clk_mt6835_peri_grp_probe(struct platform_device *pdev)
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{
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int r;
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#if MT_CCF_BRINGUP
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pr_notice("%s: %s init begin\n", __func__, pdev->name);
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#endif
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r = mtk_clk_simple_probe(pdev);
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if (r)
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dev_err(&pdev->dev,
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"could not register clock provider: %s: %d\n",
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pdev->name, r);
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#if MT_CCF_BRINGUP
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pr_notice("%s: %s init end\n", __func__, pdev->name);
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#endif
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return r;
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}
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static struct platform_driver clk_mt6835_peri_drv = {
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.probe = clk_mt6835_peri_grp_probe,
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.driver = {
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.name = "clk-mt6835-peri",
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.of_match_table = of_match_clk_mt6835_peri,
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},
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};
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module_platform_driver(clk_mt6835_peri_drv);
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MODULE_LICENSE("GPL");
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