94 lines
3.6 KiB
C
Executable file
94 lines
3.6 KiB
C
Executable file
/* SPDX-License-Identifier: GPL-2.0
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* aw87xxx_pid_9b_reg.h
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*
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* Copyright (c) 2021 AWINIC Technology CO., LTD
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*
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* Author: Barry <zhaozhongbo@awinic.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef __AW87XXX_PID_9B_REG_H__
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#define __AW87XXX_PID_9B_REG_H__
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#define AW87XXX_PID_9B_CHIPID_REG (0x00)
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#define AW87XXX_PID_9B_SYSCTRL_REG (0x01)
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#define AW87XXX_PID_9B_BATSAFE_REG (0x02)
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#define AW87XXX_PID_9B_BOV_REG (0x03)
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#define AW87XXX_PID_9B_BP_REG (0x04)
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#define AW87XXX_PID_9B_GAIN_REG (0x05)
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#define AW87XXX_PID_9B_AGC3_PO_REG (0x06)
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#define AW87XXX_PID_9B_AGC3_REG (0x07)
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#define AW87XXX_PID_9B_AGC2_REG (0x08)
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#define AW87XXX_PID_9B_AGC1_REG (0x09)
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#define AW87XXX_PID_9B_SYSCTRL_DEFAULT (0x03)
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/********************************************
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* soft control info
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* If you need to update this file, add this information manually
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*******************************************/
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unsigned char aw87xxx_pid_9b_softrst_access[2] = {0x00, 0xaa};
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/********************************************
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* Register Access
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*******************************************/
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#define AW87XXX_PID_9B_REG_MAX (0x64)
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#define REG_NONE_ACCESS (0)
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#define REG_RD_ACCESS (1 << 0)
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#define REG_WR_ACCESS (1 << 1)
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const unsigned char aw87xxx_pid_9b_reg_access[AW87XXX_PID_9B_REG_MAX] = {
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[AW87XXX_PID_9B_CHIPID_REG] = (REG_RD_ACCESS),
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[AW87XXX_PID_9B_SYSCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW87XXX_PID_9B_BATSAFE_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW87XXX_PID_9B_BOV_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW87XXX_PID_9B_BP_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW87XXX_PID_9B_GAIN_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW87XXX_PID_9B_AGC3_PO_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW87XXX_PID_9B_AGC3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW87XXX_PID_9B_AGC2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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[AW87XXX_PID_9B_AGC1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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};
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#define AW87XXX_PID_9B_ENCRYPTION_REG (0x64)
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#define AW87XXX_PID_9B_ENCRYPTION_BOOST_OUTPUT_SET (0x2C)
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/* REG_EN_SW bit 2 (SYSCTRL 0x01) */
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#define AW87XXX_PID_9B_REG_EN_SW_START_BIT (2)
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#define AW87XXX_PID_9B_REG_EN_SW_BITS_LEN (1)
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#define AW87XXX_PID_9B_REG_EN_SW_MASK \
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(~(((1<<AW87XXX_PID_9B_REG_EN_SW_BITS_LEN)-1) << AW87XXX_PID_9B_REG_EN_SW_START_BIT))
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#define AW87XXX_PID_9B_REG_EN_SW_DISABLE (0)
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#define AW87XXX_PID_9B_REG_EN_SW_DISABLE_VALUE \
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(AW87XXX_PID_9B_REG_EN_SW_DISABLE << AW87XXX_PID_9B_REG_EN_SW_START_BIT)
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#define AW87XXX_PID_9B_REG_EN_SW_ENABLE (1)
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#define AW87XXX_PID_9B_REG_EN_SW_ENABLE_VALUE \
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(AW87XXX_PID_9B_REG_EN_SW_ENABLE << AW87XXX_PID_9B_REG_EN_SW_START_BIT)
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#define AW87XXX_PID_9B_REG_EN_SW_DEFAULT_VALUE (1)
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#define AW87XXX_PID_9B_REG_EN_SW_DEFAULT \
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(AW87XXX_PID_9B_REG_EN_SW_DEFAULT_VALUE << AW87XXX_PID_9B_REG_EN_SW_START_BIT)
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/* SPK_MODE bit 0 (SYSCTRL 0x01) */
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#define AW87XXX_PID_9B_SPK_MODE_START_BIT (0)
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#define AW87XXX_PID_9B_SPK_MODE_BITS_LEN (1)
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#define AW87XXX_PID_9B_SPK_MODE_MASK \
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(~(((1<<AW87XXX_PID_9B_SPK_MODE_BITS_LEN)-1) << AW87XXX_PID_9B_SPK_MODE_START_BIT))
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#define AW87XXX_PID_9B_SPK_MODE_DISABLE (0)
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#define AW87XXX_PID_9B_SPK_MODE_DISABLE_VALUE \
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(AW87XXX_PID_9B_SPK_MODE_DISABLE << AW87XXX_PID_9B_SPK_MODE_START_BIT)
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#define AW87XXX_PID_9B_SPK_MODE_ENABLE (1)
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#define AW87XXX_PID_9B_SPK_MODE_ENABLE_VALUE \
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(AW87XXX_PID_9B_SPK_MODE_ENABLE << AW87XXX_PID_9B_SPK_MODE_START_BIT)
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#endif
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