163 lines
4 KiB
C
163 lines
4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2022 MediaTek Inc.
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* Author: Chuan-Wen Chen <chuan-wen.chen@mediatek.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt6835-clk.h>
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#define MT_CCF_BRINGUP 1
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/* Regular Number Definition */
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#define INV_OFS -1
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#define INV_BIT -1
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static const struct mtk_gate_regs afe0_cg_regs = {
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.set_ofs = 0x0,
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.clr_ofs = 0x0,
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.sta_ofs = 0x0,
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};
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static const struct mtk_gate_regs afe1_cg_regs = {
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.set_ofs = 0x4,
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.clr_ofs = 0x4,
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.sta_ofs = 0x4,
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};
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static const struct mtk_gate_regs afe2_cg_regs = {
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.set_ofs = 0x8,
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.clr_ofs = 0x8,
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.sta_ofs = 0x8,
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};
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#define GATE_AFE0(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &afe0_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_no_setclr, \
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}
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#define GATE_AFE1(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &afe1_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_no_setclr, \
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}
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#define GATE_AFE2(_id, _name, _parent, _shift) { \
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.id = _id, \
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.name = _name, \
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.parent_name = _parent, \
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.regs = &afe2_cg_regs, \
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.shift = _shift, \
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.ops = &mtk_clk_gate_ops_no_setclr, \
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}
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static const struct mtk_gate afe_clks[] = {
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/* AFE0 */
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GATE_AFE0(CLK_AFE_AFE, "afe_afe",
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"audio_ck"/* parent */, 2),
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GATE_AFE0(CLK_AFE_22M, "afe_22m",
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"aud_engen1_ck"/* parent */, 8),
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GATE_AFE0(CLK_AFE_24M, "afe_24m",
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"aud_engen2_ck"/* parent */, 9),
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GATE_AFE0(CLK_AFE_APLL2_TUNER, "afe_apll2_tuner",
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"aud_engen2_ck"/* parent */, 18),
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GATE_AFE0(CLK_AFE_APLL_TUNER, "afe_apll_tuner",
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"aud_engen1_ck"/* parent */, 19),
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GATE_AFE0(CLK_AFE_ADC, "afe_adc",
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"audio_ck"/* parent */, 24),
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GATE_AFE0(CLK_AFE_DAC, "afe_dac",
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"audio_ck"/* parent */, 25),
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GATE_AFE0(CLK_AFE_DAC_PREDIS, "afe_dac_predis",
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"audio_ck"/* parent */, 26),
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GATE_AFE0(CLK_AFE_TML, "afe_tml",
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"audio_ck"/* parent */, 27),
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GATE_AFE0(CLK_AFE_NLE, "afe_nle",
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"audio_ck"/* parent */, 28),
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/* AFE1 */
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GATE_AFE1(CLK_AFE_GENERAL3_ASRC, "afe_general3_asrc",
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"audio_ck"/* parent */, 11),
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GATE_AFE1(CLK_AFE_CONNSYS_I2S_ASRC, "afe_connsys_i2s_asrc",
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"audio_ck"/* parent */, 12),
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GATE_AFE1(CLK_AFE_GENERAL1_ASRC, "afe_general1_asrc",
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"audio_ck"/* parent */, 13),
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GATE_AFE1(CLK_AFE_GENERAL2_ASRC, "afe_general2_asrc",
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"audio_ck"/* parent */, 14),
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GATE_AFE1(CLK_AFE_DAC_HIRES, "afe_dac_hires",
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"audio_h_ck"/* parent */, 15),
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GATE_AFE1(CLK_AFE_ADC_HIRES, "afe_adc_hires",
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"audio_h_ck"/* parent */, 16),
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GATE_AFE1(CLK_AFE_ADC_HIRES_TML, "afe_adc_hires_tml",
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"audio_h_ck"/* parent */, 17),
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/* AFE2 */
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GATE_AFE2(CLK_AFE_I2S5_BCLK, "afe_i2s5_bclk",
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"audio_ck"/* parent */, 0),
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GATE_AFE2(CLK_AFE_I2S1_BCLK, "afe_i2s1_bclk",
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"audio_ck"/* parent */, 7),
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GATE_AFE2(CLK_AFE_I2S2_BCLK, "afe_i2s2_bclk",
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"audio_ck"/* parent */, 8),
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GATE_AFE2(CLK_AFE_I2S3_BCLK, "afe_i2s3_bclk",
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"audio_ck"/* parent */, 9),
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GATE_AFE2(CLK_AFE_I2S4_BCLK, "afe_i2s4_bclk",
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"audio_ck"/* parent */, 10),
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};
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static const struct mtk_clk_desc afe_mcd = {
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.clks = afe_clks,
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.num_clks = CLK_AFE_NR_CLK,
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};
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static const struct of_device_id of_match_clk_mt6835_adsp[] = {
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{
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.compatible = "mediatek,mt6835-afe",
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.data = &afe_mcd,
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}, {
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/* sentinel */
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}
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};
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static int clk_mt6835_adsp_grp_probe(struct platform_device *pdev)
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{
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int r;
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#if MT_CCF_BRINGUP
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pr_notice("%s: %s init begin\n", __func__, pdev->name);
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#endif
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r = mtk_clk_simple_probe(pdev);
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if (r)
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dev_err(&pdev->dev,
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"could not register clock provider: %s: %d\n",
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pdev->name, r);
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#if MT_CCF_BRINGUP
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pr_notice("%s: %s init end\n", __func__, pdev->name);
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#endif
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return r;
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}
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static struct platform_driver clk_mt6835_adsp_drv = {
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.probe = clk_mt6835_adsp_grp_probe,
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.driver = {
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.name = "clk-mt6835-adsp",
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.of_match_table = of_match_clk_mt6835_adsp,
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},
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};
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module_platform_driver(clk_mt6835_adsp_drv);
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MODULE_LICENSE("GPL");
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