514 lines
10 KiB
Text
514 lines
10 KiB
Text
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2020 MediaTek Inc.
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* Author: Chun-Hung Wu <chun-hung.wu@mediatek.com>
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/pinctrl/mt6853-pinfunc.h>
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#include <dt-bindings/clock/mt8192-clk.h>
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&gpio_usage_mapping {
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GPIO_FDD_BAND_SUPPORT_DETECT_1ST_PIN = <&pio 37 0>;
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GPIO_FDD_BAND_SUPPORT_DETECT_2ND_PIN = <&pio 38 0>;
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GPIO_FDD_BAND_SUPPORT_DETECT_3RD_PIN = <&pio 39 0>;
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GPIO_SIM1_HOT_PLUG = <&pio 77 0>;
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GPIO_SIM2_SCLK = <&pio 119 0>;
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GPIO_SIM2_SRST = <&pio 120 0>;
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GPIO_SIM2_SIO = <&pio 121 0>;
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GPIO_SIM1_SIO = <&pio 122 0>;
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GPIO_SIM1_SRST = <&pio 123 0>;
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GPIO_SIM1_SCLK = <&pio 124 0>;
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GPIO_RF_PWREN_RST_PIN = <&pio 171 0>;
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};
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&gpio{
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gpio_init_default = <0 0 0 0 1 0 1>,
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<1 0 0 0 1 1 1>,
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<2 0 0 0 1 1 1>,
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<3 0 0 0 1 0 1>,
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<4 0 0 0 1 1 1>,
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<5 0 0 0 1 0 1>,
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<6 0 1 0 1 0 1>,
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<7 0 1 0 1 0 1>,
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<8 7 0 0 1 0 1>,
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<9 0 0 0 1 1 1>,
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<10 0 0 0 1 1 1>,
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<11 0 1 0 1 0 1>,
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<12 2 0 0 1 0 1>,
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<13 2 0 0 1 0 1>,
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<14 0 0 0 1 1 1>,
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<15 0 1 0 1 0 1>,
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<16 7 0 0 1 0 1>,
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<17 7 0 0 1 0 1>,
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<18 7 0 0 1 0 1>,
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<19 7 0 0 1 0 1>,
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<20 1 0 0 0 0 1>,
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<21 1 0 0 0 0 1>,
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<22 1 0 0 0 0 1>,
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<23 1 0 0 1 0 1>,
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<24 2 0 0 0 0 1>,
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<25 2 0 0 0 0 1>,
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<26 2 0 0 0 0 1>,
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<27 2 0 0 1 0 1>,
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<28 4 0 0 1 1 1>,
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<29 4 0 0 0 0 1>,
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<30 4 0 0 0 0 1>,
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<31 4 0 0 1 1 1>,
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<32 0 0 0 1 1 1>,
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<33 1 0 0 0 0 1>,
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<34 1 0 0 0 0 1>,
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<35 1 0 0 1 0 1>,
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<36 1 0 0 0 0 1>,
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<37 0 0 0 1 0 1>,
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<38 0 0 0 1 0 1>,
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<39 0 0 0 1 0 1>,
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<40 0 1 0 1 0 1>,
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<41 0 1 0 1 0 1>,
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<42 7 0 0 1 0 1>,
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<43 7 0 0 1 0 1>,
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<44 7 0 0 1 0 1>,
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<45 7 0 0 0 0 1>,
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<46 7 0 0 1 0 1>,
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<47 7 0 0 1 0 1>,
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<48 7 0 0 1 0 1>,
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<49 1 0 0 0 0 1>,
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<50 1 0 0 0 0 1>,
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<51 1 0 0 0 0 1>,
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<52 1 0 0 0 0 1>,
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<53 0 1 0 1 0 1>,
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<54 0 1 0 1 0 1>,
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<55 0 1 0 1 0 1>,
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<56 0 1 0 1 0 1>,
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<57 0 0 0 1 0 1>,
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<58 0 1 0 1 0 1>,
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<59 1 0 0 1 0 1>,
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<60 0 1 0 1 0 1>,
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<61 1 0 0 1 1 1>,
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<62 1 0 0 0 0 1>,
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<63 1 0 0 1 1 1>,
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<64 1 0 0 0 0 1>,
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<77 1 0 0 1 1 1>,
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<78 0 0 0 1 0 1>,
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<79 1 0 0 1 1 1>,
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<80 0 1 0 1 0 1>,
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<81 3 0 0 1 0 1>,
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<82 0 1 0 1 0 1>,
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<83 1 0 0 0 0 1>,
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<84 1 0 0 1 0 1>,
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<85 1 0 0 0 0 1>,
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<86 1 0 0 0 0 1>,
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<87 2 0 0 1 0 1>,
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<88 0 0 0 1 0 1>,
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<89 0 0 0 1 0 1>,
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<90 1 1 0 0 0 1>,
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<91 0 0 0 1 0 1>,
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<92 0 1 0 1 0 1>,
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<93 0 1 0 1 0 1>,
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<94 0 1 0 1 0 1>,
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<95 1 0 0 1 0 1>,
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<96 1 0 0 1 0 1>,
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<97 1 0 0 1 1 1>,
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<98 1 0 0 1 1 1>,
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<99 2 0 0 1 1 1>,
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<100 2 0 0 1 1 1>,
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<101 1 0 0 1 1 1>,
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<102 1 0 0 1 1 1>,
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<103 1 0 0 1 1 1>,
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<104 1 0 0 1 1 1>,
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<105 1 0 0 1 1 1>,
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<106 1 0 0 1 1 1>,
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<107 0 0 0 1 0 1>,
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<108 0 0 0 1 0 1>,
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<109 1 0 0 1 1 1>,
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<110 1 0 0 1 1 1>,
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<111 7 0 0 1 0 1>,
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<112 7 0 0 1 0 1>,
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<113 1 0 0 1 1 1>,
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<114 1 0 0 1 1 1>,
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<115 1 0 0 0 0 1>,
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<116 1 0 0 0 0 1>,
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<117 1 0 0 0 0 1>,
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<118 1 0 0 0 0 1>,
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<119 1 0 0 0 0 1>,
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<120 1 0 0 0 0 1>,
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<121 1 0 0 1 1 1>,
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<122 1 0 0 1 1 1>,
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<123 1 0 0 0 0 1>,
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<124 1 0 0 0 0 1>,
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<125 1 0 0 0 0 1>,
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<126 1 0 0 1 1 1>,
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<127 1 0 0 1 1 1>,
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<128 1 0 0 1 1 1>,
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<129 1 0 0 1 1 1>,
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<130 1 0 0 1 1 1>,
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<131 0 1 0 1 0 1>,
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<132 0 1 0 1 0 1>,
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<133 0 1 0 1 0 1>,
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<134 0 1 0 1 0 1>,
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<135 0 1 0 1 0 1>,
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<136 0 1 1 1 0 1>,
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<137 0 1 0 1 0 1>,
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<138 0 1 0 1 0 1>,
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<139 0 1 0 1 0 1>,
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<140 0 1 0 1 0 1>,
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<141 2 0 0 1 0 1>,
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<142 2 0 0 1 0 1>,
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<143 1 0 0 0 0 1>,
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<144 1 0 0 0 0 1>,
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<145 1 0 0 0 0 1>,
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<146 1 0 0 0 0 1>,
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<147 1 0 0 0 0 1>,
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<148 1 0 0 0 0 1>,
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<149 1 0 0 1 0 1>,
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<150 1 0 0 1 0 1>,
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<151 1 0 0 1 0 1>,
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<152 1 0 0 0 0 1>,
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<153 1 0 0 0 0 1>,
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<154 1 0 0 0 0 1>,
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<155 1 0 0 0 0 1>,
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<156 1 0 0 0 0 1>,
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<157 1 0 0 0 0 1>,
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<158 1 0 0 0 0 1>,
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<159 1 0 0 1 0 1>,
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<160 1 0 0 1 0 1>,
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<161 1 0 0 1 0 1>,
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<162 1 0 0 0 0 0>,
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<163 1 0 0 1 0 0>,
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<164 1 0 0 1 0 1>,
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<165 1 0 0 1 0 1>,
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<166 1 0 0 0 0 1>,
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<167 1 0 0 0 0 1>,
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<168 1 0 0 0 0 1>,
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<169 1 0 0 0 0 1>,
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<170 1 0 0 0 0 1>,
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<171 0 1 1 0 0 1>,
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<172 1 0 0 0 0 1>,
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<173 1 0 0 0 0 1>,
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<174 1 0 0 0 0 1>,
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<175 1 0 0 0 0 1>,
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<176 1 0 0 0 0 1>,
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<177 1 0 0 0 0 1>,
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<178 1 0 0 0 0 1>,
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<179 1 0 0 0 0 1>,
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<180 1 0 0 0 0 1>,
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<181 1 0 0 0 0 1>,
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<182 1 0 0 0 0 1>,
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<183 1 0 0 0 0 1>,
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<184 1 0 0 0 0 1>,
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<185 1 0 0 0 0 1>,
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<186 1 0 0 0 0 1>,
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<187 1 0 0 0 0 1>,
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<188 1 0 0 0 0 0>,
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<189 1 0 0 1 0 0>,
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<190 1 0 0 0 0 0>,
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<191 1 0 0 1 0 0>,
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<192 0 0 0 1 0 1>,
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<193 0 0 0 1 0 1>,
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<194 0 0 0 1 0 1>,
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<195 0 0 0 1 0 1>,
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<196 0 0 0 1 0 1>,
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<197 0 0 0 1 0 1>,
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<198 0 0 0 1 0 1>,
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<199 0 0 0 1 0 1>,
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<200 0 0 0 1 0 1>,
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<201 0 0 0 1 0 1>,
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<202 0 0 0 1 0 1>,
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<203 0 0 0 1 0 0>,
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<204 0 0 0 1 0 0>,
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<205 0 0 0 1 0 0>,
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<206 0 0 0 1 0 0>,
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<207 0 0 0 1 0 0>,
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<208 0 0 0 1 0 0>,
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<209 0 0 0 1 0 0>,
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<210 0 0 0 1 0 0>,
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<211 0 0 0 1 0 0>;
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};
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&chosen {
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atag,videolfb-fb_base_l = <0x7e605000>;
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atag,videolfb-fb_base_h = <0x0>;
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atag,videolfb-islcmfound = <1>;
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atag,videolfb-islcm_inited = <0>;
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atag,videolfb-fps= <6000>;
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atag,videolfb-vramSize= <0x1be0000>;
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atag,videolfb-lcmname=
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"td4330_fhdp_dsi_vdo_auo_rt5081_drv";
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};
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&pio {
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mtkfb_pins_lcd_bias_enp1: lcd_bias_enp1_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO137__FUNC_GPIO137>;
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slew-rate = <1>;
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output-high;
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};
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};
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mtkfb_pins_lcd_bias_enp0: lcd_bias_enp0_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO137__FUNC_GPIO137>;
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slew-rate = <1>;
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output-low;
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};
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};
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mtkfb_pins_lcd_bias_enn1: lcd_bias_enn1_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO138__FUNC_GPIO138>;
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slew-rate = <1>;
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output-high;
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};
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};
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mtkfb_pins_lcd_bias_enn0: lcd_bias_enn0_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO138__FUNC_GPIO138>;
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slew-rate = <1>;
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output-low;
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};
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};
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mtkfb_pins_lcm_rst_out1_gpio: lcm_rst_out1_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO86__FUNC_GPIO86>;
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slew-rate = <1>;
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output-high;
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};
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};
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mtkfb_pins_lcm_rst_out0_gpio: lcm_rst_out0_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO86__FUNC_GPIO86>;
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slew-rate = <1>;
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output-low;
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};
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};
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mtkfb_pins_lcm_dsi_te: lcm_dsi_te {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO84__FUNC_DSI_TE>;
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};
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};
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};
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&mtkfb {
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pinctrl-names = "lcd_bias_enp1_gpio", "lcd_bias_enp0_gpio",
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"lcd_bias_enn1_gpio", "lcd_bias_enn0_gpio",
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"lcm_rst_out1_gpio", "lcm_rst_out0_gpio",
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"mode_te_te";
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pinctrl-0 = <&mtkfb_pins_lcd_bias_enp1>;
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pinctrl-1 = <&mtkfb_pins_lcd_bias_enp0>;
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pinctrl-2 = <&mtkfb_pins_lcd_bias_enn1>;
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pinctrl-3 = <&mtkfb_pins_lcd_bias_enn0>;
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pinctrl-4 = <&mtkfb_pins_lcm_rst_out1_gpio>;
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pinctrl-5 = <&mtkfb_pins_lcm_rst_out0_gpio>;
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pinctrl-6 = <&mtkfb_pins_lcm_dsi_te>;
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status = "okay";
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};
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&dispsys_config {
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pinctrl-names =
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"lcm_rst_out1_gpio", "lcm_rst_out0_gpio",
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"mode_te_te";
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pinctrl-0 = <&mtkfb_pins_lcm_rst_out1_gpio>;
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pinctrl-1 = <&mtkfb_pins_lcm_rst_out0_gpio>;
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pinctrl-2 = <&mtkfb_pins_lcm_dsi_te>;
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status = "okay";
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};
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&dsi0 {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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panel1@0 {
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compatible = "nt35695b,auo,vdo";
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reg = <0>;
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pm-enable-gpios = <&pio 84 0>;
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reset-gpios = <&pio 86 0>;
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bias-gpios = <&pio 137 0>,
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<&pio 138 0>;
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pinctrl-names = "default";
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port {
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panel_in1: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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};
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panel2@0 {
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compatible = "nt36672a,rt4801,vdo";
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reg = <1>;
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pm-enable-gpios = <&pio 84 0>;
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reset-gpios = <&pio 86 0>;
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bias-gpios = <&pio 137 0>,
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<&pio 138 0>;
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pinctrl-names = "default";
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port {
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panel_in2: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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};
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panel3@0 {
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compatible = "truly,td4330,vdo";
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reg = <2>;
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pm-enable-gpios = <&pio 84 0>;
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reset-gpios = <&pio 86 0>;
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bias-gpios = <&pio 137 0>,
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<&pio 138 0>;
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pinctrl-names = "default";
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port {
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panel_in3: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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};
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ports {
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port {
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dsi_out: endpoint {
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remote-endpoint = <&panel_in1>;
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};
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};
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};
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};
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&dsi_te {
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interrupt-parent = <&pio>;
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interrupts = <84 1 84 1>;
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status = "okay";
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};
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&i2c6 {
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mt6660: mt6660@34 {
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compatible = "mediatek,mt6660";
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#sound-dai-cells = <0>;
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reg = <0x34>;
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status = "okay";
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};
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};
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&sound {
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mediatek,speaker-codec {
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sound-dai = <&mt6660>;
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};
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};
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#include "mediatek/cust_mt6853_camera.dtsi"
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/* CONSYS GPIO standardization */
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&pio {
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consys_pins_default: consys_default {
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};
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gpslna_pins_init: gpslna@0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO87__FUNC_GPIO87>;
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output-low;
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};
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};
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gpslna_pins_oh: gpslna@1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO87__FUNC_GPS_L1_ELNA_EN>;
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};
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};
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gpslna_pins_ol: gpslna@2 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO87__FUNC_GPIO87>;
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output-low;
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};
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};
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};
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&consys {
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pinctrl-names = "default", "gps_lna_state_init",
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"gps_lna_state_oh", "gps_lna_state_ol";
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pinctrl-0 = <&consys_pins_default>;
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pinctrl-1 = <&gpslna_pins_init>;
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pinctrl-2 = <&gpslna_pins_oh>;
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pinctrl-3 = <&gpslna_pins_ol>;
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status = "okay";
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};
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/* CONSYS end */
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&pdc {
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pd_vbus_upper_bound = <12000000>;
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};
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/* usb typec mux */
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&pio {
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c1_active: c1_high {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO41__FUNC_GPIO41>;
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output-high;
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};
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};
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c2_active: c2_highz {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO40__FUNC_GPIO40>;
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input-enable;
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bias-disable;
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};
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};
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c1_sleep: c1_low {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO41__FUNC_GPIO41>;
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output-low;
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};
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};
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c2_sleep: c2_low {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO40__FUNC_GPIO40>;
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output-low;
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};
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};
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sel_up: sel_high {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO11__FUNC_GPIO11>;
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output-high;
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};
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};
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sel_down: sel_low {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO11__FUNC_GPIO11>;
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output-low;
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};
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};
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sw_enable: sw_enable {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO132__FUNC_GPIO132>;
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output-low;
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};
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};
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sw_disable: sw_disable {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO132__FUNC_GPIO132>;
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output-low;
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};
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};
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};
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&ptn36241g {
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pinctrl-names = "c1_active", "c1_sleep",
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"c2_active", "c2_sleep";
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pinctrl-0 = <&c1_active>;
|
|
pinctrl-1 = <&c1_sleep>;
|
|
pinctrl-2 = <&c2_active>;
|
|
pinctrl-3 = <&c2_sleep>;
|
|
status = "okay";
|
|
};
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|
|
|
&fusb304 {
|
|
pinctrl-names = "sel_up", "sel_down",
|
|
"enable", "disable";
|
|
pinctrl-0 = <&sel_up>;
|
|
pinctrl-1 = <&sel_down>;
|
|
pinctrl-2 = <&sw_enable>;
|
|
pinctrl-3 = <&sw_disable>;
|
|
status = "okay";
|
|
};
|
|
#include "mediatek/cust_mt6853_touch_1080x1920.dtsi"
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|
/*End of this file, DO NOT ADD ANYTHING HERE*/
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