881 lines
19 KiB
Text
881 lines
19 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2020 MediaTek Inc. */
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#include <dt-bindings/clock/mt6886-clk.h>
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&seninf_top {
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seninf_csi_port_0: seninf_csi_port_0 {
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compatible = "mediatek,seninf";
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csi-port = "0";
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dphy_settle_delay_dt = <17>;
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nvmem-cells = <&csi_efuse0>;
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nvmem-cell-names = "rg_csi";
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port {
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seninf_csi_port_0_in: endpoint {
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remote-endpoint = <&sensor1_out>;
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};
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};
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};
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seninf_csi_port_1: seninf_csi_port_1 {
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compatible = "mediatek,seninf";
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csi-port = "1";
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hs_trail_parameter = <0x20>;
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nvmem-cells = <&csi_efuse1>;
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nvmem-cell-names = "rg_csi";
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port {
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seninf_csi_port_1_in: endpoint {
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remote-endpoint = <&sensor4_out>;
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};
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};
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};
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seninf_csi_port_2: seninf_csi_port_2 {
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compatible = "mediatek,seninf";
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csi-port = "2";
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hs_trail_parameter = <0x20>;
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nvmem-cells = <&csi_efuse2>;
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nvmem-cell-names = "rg_csi";
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port {
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seninf_csi_port_2_in: endpoint {
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remote-endpoint = <&sensor0_out>;
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};
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};
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};
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seninf_csi_port_3: seninf_csi_port_3 {
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compatible = "mediatek,seninf";
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csi-port = "3";
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nvmem-cells = <&csi_efuse3>;
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nvmem-cell-names = "rg_csi";
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port {
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seninf_csi_port_3_in: endpoint {
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remote-endpoint = <&sensor2_out>;
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};
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};
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};
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};
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/* CAMERA GPIO standardization */
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&pio {
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camera_pins_cam0_mclk_off: camera_pins_cam0_mclk_off {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO170__FUNC_GPIO170>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam0_mclk_2ma: camera_pins_cam0_mclk_2ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO170__FUNC_CMMCLK2>;
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drive-strength = <0>;
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};
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};
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camera_pins_cam0_mclk_4ma: camera_pins_cam0_mclk_4ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO170__FUNC_CMMCLK2>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam0_mclk_6ma: camera_pins_cam0_mclk_6ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO170__FUNC_CMMCLK2>;
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drive-strength = <2>;
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};
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};
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camera_pins_cam0_mclk_8ma: camera_pins_cam0_mclk_8ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO170__FUNC_CMMCLK2>;
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drive-strength = <3>;
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};
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};
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camera_pins_cam0_rst_0: cam0@0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO164__FUNC_GPIO164>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam0_rst_1: cam0@1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO164__FUNC_GPIO164>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam0_avdd1_0: cam0@2 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam0_avdd1_1: cam0@3 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam1_mclk_off: camera_pins_cam1_mclk_off {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO172__FUNC_GPIO172>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam1_mclk_2ma: camera_pins_cam1_mclk_2ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO172__FUNC_CMMCLK4>;
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drive-strength = <0>;
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};
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};
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camera_pins_cam1_mclk_4ma: camera_pins_cam1_mclk_4ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO172__FUNC_CMMCLK4>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam1_mclk_6ma: camera_pins_cam1_mclk_6ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO172__FUNC_CMMCLK4>;
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drive-strength = <2>;
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};
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};
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camera_pins_cam1_mclk_8ma: camera_pins_cam1_mclk_8ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO172__FUNC_CMMCLK4>;
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drive-strength = <3>;
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};
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};
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camera_pins_cam1_rst_0: cam1@0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO162__FUNC_GPIO162>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam1_rst_1: cam1@1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO162__FUNC_GPIO162>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam2_mclk_off: camera_pins_cam2_mclk_off {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO171__FUNC_GPIO171>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam2_mclk_2ma: camera_pins_cam2_mclk_2ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO171__FUNC_CMMCLK3>;
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drive-strength = <0>;
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};
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};
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camera_pins_cam2_mclk_4ma: camera_pins_cam2_mclk_4ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO171__FUNC_CMMCLK3>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam2_mclk_6ma: camera_pins_cam2_mclk_6ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO171__FUNC_CMMCLK3>;
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drive-strength = <2>;
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};
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};
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camera_pins_cam2_mclk_8ma: camera_pins_cam2_mclk_8ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO171__FUNC_CMMCLK3>;
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drive-strength = <3>;
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};
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};
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camera_pins_cam2_rst_0: cam2@0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO165__FUNC_GPIO165>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam2_rst_1: cam2@1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO165__FUNC_GPIO165>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam2_mclk1_off: camera_pins_cam2_mclk1_off {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO168__FUNC_GPIO168>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam2_mclk1_2ma: camera_pins_cam2_mclk1_2ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO168__FUNC_CMMCLK0>;
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drive-strength = <0>;
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};
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};
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camera_pins_cam2_mclk1_4ma: camera_pins_cam2_mclk1_4ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO168__FUNC_CMMCLK0>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam2_mclk1_6ma: camera_pins_cam2_mclk1_6ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO168__FUNC_CMMCLK0>;
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drive-strength = <2>;
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};
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};
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camera_pins_cam2_mclk1_8ma: camera_pins_cam2_mclk1_8ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO168__FUNC_CMMCLK0>;
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drive-strength = <3>;
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};
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};
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camera_pins_cam2_rst1_0: cam2@2 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO7__FUNC_GPIO7>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam2_rst1_1: cam2@3 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO7__FUNC_GPIO7>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam2_ponv_0: cam2@4 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam2_ponv_1: cam2@5 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam2_scl_ap: cam2@6 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO176__FUNC_SCL7>;
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};
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};
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camera_pins_cam2_scl_scp: cam2@7 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO176__FUNC_SCP_SCL4>;
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};
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};
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camera_pins_cam2_sda_ap: cam2@8 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO177__FUNC_SDA7>;
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};
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};
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camera_pins_cam2_sda_scp: cam2@9 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO177__FUNC_SCP_SDA4>;
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};
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};
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camera_pins_cam2_avdd1_0: cam2@10 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO7__FUNC_GPIO7>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam2_avdd1_1: cam2@11 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO7__FUNC_GPIO7>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_cam4_mclk_off: camera_pins_cam4_mclk_off {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO169__FUNC_GPIO169>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam4_mclk_2ma: camera_pins_cam4_mclk_2ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO169__FUNC_CMMCLK1>;
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drive-strength = <0>;
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};
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};
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camera_pins_cam4_mclk_4ma: camera_pins_cam4_mclk_4ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO169__FUNC_CMMCLK1>;
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drive-strength = <1>;
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};
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};
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camera_pins_cam4_mclk_6ma: camera_pins_cam4_mclk_6ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO169__FUNC_CMMCLK1>;
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drive-strength = <2>;
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};
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};
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camera_pins_cam4_mclk_8ma: camera_pins_cam4_mclk_8ma {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO169__FUNC_CMMCLK1>;
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drive-strength = <3>;
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};
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};
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camera_pins_cam4_rst_0: cam4@0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO163__FUNC_GPIO163>;
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slew-rate = <1>;
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output-low;
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};
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};
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camera_pins_cam4_rst_1: cam4@1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO163__FUNC_GPIO163>;
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slew-rate = <1>;
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output-high;
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};
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};
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camera_pins_default: camdefault {
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};
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};
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/* CAMERA GPIO end */
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&mtk_composite_v4l2_2 {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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main_af_endpoint: endpoint {
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remote-endpoint = <&main_af>;
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};
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};
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port@1 {
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reg = <1>;
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main_af_cam1_endpoint: endpoint {
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remote-endpoint = <&main_af_cam1>;
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};
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};
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port@2 {
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reg = <2>;
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main_af_cam2_endpoint: endpoint {
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remote-endpoint = <&main_af_cam2>;
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};
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};
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port@3 {
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reg = <3>;
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main_af_cam3_endpoint: endpoint {
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remote-endpoint = <&main_af_cam3>;
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};
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};
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port@4 {
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reg = <4>;
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main_af_cam4_endpoint: endpoint {
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remote-endpoint = <&main_af_cam4>;
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};
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};
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port@5 {
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reg = <5>;
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main_af_cam5_endpoint: endpoint {
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remote-endpoint = <&main_af_cam5>;
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};
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};
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port@6 {
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reg = <6>;
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main_af_cam6_endpoint: endpoint {
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remote-endpoint = <&main_af_cam6>;
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};
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};
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port@7 {
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reg = <7>;
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main_af_cam7_endpoint: endpoint {
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remote-endpoint = <&main_af_cam7>;
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};
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};
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};
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&i2c6 {
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#address-cells = <1>;
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#size-cells = <0>;
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lm3643:lm3643@63 {
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compatible = "mediatek,lm3643";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x63>;
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#cooling-cells = <2>;
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pinctrl-names = "default", "hwen-high", "hwen-low";
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pinctrl-0 = <&lm3643_pins_default>;
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pinctrl-1 = <&lm3643_pins_hwen_high>;
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pinctrl-2 = <&lm3643_pins_hwen_low>;
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status = "okay";
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flash@0{
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reg = <0>;
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type = <0>;
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ct = <0>;
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part = <0>;
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port {
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fl_core_0: endpoint {
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remote-endpoint = <&flashlight_0>;
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};
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};
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};
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flash@1{
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reg = <1>;
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type = <0>;
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ct = <1>;
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part = <0>;
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port {
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fl_core_1: endpoint {
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remote-endpoint = <&flashlight_1>;
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};
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};
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};
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};
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};
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&i2c2 {
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status = "okay";
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clock-frequency = <400000>;
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#address-cells = <1>;
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#size-cells = <0>;
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camera-af-main-three@e {
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compatible = "mediatek,gt9772b";
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reg = <0x0e>;
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vin-supply = <&rt5133_gpio1>;
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port {
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main_af_cam3: endpoint {
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remote-endpoint = <&main_af_cam3_endpoint>;
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};
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};
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};
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camera-af-main-three@2b {
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compatible = "mediatek,ak7377a";
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reg = <0x2b>;
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vin-supply = <&rt5133_gpio1>;
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port {
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main_af_cam5: endpoint {
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remote-endpoint = <&main_af_cam5_endpoint>;
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};
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};
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};
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sensor2: sensor2@1a {
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compatible = "mediatek,imgsensor";
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sensor-names = "imx766_mipi_raw",
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"imx709_mipi_raw",
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"imx866_mipi_raw";
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reg = <0x1a>;
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#thermal-sensor-cells = <0>;
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reindex-match = "imx766_mipi_raw",
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"imx709_mipi_raw",
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"imx866_mipi_raw";
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reindex-to = <0>;
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pinctrl-names = "mclk_off",
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"mclk_2mA",
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"mclk_4mA",
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"mclk_6mA",
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"mclk_8mA",
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"rst_low",
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"rst_high",
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"mclk1_off",
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"mclk1_2mA",
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"mclk1_4mA",
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"mclk1_6mA",
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"mclk1_8mA",
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"rst1_low",
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"rst1_high",
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"ponv_low",
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"ponv_high",
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"scl_ap",
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"scl_scp",
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"sda_ap",
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"sda_scp",
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"avdd1_off",
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"avdd1_on";
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pinctrl-0 = <&camera_pins_cam2_mclk_off>;
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pinctrl-1 = <&camera_pins_cam2_mclk_2ma>;
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pinctrl-2 = <&camera_pins_cam2_mclk_4ma>;
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pinctrl-3 = <&camera_pins_cam2_mclk_6ma>;
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|
pinctrl-4 = <&camera_pins_cam2_mclk_8ma>;
|
|
pinctrl-5 = <&camera_pins_cam2_rst_0>;
|
|
pinctrl-6 = <&camera_pins_cam2_rst_1>;
|
|
pinctrl-7 = <&camera_pins_cam2_mclk1_off>;
|
|
pinctrl-8 = <&camera_pins_cam2_mclk1_2ma>;
|
|
pinctrl-9 = <&camera_pins_cam2_mclk1_4ma>;
|
|
pinctrl-10 = <&camera_pins_cam2_mclk1_6ma>;
|
|
pinctrl-11 = <&camera_pins_cam2_mclk1_8ma>;
|
|
pinctrl-12 = <&camera_pins_cam2_rst1_0>;
|
|
pinctrl-13 = <&camera_pins_cam2_rst1_1>;
|
|
pinctrl-14 = <&camera_pins_cam2_ponv_0>;
|
|
pinctrl-15 = <&camera_pins_cam2_ponv_1>;
|
|
pinctrl-16 = <&camera_pins_cam2_scl_ap>;
|
|
pinctrl-17 = <&camera_pins_cam2_scl_scp>;
|
|
pinctrl-18 = <&camera_pins_cam2_sda_ap>;
|
|
pinctrl-19 = <&camera_pins_cam2_sda_scp>;
|
|
pinctrl-20 = <&camera_pins_cam2_avdd1_0>;
|
|
pinctrl-21 = <&camera_pins_cam2_avdd1_1>;
|
|
|
|
avdd2-supply = <&rt5133_gpio2>;
|
|
dvdd-supply = <&rt5133_ldo7>;
|
|
dovdd-supply = <&rt5133_ldo1>;
|
|
afvdd1-supply = <&rt5133_gpio1>;
|
|
dvdd1-supply = <&rt5133_ldo8>;
|
|
|
|
clocks = <&topckgen_clk CLK_TOP_UNIVPLL_192M_D32>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_192M_D16>,
|
|
<&topckgen_clk CLK_TOP_F26M_CK_D2>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_192M_D10>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_192M_D8>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_D6_D16>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_D6_D8>,
|
|
<&topckgen_clk CLK_TOP_CAMTG4_SEL>,
|
|
<&topckgen_clk CLK_TOP_CAMTG_SEL>;
|
|
clock-names = "6", "12", "13", "19.2", "24", "26", "52", "mclk", "mclk1";
|
|
|
|
status = "okay";
|
|
|
|
port {
|
|
sensor2_out: endpoint {
|
|
remote-endpoint = <&seninf_csi_port_3_in>;
|
|
};
|
|
};
|
|
};
|
|
|
|
mtk_camera_eeprom2:camera_eeprom2@50 {
|
|
compatible = "mediatek,camera_eeprom";
|
|
reg = <0x50>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&i2c4 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
sensor1: sensor1@10 {
|
|
compatible = "mediatek,imgsensor";
|
|
sensor-names = "s5k3p9sp_mipi_raw";
|
|
reg = <0x10>;
|
|
#thermal-sensor-cells = <0>;
|
|
|
|
pinctrl-names = "mclk_off",
|
|
"mclk_2mA",
|
|
"mclk_4mA",
|
|
"mclk_6mA",
|
|
"mclk_8mA",
|
|
"rst_low",
|
|
"rst_high";
|
|
pinctrl-0 = <&camera_pins_cam1_mclk_off>;
|
|
pinctrl-1 = <&camera_pins_cam1_mclk_2ma>;
|
|
pinctrl-2 = <&camera_pins_cam1_mclk_4ma>;
|
|
pinctrl-3 = <&camera_pins_cam1_mclk_6ma>;
|
|
pinctrl-4 = <&camera_pins_cam1_mclk_8ma>;
|
|
pinctrl-5 = <&camera_pins_cam1_rst_0>;
|
|
pinctrl-6 = <&camera_pins_cam1_rst_1>;
|
|
|
|
avdd-supply = <&rt5133_ldo6>;
|
|
dvdd-supply = <&rt5133_ldo7>;
|
|
dovdd-supply = <&rt5133_ldo1>;
|
|
afvdd-supply = <&rt5133_ldo2>;
|
|
|
|
clocks = <&topckgen_clk CLK_TOP_UNIVPLL_192M_D32>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_192M_D16>,
|
|
<&topckgen_clk CLK_TOP_F26M_CK_D2>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_192M_D10>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_192M_D8>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_D6_D16>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_D6_D8>,
|
|
<&topckgen_clk CLK_TOP_CAMTG5_SEL>;
|
|
clock-names = "6", "12", "13", "19.2", "24", "26", "52", "mclk";
|
|
|
|
status = "okay";
|
|
|
|
port {
|
|
sensor1_out: endpoint {
|
|
remote-endpoint = <&seninf_csi_port_0_in>;
|
|
};
|
|
};
|
|
};
|
|
|
|
mtk_camera_eeprom1:camera_eeprom1@50 {
|
|
compatible = "mediatek,camera_eeprom";
|
|
reg = <0x50>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&i2c8 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
camera-af-main@72 {
|
|
compatible = "mediatek,lc898229";
|
|
reg = <0x72>;
|
|
vin-supply = <&rt5133_ldo3>;
|
|
port {
|
|
main_af: endpoint {
|
|
remote-endpoint = <&main_af_endpoint>;
|
|
};
|
|
};
|
|
};
|
|
|
|
camera-af-main@c {
|
|
compatible = "mediatek,gt9764";
|
|
reg = <0x0c>;
|
|
vin-supply = <&rt5133_ldo3>;
|
|
port {
|
|
main_af_cam1: endpoint {
|
|
remote-endpoint = <&main_af_cam1_endpoint>;
|
|
};
|
|
};
|
|
};
|
|
|
|
camera-af-main@f {
|
|
compatible = "mediatek,dw9800w";
|
|
reg = <0x0f>;
|
|
vin-supply = <&rt5133_ldo3>;
|
|
port {
|
|
main_af_cam4: endpoint {
|
|
remote-endpoint = <&main_af_cam4_endpoint>;
|
|
};
|
|
};
|
|
};
|
|
|
|
camera-af-main@a {
|
|
compatible = "mediatek,ak7375c";
|
|
reg = <0x0a>;
|
|
vin-supply = <&rt5133_ldo3>;
|
|
port {
|
|
main_af_cam6: endpoint {
|
|
remote-endpoint = <&main_af_cam6_endpoint>;
|
|
};
|
|
};
|
|
};
|
|
|
|
sensor0: sensor0@10 {
|
|
compatible = "mediatek,imgsensor";
|
|
sensor-names = "ov48b_mipi_raw",
|
|
"imx766dual_mipi_raw",
|
|
"imx519_mipi_raw",
|
|
"imx499_mipi_raw";
|
|
reg = <0x10>;
|
|
#thermal-sensor-cells = <0>;
|
|
|
|
/* reindex sensor if match sensor list */
|
|
reindex-match = "imx766dual_mipi_raw";
|
|
|
|
reindex-to = <2>;
|
|
|
|
pinctrl-names = "mclk_off",
|
|
"mclk_2mA",
|
|
"mclk_4mA",
|
|
"mclk_6mA",
|
|
"mclk_8mA",
|
|
"rst_low",
|
|
"rst_high",
|
|
"avdd1_off",
|
|
"avdd1_on";
|
|
pinctrl-0 = <&camera_pins_cam0_mclk_off>;
|
|
pinctrl-1 = <&camera_pins_cam0_mclk_2ma>;
|
|
pinctrl-2 = <&camera_pins_cam0_mclk_4ma>;
|
|
pinctrl-3 = <&camera_pins_cam0_mclk_6ma>;
|
|
pinctrl-4 = <&camera_pins_cam0_mclk_8ma>;
|
|
pinctrl-5 = <&camera_pins_cam0_rst_0>;
|
|
pinctrl-6 = <&camera_pins_cam0_rst_1>;
|
|
pinctrl-7 = <&camera_pins_cam0_avdd1_0>;
|
|
pinctrl-8 = <&camera_pins_cam0_avdd1_1>;
|
|
|
|
avdd-supply = <&rt5133_ldo4>;
|
|
dvdd-supply = <&rt5133_ldo8>;
|
|
dovdd-supply = <&rt5133_ldo1>;
|
|
afvdd-supply = <&rt5133_ldo3>;
|
|
|
|
clocks = <&topckgen_clk CLK_TOP_UNIVPLL_192M_D32>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_192M_D16>,
|
|
<&topckgen_clk CLK_TOP_F26M_CK_D2>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_192M_D10>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_192M_D8>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_D6_D16>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_D6_D8>,
|
|
<&topckgen_clk CLK_TOP_CAMTG3_SEL>;
|
|
clock-names = "6", "12", "13", "19.2", "24", "26", "52", "mclk";
|
|
|
|
status = "okay";
|
|
|
|
port {
|
|
sensor0_out: endpoint {
|
|
remote-endpoint = <&seninf_csi_port_2_in>;
|
|
};
|
|
};
|
|
};
|
|
|
|
mtk_camera_eeprom0:camera_eeprom0@50 {
|
|
compatible = "mediatek,camera_eeprom";
|
|
reg = <0x50>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&i2c9 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
camera-af-main-two@d {
|
|
compatible = "mediatek,gt9772a";
|
|
reg = <0x0d>;
|
|
vin-supply = <&rt5133_ldo2>;
|
|
port {
|
|
main_af_cam2: endpoint {
|
|
remote-endpoint = <&main_af_cam2_endpoint>;
|
|
};
|
|
};
|
|
};
|
|
|
|
camera-af-main-two@2a {
|
|
compatible = "mediatek,bu64253gwz";
|
|
reg = <0x2a>;
|
|
vin-supply = <&rt5133_ldo2>;
|
|
port {
|
|
main_af_cam7: endpoint {
|
|
remote-endpoint = <&main_af_cam7_endpoint>;
|
|
};
|
|
};
|
|
};
|
|
|
|
sensor4: sensor4@10 {
|
|
compatible = "mediatek,imgsensor";
|
|
sensor-names = "s5k3m5sx_mipi_raw";
|
|
reg = <0x10>;
|
|
#thermal-sensor-cells = <0>;
|
|
pinctrl-names = "mclk_off",
|
|
"mclk_2mA",
|
|
"mclk_4mA",
|
|
"mclk_6mA",
|
|
"mclk_8mA",
|
|
"rst_low",
|
|
"rst_high";
|
|
pinctrl-0 = <&camera_pins_cam4_mclk_off>;
|
|
pinctrl-1 = <&camera_pins_cam4_mclk_2ma>;
|
|
pinctrl-2 = <&camera_pins_cam4_mclk_4ma>;
|
|
pinctrl-3 = <&camera_pins_cam4_mclk_6ma>;
|
|
pinctrl-4 = <&camera_pins_cam4_mclk_8ma>;
|
|
pinctrl-5 = <&camera_pins_cam4_rst_0>;
|
|
pinctrl-6 = <&camera_pins_cam4_rst_1>;
|
|
|
|
avdd-supply = <&rt5133_ldo6>;
|
|
dvdd-supply = <&rt5133_gpio3>;
|
|
dovdd-supply = <&rt5133_ldo1>;
|
|
afvdd-supply = <&rt5133_ldo2>;
|
|
|
|
clocks = <&topckgen_clk CLK_TOP_UNIVPLL_192M_D32>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_192M_D16>,
|
|
<&topckgen_clk CLK_TOP_F26M_CK_D2>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_192M_D10>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_192M_D8>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_D6_D16>,
|
|
<&topckgen_clk CLK_TOP_UNIVPLL_D6_D8>,
|
|
<&topckgen_clk CLK_TOP_CAMTG2_SEL>;
|
|
clock-names = "6", "12", "13", "19.2", "24", "26", "52", "mclk";
|
|
|
|
status = "okay";
|
|
|
|
port {
|
|
sensor4_out: endpoint {
|
|
remote-endpoint = <&seninf_csi_port_1_in>;
|
|
};
|
|
};
|
|
};
|
|
|
|
mtk_camera_eeprom4:camera_eeprom4@50 {
|
|
compatible = "mediatek,camera_eeprom";
|
|
reg = <0x50>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
|
|
&pio {
|
|
lm3643_pins_default: default {
|
|
};
|
|
|
|
lm3643_pins_hwen_high: hwen-high {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO88__FUNC_GPIO88>;
|
|
slew-rate = <1>;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
lm3643_pins_hwen_low: hwen-low {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO88__FUNC_GPIO88>;
|
|
slew-rate = <1>;
|
|
output-low;
|
|
};
|
|
};
|
|
};
|
|
|
|
&mtk_composite_v4l2_1 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
port@0 {
|
|
reg = <0>;
|
|
flashlight_0: endpoint {
|
|
remote-endpoint = <&fl_core_0>;
|
|
};
|
|
};
|
|
port@1 {
|
|
reg = <1>;
|
|
flashlight_1: endpoint {
|
|
remote-endpoint = <&fl_core_1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
|
|
&thermal_zones {
|
|
camera0: camera0 {
|
|
polling-delay = <0>; /* milliseconds */
|
|
polling-delay-passive = <0>; /* milliseconds */
|
|
thermal-sensors = <&sensor0>;
|
|
};
|
|
camera1: camera1 {
|
|
polling-delay = <0>; /* milliseconds */
|
|
polling-delay-passive = <0>; /* milliseconds */
|
|
thermal-sensors = <&sensor1>;
|
|
};
|
|
camera2: camera2 {
|
|
polling-delay = <0>; /* milliseconds */
|
|
polling-delay-passive = <0>; /* milliseconds */
|
|
thermal-sensors = <&sensor2>;
|
|
};
|
|
camera4: camera4 {
|
|
polling-delay = <0>; /* milliseconds */
|
|
polling-delay-passive = <0>; /* milliseconds */
|
|
thermal-sensors = <&sensor4>;
|
|
};
|
|
};
|