1360 lines
30 KiB
Text
1360 lines
30 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2020 MediaTek Inc.
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*
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*/
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#include <generated/autoconf.h>
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/apusys/mt8195-apusys-power.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/pinctrl/mt8195-pinfunc.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/spmi/spmi.h>
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#include "mediatek/mt6359.dtsi"
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#define ROOT_NODE &odm
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ROOT_NODE {
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charger: charger {
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compatible = "mediatek,charger";
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gauge = <&mtk_gauge>;
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charger = <&mt6360_chg>;
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bootmode = <&chosen>;
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pmic = <&pmic>;
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algorithm_name = "Basic";
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charger_configuration= <0>;
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/* common */
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battery_cv = <4000000>;
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max_charger_voltage = <6500000>;
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min_charger_voltage = <4600000>;
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/* sw jeita */
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/* enable_sw_jeita; */
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jeita_temp_above_t4_cv = <4240000>;
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jeita_temp_t3_to_t4_cv = <4240000>;
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jeita_temp_t2_to_t3_cv = <4340000>;
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jeita_temp_t1_to_t2_cv = <4240000>;
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jeita_temp_t0_to_t1_cv = <4040000>;
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jeita_temp_below_t0_cv = <4040000>;
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temp_t4_thres = <50>;
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temp_t4_thres_minus_x_degree = <47>;
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temp_t3_thres = <45>;
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temp_t3_thres_minus_x_degree = <39>;
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temp_t2_thres = <10>;
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temp_t2_thres_plus_x_degree = <16>;
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temp_t1_thres = <0>;
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temp_t1_thres_plus_x_degree = <6>;
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temp_t0_thres = <0>;
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temp_t0_thres_plus_x_degree = <0>;
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temp_neg_10_thres = <0>;
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/* battery temperature protection */
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enable_min_charge_temp;
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min_charge_temp = <0>;
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min_charge_temp_plus_x_degree = <6>;
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max_charge_temp = <50>;
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max_charge_temp_minus_x_degree = <47>;
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/* charging current */
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usb_charger_current = <500000>;
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ac_charger_current = <2050000>;
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ac_charger_input_current = <3200000>;
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charging_host_charger_current = <1500000>;
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/* dynamic mivr */
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enable_dynamic_mivr;
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min_charger_voltage_1 = <4400000>;
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min_charger_voltage_2 = <4200000>;
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max_dmivr_charger_current = <1800000>;
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};
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extcon_usb: extcon_usb {
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compatible = "mediatek,extcon-usb";
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dev-conn = <&ssusb>;
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vbus-supply = <&otg_vbus>;
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vbus-volt = <5000000>;
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charger = <&mt6360_chg>;
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mediatek,bypss-typec-sink = <1>;
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vbus-current = <1800000>;
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};
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mmc_fixed_3v3: fixedregulator0 {
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compatible = "regulator-fixed";
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regulator-name = "mmc_power";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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regulator-always-on;
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};
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mmc_fixed_1v8_io: fixedregulator1 {
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compatible = "regulator-fixed";
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regulator-name = "mmc_io";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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enable-active-high;
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regulator-always-on;
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};
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mtk_ctd: mtk_ctd {
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compatible = "mediatek,mtk_ctd";
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bc12 = <&mt6360_chg>;
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bc12_sel = <0>;
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};
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pmic_temp: pmic_temp {
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compatible = "mediatek,mt6359-pmic-temp";
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io-channels =
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<&pmic_auxadc AUXADC_CHIP_TEMP>,
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<&pmic_auxadc AUXADC_VCORE_TEMP>,
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<&pmic_auxadc AUXADC_VPROC_TEMP>,
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<&pmic_auxadc AUXADC_VGPU_TEMP>;
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io-channel-names =
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"pmic_chip_temp",
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"pmic_buck1_temp",
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"pmic_buck2_temp",
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"pmic_buck3_temp";
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#thermal-sensor-cells = <1>;
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nvmem-cells = <&thermal_efuse_data1>;
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nvmem-cell-names = "e_data1";
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};
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tboard_thermistor1: tboard_thermistor1 {
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compatible = "generic-adc-thermal";
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#thermal-sensor-cells = <0>;
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io-channels = <&auxadc 0>;
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io-channel-names = "sensor-channel";
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temperature-lookup-table = < (-5000) 985
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0 860
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5000 740
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10000 629
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15000 530
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20000 442
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25000 367
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30000 304
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35000 251
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40000 207
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45000 171
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50000 141
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55000 117
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60000 97
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65000 81
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70000 67
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75000 56
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80000 47
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85000 40
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90000 34
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95000 29
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100000 25
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105000 21
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110000 18
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115000 15
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120000 13
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125000 12>;
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};
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tboard_thermistor2: tboard_thermistor2 {
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compatible = "generic-adc-thermal";
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#thermal-sensor-cells = <0>;
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io-channels = <&auxadc 0>;
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io-channel-names = "sensor-channel";
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temperature-lookup-table = < (-5000) 985
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0 860
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5000 740
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10000 629
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15000 530
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20000 442
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25000 367
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30000 304
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35000 251
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40000 207
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45000 171
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50000 141
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55000 117
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60000 97
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65000 81
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70000 67
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75000 56
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80000 47
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85000 40
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90000 34
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95000 29
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100000 25
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105000 21
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110000 18
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115000 15
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120000 13
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125000 12>;
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};
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tboard_thermistor3: tboard_thermistor3 {
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compatible = "generic-adc-thermal";
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#thermal-sensor-cells = <0>;
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io-channels = <&auxadc 0>;
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io-channel-names = "sensor-channel";
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temperature-lookup-table = < (-5000) 985
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0 860
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5000 740
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10000 629
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15000 530
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20000 442
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25000 367
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30000 304
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35000 251
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40000 207
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45000 171
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50000 141
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55000 117
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60000 97
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65000 81
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70000 67
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75000 56
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80000 47
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85000 40
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90000 34
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95000 29
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100000 25
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105000 21
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110000 18
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115000 15
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120000 13
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125000 12>;
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};
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usb_p1_vbus: regulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "vbus1";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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regulator-always-on;
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};
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usb_p3_vbus: regulator@1 {
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compatible = "regulator-fixed";
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regulator-name = "vbus3";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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regulator-always-on;
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};
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};
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&chosen {
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atag,videolfb-fb_base_l = <0x7e020000>;
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atag,videolfb-fb_base_h = <0x0>;
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atag,videolfb-islcmfound = <1>;
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atag,videolfb-islcm_inited = <0>;
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atag,videolfb-fps= <6000>;
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atag,videolfb-vramSize= <0x1be0000>;
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atag,videolfb-lcmname= "nt35595_fhd_dsi_cmd_truly_nt50358_drv";
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};
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&adsp_pcm {
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mediatek,tdmin-mem-type = <0>;
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mediatek,ul9-mem-type = <0>;
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mediatek,ul2-mem-type = <0>;
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mediatek,dsp-boot-run = <1>;
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status = "okay";
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};
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&afe {
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mediatek,dmic-iir-on;
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status = "okay";
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};
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&apu_top {
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vvpu-supply = <&mt6359_vproc1_reg>;
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vmdla-supply = <&mt6359_vproc2_reg>;
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vsram_apu-supply = <&mt6359_vsram_md_reg>;
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};
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&apuspm {
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vsram-supply = <&mt6359_vsram_md_reg>;
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apusys_top@MT8195_POWER_DOMAIN_APUSYS_TOP {
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apusys_top-supply = <&mt6359_vproc1_reg>;
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};
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};
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&apusys_power {
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vvpu-supply = <&mt6359_vproc1_reg>;
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vmdla-supply = <&mt6359_vproc2_reg>;
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vsram_apu-supply = <&mt6359_vsram_md_reg>;
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};
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&audio_asrc {
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status = "okay";
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};
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&auxadc {
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status = "okay";
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};
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&ddr_emi {
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dvfsrc-helper {
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vcore-supply = <&mt6359_vgpu11_reg>;
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status = "okay";
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};
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};
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&disp_dpi1 {
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status = "okay";
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port {
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dpi1_out: endpoint@0 {
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remote-endpoint = <&hdmi0_in>;
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};
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};
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};
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&disp_dsi0 {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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panel@0 {
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compatible = "boe,tv101wum-nl6";
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reg = <0>;
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enable-gpios = <&pio 108 0>;
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leden-gpios = <&pio 137 0>;
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avdd-gpios = <&pio 138 0>;
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avee-gpios = <&pio 139 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&panel_pins_default>;
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pp1800-supply = <&mt_pmic_vtp_ldo_reg>;
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status = "okay";
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port {
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panel_in: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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};
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ports {
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port {
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dsi_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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};
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&disp_pwm0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pwm0_gpio_def_cfg>;
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status = "okay";
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};
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ð {
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phy-mode ="rgmii-rxid";
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phy-handle = <ð_phy0>;
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snps,reset-gpio = <&pio 93 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <ð_default>;
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pinctrl-1 = <ð_sleep>;
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status = "okay";
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mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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eth_phy0: eth_phy0@1 {
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compatible = "ethernet-phy-id001c.c916";
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reg = <0x1>;
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};
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eth_phy1: eth_phy2@4 {
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compatible = "ethernet-phy-id001c.c816";
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reg = <0x4>;
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};
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};
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};
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&gpio_key {
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volinc_key{
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debounce-interval = <100>;
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gpios = <&pio 106 1>;
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linux,code = <115>;
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linux,input-type = <1>;
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};
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};
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&gpufreq {
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vgpu-supply = <&mt6315_7_vbuck1>;
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vsram_gpu-supply = <&mt6359_vsram_others_reg>;
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};
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&hdmi0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hdmi0_in: endpoint {
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remote-endpoint = <&dpi1_out>;
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};
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};
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};
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};
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&hdmirx0 {
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pinctrl-names = "default";
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pinctrl-0 = <&hdmi0_pins_default>;
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hdmi33v-supply = <&mt6359_vcn33_1_wifi_reg>;
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hdmi08v-supply = <&mt6359_va09_reg>;
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pin>;
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clock-frequency = <400000>;
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status = "okay";
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pin>;
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clock-frequency = <400000>;
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status = "okay";
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pin>;
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clock-frequency = <400000>;
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status = "okay";
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nt50358a@3e {
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compatible = "nt50358a";
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reg = <0x3e>;
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};
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touchscreen: touchscreen@5d {
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compatible = "hid-over-i2c";
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reg = <0x5d>;
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pinctrl-names = "default";
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pinctrl-0 = <&touch_default>;
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interrupt-parent = <&pio>;
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interrupts = <132 IRQ_TYPE_EDGE_FALLING>;
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post-power-on-delay-ms = <100>;
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hid-descr-addr = <0x0001>;
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mtk-tpd;
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};
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it5205fn: it5205fn@48 {
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compatible = "mediatek,it5205fn";
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reg = <0x48>;
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type3v3-supply = <&mt6359_vibr_reg>;
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status = "okay";
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};
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3_pin>;
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status = "disabled";
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};
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&i2c4 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4_pin>;
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status = "disabled";
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};
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&i2c5 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c5_pin>;
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status = "disabled";
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};
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&i2c6 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c6_pin>;
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clock-frequency = <400000>;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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subpmic_mtk: mt6360_pmu@34 {
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#interrupt-cells = <2>;
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status = "ok";
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compatible = "mediatek,mt6360_pmu";
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reg = <0x34>;
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wakeup-source;
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interrupt-controller;
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pinctrl-names = "default";
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pinctrl-0 = <&subpmic_default>;
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interrupt-parent = <&pio>;
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interrupts = <101 IRQ_TYPE_EDGE_FALLING>;
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interrupt-names = "IRQB";
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mt6360_chg: chg {
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compatible = "mediatek,mt6360_chg";
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vinovp = <14500000>;
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io-channels = <&mt6360_adc 0>, <&mt6360_adc 1>,
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<&mt6360_adc 3>, <&mt6360_adc 4>,
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<&mt6360_adc 5>, <&mt6360_adc 6>,
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<&mt6360_adc 8>, <&mt6360_adc 10>;
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io-channel-names = "USBID", "VBUSDIV5", "VSYS", "VBAT",
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"IBUS", "IBAT", "TEMP_JC", "TS";
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chg_name = "primary_chg";
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ichg = <2000000>; /* uA */
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aicr = <500000>; /* uA */
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mivr = <4400000>; /* uV */
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cv = <4000000>; /* uA */
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ieoc = <150000>; /* uA */
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safety_timer = <12>; /* hour */
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ircmp_resistor = <25000>; /* uohm */
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ircmp_vclamp = <32000>; /* uV */
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en_te = <1>;
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en_wdt = <1>;
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aicc_once = <1>;
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post_aicc = <1>;
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batoc_notify = <0>;
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charger = <&mt6360_chg>;
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phys = <&u2port0 PHY_TYPE_USB2>;
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phy-names = "usb2-phy";
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bc12_ref = <&mtk_ctd>;
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otg_vbus: usb-otg-vbus {
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regulator-compatible = "usb-otg-vbus";
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regulator-name = "usb-otg-vbus";
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regulator-min-microvolt = <4425000>;
|
|
regulator-max-microvolt = <5825000>;
|
|
regulator-min-microamp = <500000>;
|
|
regulator-max-microamp = <3000000>;
|
|
};
|
|
};
|
|
mt6360_adc: adc {
|
|
compatible = "mediatek,mt6360_adc";
|
|
#io-channel-cells = <1>;
|
|
};
|
|
pmic {
|
|
compatible = "mediatek,mt6360_pmic";
|
|
mt6360_mdla_buck_reg: buck1 {
|
|
regulator-compatible = "BUCK1";
|
|
regulator-name = "mt6360,buck1";
|
|
regulator-min-microvolt = <300000>;
|
|
regulator-max-microvolt = <1300000>;
|
|
regulator-allowed-modes = <0 2 3>;
|
|
regulator-always-on;
|
|
};
|
|
buck2 {
|
|
regulator-compatible = "BUCK2";
|
|
regulator-name = "mt6360,buck2";
|
|
regulator-min-microvolt = <300000>;
|
|
regulator-max-microvolt = <1300000>;
|
|
regulator-allowed-modes = <0 2 3>;
|
|
regulator-always-on;
|
|
};
|
|
ldo6 {
|
|
regulator-compatible = "LDO6";
|
|
regulator-name = "mt6360,ldo6";
|
|
regulator-min-microvolt = <500000>;
|
|
regulator-max-microvolt = <2100000>;
|
|
regulator-allowed-modes = <0 2>;
|
|
regulator-always-on;
|
|
};
|
|
ldo7 {
|
|
regulator-compatible = "LDO7";
|
|
regulator-name = "mt6360,ldo7";
|
|
regulator-min-microvolt = <500000>;
|
|
regulator-max-microvolt = <2100000>;
|
|
regulator-allowed-modes = <0 2>;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
ldo {
|
|
compatible = "mediatek,mt6360_ldo";
|
|
mt_pmic_vfp_ldo_reg: ldo1 {
|
|
regulator-compatible = "LDO1";
|
|
regulator-name = "mt6360,ldo1";
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3600000>;
|
|
regulator-allowed-modes = <0 2>;
|
|
regulator-always-on;
|
|
};
|
|
mt_pmic_vtp_ldo_reg: ldo2 {
|
|
regulator-compatible = "LDO2";
|
|
regulator-name = "vtp";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <3600000>;
|
|
regulator-allowed-modes = <0 2>;
|
|
};
|
|
mt_pmic_vmc_ldo_reg: ldo3 {
|
|
regulator-compatible = "LDO3";
|
|
regulator-name = "mt6360,ldo3";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <3600000>;
|
|
regulator-allowed-modes = <0 2>;
|
|
};
|
|
mt_pmic_vmch_ldo_reg: ldo5 {
|
|
regulator-compatible = "LDO5";
|
|
regulator-name = "mt6360,ldo5";
|
|
regulator-min-microvolt = <2700000>;
|
|
regulator-max-microvolt = <3600000>;
|
|
regulator-allowed-modes = <0 2>;
|
|
};
|
|
};
|
|
};
|
|
mt6360_typec: mt6360_typec@4e {
|
|
compatible = "mediatek,mt6360_typec";
|
|
reg = <0x4e>;
|
|
mt-tcpc,name = "type_c_port0"; /* tcpc_device's name */
|
|
/* 0: Unknown, 1: SNK, 2: SRC, 3: DRP, 4: Try.SRC, 5: Try.SNK */
|
|
mt-tcpc,role_def = <5>;
|
|
mt-tcpc,rp_level = <1>; /* 0: Default, 1: 1.5, 2: 3.0 */
|
|
/* 0: Never, 1: Always, 2: EMarkOnly, 3: StartOnly */
|
|
mt-tcpc,vconn_supply = <1>;
|
|
mt6360pd,intr_gpio = <&pio 100 0x0>;
|
|
mt6360pd,intr_gpio_num = <100>;
|
|
mt6360pd,pcb_gpio = <&pio 19 0x0>;
|
|
mt6360pd,pcb_gpio_num = <19>;
|
|
interrupt-parent = <&subpmic_mtk>;
|
|
interrupts = <64 0>;
|
|
interrupt-names = "usbid_evt";
|
|
charger = <&mt6360_chg>;
|
|
switch = <&typec_mux_switch>;
|
|
pd-data {
|
|
pd,vid = <0x29cf>;
|
|
pd,pid = <0x6360>;
|
|
pd,source-cap-ext = /bits/ 8 <0xcf 0x29 0x60 0x63
|
|
0x00 0x00 0x00 0x00
|
|
0x00 0x00 0x00 0x00
|
|
0x00 0x00 0x00 0x00
|
|
0x00 0x00 0x00 0x00
|
|
0x00 0x00 0x01 0x07
|
|
0x00>;
|
|
pd,mfrs = "RichtekTCPC";
|
|
|
|
/*
|
|
* VSAFE5V = 0, MAX_POWER = 1, CUSTOM = 2,
|
|
* MAX_POWER_LV = 0x21, MAX_POWER_LVIC = 0x31
|
|
* MAX_POWER_HV = 0x41, MAX_POWER_HVIC = 0x51
|
|
*/
|
|
pd,charging_policy = <0x31>;
|
|
|
|
pd,source-pdo-size = <1>;
|
|
pd,source-pdo-data = <0x00019096>; /* 5V, 1500 mA */
|
|
pd,sink-pdo-size = <1>;
|
|
pd,sink-pdo-data = <0x000190c8>;
|
|
|
|
/*
|
|
* No DP, host + device
|
|
* pd,id-vdo-size = <6>;
|
|
* pd,id-vdo-data = <0xd14029cf 0x0 0x63600000
|
|
0x61000000 0x0 0x41000000>;
|
|
* With DP
|
|
* pd,id-vdo-size = <6>;
|
|
* pd,id-vdo-data = <0xd54029cf 0x0 0x63600000
|
|
0x61000000 0x0 0x41000000>;
|
|
*/
|
|
|
|
pd,id-vdo-size = <6>;
|
|
pd,id-vdo-data = <0xd14029cf 0x0 0x63600000
|
|
0x61000000 0x0 0x41000000>;
|
|
|
|
bat,nr = <1>;
|
|
bat-info0 {
|
|
bat,vid = <0x29cf>;
|
|
bat,pid = <0x6360>;
|
|
bat,mfrs = "bat1";
|
|
bat,design_cap = <3000>;
|
|
};
|
|
};
|
|
dpm_caps {
|
|
local_dr_power;
|
|
local_dr_data;
|
|
// local_ext_power;
|
|
local_usb_comm;
|
|
// local_usb_suspend;
|
|
// local_high_cap;
|
|
// local_give_back;
|
|
local_no_suspend;
|
|
local_vconn_supply;
|
|
|
|
// attemp_discover_cable_dfp;
|
|
attemp_enter_dp_mode;
|
|
attemp_discover_cable;
|
|
attemp_discover_id;
|
|
|
|
/* 0: disable, 1: prefer_snk, 2: prefer_src */
|
|
pr_check = <0>;
|
|
// pr_reject_as_source;
|
|
// pr_reject_as_sink;
|
|
// pr_check_gp_source;
|
|
// pr_check_gp_sink;
|
|
|
|
/* 0: disable, 1: prefer_ufp, 2: prefer_dfp */
|
|
dr_check = <0>;
|
|
// dr_reject_as_dfp;
|
|
// dr_reject_as_ufp;
|
|
};
|
|
displayport {
|
|
/* connection type = "both", "ufp_d", "dfp_d" */
|
|
1st_connection = "dfp_d";
|
|
2nd_connection = "dfp_d";
|
|
signal,dp_v13;
|
|
//signal,dp_gen2;
|
|
//usbr20_not_used;
|
|
typec,receptacle;
|
|
ufp_d {
|
|
//pin_assignment,mode_a;
|
|
//pin_assignment,mode_b;
|
|
//pin_assignment,mode_c;
|
|
//pin_assignment,mode_d;
|
|
//pin_assignment,mode_e;
|
|
};
|
|
dfp_d {
|
|
//pin_assignment,mode_a;
|
|
//pin_assignment,mode_b;
|
|
pin_assignment,mode_c;
|
|
pin_assignment,mode_d;
|
|
pin_assignment,mode_e;
|
|
//pin_assignment,mode_f;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c7 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c7_pin>;
|
|
status = "disabled";
|
|
};
|
|
|
|
&keypad {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&kpd_gpio>;
|
|
mediatek,kpd-key-debounce = <1024>;
|
|
mediatek,kpd-sw-pwrkey = <116>;
|
|
mediatek,kpd-hw-pwrkey = <8>;
|
|
mediatek,kpd-use-extend-type = <0>;
|
|
/*HW Keycode [0~71] -> Linux Keycode*/
|
|
mediatek,kpd-hw-map-num = <72>;
|
|
mediatek,kpd-hw-init-map = <115 114 0 0 0 0 0 0 0
|
|
0 0 0 0 0 0 0 0 0
|
|
0 0 0 0 0 0 0 0 0
|
|
0 0 0 0 0 0 0 0 0
|
|
0 0 0 0 0 0 0 0 0
|
|
0 0 0 0 0 0 0 0 0
|
|
0 0 0 0 0 0 0 0 0
|
|
0 0 0 0 0 0 0 0 0 >;
|
|
mediatek,kpd-pwrkey-eint-gpio = <0>;
|
|
mediatek,kpd-pwkey-gpio-din = <0>;
|
|
mediatek,kpd-hw-dl-key0 = <0>;
|
|
mediatek,kpd-hw-dl-key1 = <1>;
|
|
mediatek,kpd-hw-dl-key2 = <8>;
|
|
mediatek,kpd-hw-recovery-key = <0>;
|
|
mediatek,kpd-hw-factory-key = <1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&mfg0 {
|
|
domain-supply = <&mt6315_7_vbuck1>;
|
|
};
|
|
|
|
&mipi_tx_config0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&mmc0 {
|
|
status = "okay";
|
|
pinctrl-names = "default", "state_uhs";
|
|
pinctrl-0 = <&mmc0_pins_default>;
|
|
pinctrl-1 = <&mmc0_pins_uhs>;
|
|
bus-width = <8>;
|
|
max-frequency = <200000000>;
|
|
cap-mmc-highspeed;
|
|
mmc-hs200-1_8v;
|
|
mmc-hs400-1_8v;
|
|
supports-cqe;
|
|
cap-mmc-hw-reset;
|
|
no-sdio;
|
|
no-sd;
|
|
hs400-ds-delay = <0x14c11>;
|
|
vmmc-supply = <&mmc_fixed_3v3>;
|
|
vqmmc-supply = <&mmc_fixed_1v8_io>;
|
|
non-removable;
|
|
};
|
|
|
|
&mmc1 {
|
|
status = "okay";
|
|
pinctrl-names = "default", "state_uhs";
|
|
pinctrl-0 = <&mmc1_pins_default>;
|
|
pinctrl-1 = <&mmc1_pins_uhs>;
|
|
bus-width = <4>;
|
|
max-frequency = <200000000>;
|
|
cap-sd-highspeed;
|
|
sd-uhs-sdr50;
|
|
sd-uhs-sdr104;
|
|
no-mmc;
|
|
no-sdio;
|
|
cd-gpios = <&pio 129 GPIO_ACTIVE_HIGH>;
|
|
vmmc-supply = <&mt_pmic_vmch_ldo_reg>;
|
|
vqmmc-supply = <&mt_pmic_vmc_ldo_reg>;
|
|
};
|
|
|
|
&mt6359codec {
|
|
mediatek,mic-type-1 = <3>; /* DCC */
|
|
};
|
|
|
|
&mt_pmic_vtp_ldo_reg {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
&pcie0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie0_pins_default>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie1_pins_default>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pio {
|
|
pinctrl-names = "default";
|
|
|
|
aud_pins_default: audiodefault {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO69__FUNC_AUD_CLK_MOSI>,
|
|
<PINMUX_GPIO70__FUNC_AUD_SYNC_MOSI>,
|
|
<PINMUX_GPIO71__FUNC_AUD_DAT_MOSI0>,
|
|
<PINMUX_GPIO72__FUNC_AUD_DAT_MOSI1>,
|
|
<PINMUX_GPIO73__FUNC_AUD_DAT_MISO0>,
|
|
<PINMUX_GPIO74__FUNC_AUD_DAT_MISO1>,
|
|
<PINMUX_GPIO75__FUNC_AUD_DAT_MISO2>,
|
|
<PINMUX_GPIO61__FUNC_DMIC1_CLK>,
|
|
<PINMUX_GPIO62__FUNC_DMIC1_DAT>,
|
|
<PINMUX_GPIO64__FUNC_DMIC2_DAT>,
|
|
<PINMUX_GPIO14__FUNC_DMIC3_DAT>,
|
|
<PINMUX_GPIO15__FUNC_DMIC3_CLK>,
|
|
<PINMUX_GPIO16__FUNC_DMIC4_DAT>,
|
|
<PINMUX_GPIO17__FUNC_DMIC4_CLK>,
|
|
<PINMUX_GPIO46__FUNC_I2SIN_MCK>,
|
|
<PINMUX_GPIO47__FUNC_I2SIN_BCK>,
|
|
<PINMUX_GPIO48__FUNC_I2SIN_WS>,
|
|
<PINMUX_GPIO49__FUNC_I2SIN_D0>,
|
|
<PINMUX_GPIO50__FUNC_I2SO1_MCK>,
|
|
<PINMUX_GPIO51__FUNC_I2SO1_BCK>,
|
|
<PINMUX_GPIO52__FUNC_I2SO1_WS>,
|
|
<PINMUX_GPIO53__FUNC_I2SO1_D0>,
|
|
<PINMUX_GPIO54__FUNC_I2SO1_D1>,
|
|
<PINMUX_GPIO55__FUNC_I2SO1_D2>,
|
|
<PINMUX_GPIO56__FUNC_I2SO1_D3>;
|
|
};
|
|
};
|
|
|
|
eth_default: eth_default {
|
|
txd_pins {
|
|
pinmux = <PINMUX_GPIO77__FUNC_GBE_TXD3>,
|
|
<PINMUX_GPIO78__FUNC_GBE_TXD2>,
|
|
<PINMUX_GPIO79__FUNC_GBE_TXD1>,
|
|
<PINMUX_GPIO80__FUNC_GBE_TXD0>;
|
|
drive-strength = <MTK_DRIVE_8mA>;
|
|
};
|
|
cc_pins {
|
|
pinmux = <PINMUX_GPIO85__FUNC_GBE_TXC>,
|
|
<PINMUX_GPIO88__FUNC_GBE_TXEN>,
|
|
<PINMUX_GPIO87__FUNC_GBE_RXDV>,
|
|
<PINMUX_GPIO86__FUNC_GBE_RXC>;
|
|
drive-strength = <MTK_DRIVE_8mA>;
|
|
};
|
|
rxd_pins {
|
|
pinmux = <PINMUX_GPIO81__FUNC_GBE_RXD3>,
|
|
<PINMUX_GPIO82__FUNC_GBE_RXD2>,
|
|
<PINMUX_GPIO83__FUNC_GBE_RXD1>,
|
|
<PINMUX_GPIO84__FUNC_GBE_RXD0>;
|
|
};
|
|
mdio_pins {
|
|
pinmux = <PINMUX_GPIO89__FUNC_GBE_MDC>,
|
|
<PINMUX_GPIO90__FUNC_GBE_MDIO>;
|
|
input-enable;
|
|
};
|
|
power_pins {
|
|
pinmux = <PINMUX_GPIO91__FUNC_GPIO91>,
|
|
<PINMUX_GPIO92__FUNC_GPIO92>;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
eth_sleep: eth_sleep {
|
|
txd_pins {
|
|
pinmux = <PINMUX_GPIO77__FUNC_GPIO77>,
|
|
<PINMUX_GPIO78__FUNC_GPIO78>,
|
|
<PINMUX_GPIO79__FUNC_GPIO79>,
|
|
<PINMUX_GPIO80__FUNC_GPIO80>;
|
|
};
|
|
cc_pins {
|
|
pinmux = <PINMUX_GPIO85__FUNC_GPIO85>,
|
|
<PINMUX_GPIO88__FUNC_GPIO88>,
|
|
<PINMUX_GPIO87__FUNC_GPIO87>,
|
|
<PINMUX_GPIO86__FUNC_GPIO86>;
|
|
};
|
|
rxd_pins {
|
|
pinmux = <PINMUX_GPIO81__FUNC_GPIO81>,
|
|
<PINMUX_GPIO82__FUNC_GPIO82>,
|
|
<PINMUX_GPIO83__FUNC_GPIO83>,
|
|
<PINMUX_GPIO84__FUNC_GPIO84>;
|
|
};
|
|
mdio_pins {
|
|
pinmux = <PINMUX_GPIO89__FUNC_GPIO89>,
|
|
<PINMUX_GPIO90__FUNC_GPIO90>;
|
|
input-disable;
|
|
bias-disable;
|
|
};
|
|
power_pins {
|
|
pinmux = <PINMUX_GPIO91__FUNC_GPIO91>,
|
|
<PINMUX_GPIO92__FUNC_GPIO92>;
|
|
input-disable;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
hdmi0_pins_default: hdmi0default {
|
|
hdmirx_hpd {
|
|
pinmux = <PINMUX_GPIO27__FUNC_HDMIRX20_HTPLG>;
|
|
};
|
|
hdmirx_5v {
|
|
pinmux = <PINMUX_GPIO28__FUNC_HDMIRX20_PWR5V>;
|
|
bias-disable;
|
|
};
|
|
hdmirx_scl {
|
|
pinmux = <PINMUX_GPIO29__FUNC_HDMIRX20_SCL>;
|
|
};
|
|
hdmirx_sda {
|
|
pinmux = <PINMUX_GPIO30__FUNC_HDMIRX20_SDA>;
|
|
mediatek,drive-strength-adv = <0>;
|
|
drive-strength = <MTK_DRIVE_10mA>;
|
|
};
|
|
};
|
|
|
|
i2c0_pin: i2c0_pin {
|
|
pins_bus {
|
|
pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
|
|
<PINMUX_GPIO9__FUNC_SCL0>;
|
|
bias-pull-up = <1>;
|
|
mediatek,rsel = <7>;
|
|
mediatek,drive-strength-adv = <7>;
|
|
};
|
|
};
|
|
|
|
i2c1_pin: i2c1_pin {
|
|
pins_bus {
|
|
pinmux = <PINMUX_GPIO10__FUNC_SDA1>,
|
|
<PINMUX_GPIO11__FUNC_SCL1>;
|
|
bias-pull-up = <1>;
|
|
mediatek,rsel = <7>;
|
|
mediatek,drive-strength-adv = <7>;
|
|
};
|
|
};
|
|
|
|
i2c2_pin: i2c2_pin {
|
|
pins_bus {
|
|
pinmux = <PINMUX_GPIO12__FUNC_SDA2>,
|
|
<PINMUX_GPIO13__FUNC_SCL2>;
|
|
bias-pull-up = <1>;
|
|
mediatek,rsel = <7>;
|
|
mediatek,drive-strength-adv = <0>;
|
|
drive-strength = <MTK_DRIVE_6mA>;
|
|
};
|
|
};
|
|
|
|
i2c3_pin: i2c3_pin {
|
|
pins_bus {
|
|
pinmux = <PINMUX_GPIO14__FUNC_SDA3>,
|
|
<PINMUX_GPIO15__FUNC_SCL3>;
|
|
bias-pull-up = <1>;
|
|
mediatek,rsel = <7>;
|
|
mediatek,drive-strength-adv = <7>;
|
|
};
|
|
};
|
|
|
|
i2c4_pin: i2c4_pin {
|
|
pins_bus {
|
|
pinmux = <PINMUX_GPIO16__FUNC_SDA4>,
|
|
<PINMUX_GPIO17__FUNC_SCL4>;
|
|
bias-pull-up = <1>;
|
|
mediatek,rsel = <7>;
|
|
mediatek,drive-strength-adv = <7>;
|
|
};
|
|
};
|
|
|
|
i2c5_pin: i2c5_pin {
|
|
pins_bus {
|
|
pinmux = <PINMUX_GPIO29__FUNC_SCL5>,
|
|
<PINMUX_GPIO30__FUNC_SDA5>;
|
|
bias-pull-up = <1>;
|
|
mediatek,rsel = <7>;
|
|
mediatek,drive-strength-adv = <7>;
|
|
};
|
|
};
|
|
|
|
i2c6_pin: i2c6_pin {
|
|
pins_bus {
|
|
pinmux = <PINMUX_GPIO25__FUNC_SDA6>,
|
|
<PINMUX_GPIO26__FUNC_SCL6>;
|
|
bias-pull-up = <1>;
|
|
};
|
|
};
|
|
|
|
i2c7_pin: i2c7_pin {
|
|
pins_bus {
|
|
pinmux = <PINMUX_GPIO27__FUNC_SCL7>,
|
|
<PINMUX_GPIO28__FUNC_SDA7>;
|
|
bias-pull-up = <1>;
|
|
};
|
|
};
|
|
|
|
kpd_gpio: kpd_gpio {
|
|
pins_cols {
|
|
pinmux = <PINMUX_GPIO106__FUNC_KPCOL0>,
|
|
<PINMUX_GPIO107__FUNC_KPCOL1>;
|
|
input-enable;
|
|
bias-pull-up;
|
|
};
|
|
|
|
pins_rows {
|
|
pinmux = <PINMUX_GPIO104__FUNC_KPROW0>,
|
|
<PINMUX_GPIO105__FUNC_KPROW1>;
|
|
output-low;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
mmc0_pins_default: mmc0default {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
|
|
<PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
|
|
<PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
|
|
<PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
|
|
<PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
|
|
<PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
|
|
<PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
|
|
<PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
|
|
<PINMUX_GPIO121__FUNC_MSDC0_CMD>;
|
|
input-enable;
|
|
drive-strength = <MTK_DRIVE_6mA>;
|
|
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
|
};
|
|
|
|
pins_clk {
|
|
pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
|
|
drive-strength = <MTK_DRIVE_6mA>;
|
|
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
|
};
|
|
|
|
pins_rst {
|
|
pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
|
|
drive-strength = <MTK_DRIVE_6mA>;
|
|
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
|
};
|
|
};
|
|
|
|
mmc0_pins_uhs: mmc0uhs{
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
|
|
<PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
|
|
<PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
|
|
<PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
|
|
<PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
|
|
<PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
|
|
<PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
|
|
<PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
|
|
<PINMUX_GPIO121__FUNC_MSDC0_CMD>;
|
|
input-enable;
|
|
drive-strength = <MTK_DRIVE_8mA>;
|
|
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
|
};
|
|
|
|
pins_clk {
|
|
pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
|
|
drive-strength = <MTK_DRIVE_8mA>;
|
|
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
|
};
|
|
|
|
pins_ds {
|
|
pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>;
|
|
drive-strength = <MTK_DRIVE_8mA>;
|
|
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
|
};
|
|
|
|
pins_rst {
|
|
pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
|
|
drive-strength = <MTK_DRIVE_8mA>;
|
|
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
|
};
|
|
};
|
|
|
|
mmc1_pins_default: mmc1-pins-default {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
|
|
<PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
|
|
<PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
|
|
<PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
|
|
<PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
|
|
input-enable;
|
|
drive-strength = <MTK_DRIVE_8mA>;
|
|
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
|
};
|
|
|
|
pins_clk {
|
|
pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
|
|
drive-strength = <MTK_DRIVE_8mA>;
|
|
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
|
};
|
|
|
|
pins_insert {
|
|
pinmux = <PINMUX_GPIO129__FUNC_GPIO129>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
mmc1_pins_uhs: mmc1-pins-uhs {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
|
|
<PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
|
|
<PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
|
|
<PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
|
|
<PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
|
|
input-enable;
|
|
drive-strength = <MTK_DRIVE_8mA>;
|
|
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
|
};
|
|
|
|
pins_clk {
|
|
pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
|
|
drive-strength = <MTK_DRIVE_8mA>;
|
|
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
|
};
|
|
};
|
|
|
|
panel_pins_default: panel_pins_default {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO108__FUNC_GPIO108>,
|
|
<PINMUX_GPIO137__FUNC_GPIO137>,
|
|
<PINMUX_GPIO138__FUNC_GPIO138>,
|
|
<PINMUX_GPIO139__FUNC_GPIO139>;
|
|
slew-rate = <1>;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
pcie0_pins_default: pcie0default {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO19__FUNC_WAKEN>,
|
|
<PINMUX_GPIO20__FUNC_PERSTN>,
|
|
<PINMUX_GPIO21__FUNC_CLKREQN>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
pcie1_pins_default: pcie1default {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO0__FUNC_PERSTN_1>,
|
|
<PINMUX_GPIO1__FUNC_CLKREQN_1>,
|
|
<PINMUX_GPIO2__FUNC_WAKEN_1>;
|
|
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
|
};
|
|
};
|
|
|
|
pwm0_gpio_def_cfg: pwm0default {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO97__FUNC_DISP_PWM0>;
|
|
};
|
|
};
|
|
|
|
subpmic_default: subpmicdefault {
|
|
subpmic_pin_irq: pin_irq {
|
|
pinmux = <PINMUX_GPIO101__FUNC_GPIO101>;
|
|
input-enable;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
touch_default: touchdefault {
|
|
touch_pin_irq: pin_irq {
|
|
pinmux = <PINMUX_GPIO132__FUNC_GPIO132>;
|
|
input-enable;
|
|
bias-pull-up;
|
|
};
|
|
|
|
touch_pin_reset: pin_reset {
|
|
pinmux = <PINMUX_GPIO133__FUNC_GPIO133>;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
uart0_pin: uart0_pin {
|
|
uart_pins {
|
|
pinmux = <PINMUX_GPIO98__FUNC_UTXD0>,
|
|
<PINMUX_GPIO99__FUNC_URXD0>;
|
|
};
|
|
};
|
|
|
|
u3_p0_vbus: u3_p0vbusdefault {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO63__FUNC_VBUSVALID>;
|
|
input-enable;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pwm {
|
|
status = "okay";
|
|
};
|
|
|
|
&pwmleds {
|
|
status = "okay";
|
|
};
|
|
|
|
&scp_dvfs {
|
|
sshub-vcore-supply = <&mt6359_vgpu11_sshub_reg>;
|
|
};
|
|
|
|
&sound {
|
|
mediatek,hdmi-codec = <&hdmi0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&aud_pins_default>;
|
|
status = "okay";
|
|
};
|
|
|
|
|
|
&ssusb {
|
|
maximum-speed = "high-speed";
|
|
mediatek,force-vbus;
|
|
dr_mode = "peripheral"; /* 1: host, 2: device, 3 dual-mode */
|
|
status = "okay";
|
|
};
|
|
|
|
&ssusb2 {
|
|
vusb33-supply = <&mt6359_vusb_reg>;
|
|
maximum-speed = "high-speed";
|
|
dr_mode = "host";
|
|
vbus-supply = <&usb_p3_vbus>;
|
|
status = "okay";
|
|
};
|
|
|
|
&thermal_zones {
|
|
ap_ntc1 {
|
|
polling-delay = <1000>; /* milliseconds */
|
|
polling-delay-passive = <0>; /* milliseconds */
|
|
thermal-sensors = <&tboard_thermistor1>;
|
|
};
|
|
|
|
ap_ntc2 {
|
|
polling-delay = <1000>; /* milliseconds */
|
|
polling-delay-passive = <0>; /* milliseconds */
|
|
thermal-sensors = <&tboard_thermistor2>;
|
|
};
|
|
|
|
ap_ntc3 {
|
|
polling-delay = <1000>; /* milliseconds */
|
|
polling-delay-passive = <0>; /* milliseconds */
|
|
thermal-sensors = <&tboard_thermistor3>;
|
|
};
|
|
|
|
pmic_t {
|
|
polling-delay = <1000>; /* milliseconds */
|
|
polling-delay-passive = <1000>; /* milliseconds */
|
|
thermal-sensors = <&pmic_temp 0>;
|
|
trips {
|
|
pmic_temp_crit: pmic_temp_crit@0 {
|
|
temperature = <125000>;
|
|
hysteresis = <2000>;
|
|
type = "critical";
|
|
};
|
|
};
|
|
};
|
|
|
|
pmic_vcore {
|
|
polling-delay = <0>; /* milliseconds */
|
|
polling-delay-passive = <0>; /* milliseconds */
|
|
thermal-sensors = <&pmic_temp 1>;
|
|
};
|
|
|
|
pmic_vproc {
|
|
polling-delay = <0>; /* milliseconds */
|
|
polling-delay-passive = <0>; /* milliseconds */
|
|
thermal-sensors = <&pmic_temp 2>;
|
|
};
|
|
|
|
pmic_vgpu {
|
|
polling-delay = <0>; /* milliseconds */
|
|
polling-delay-passive = <0>; /* milliseconds */
|
|
thermal-sensors = <&pmic_temp 3>;
|
|
};
|
|
};
|
|
|
|
&usb_host0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host2 {
|
|
mediatek,frame-cnt;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2port0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2port1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2port3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&u3phy0 {
|
|
status="okay";
|
|
};
|
|
|
|
&u3phy1 {
|
|
status="okay";
|
|
};
|
|
|
|
&u3phy3 {
|
|
status="okay";
|
|
};
|
|
|
|
&u3port0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&u3port1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart0_pin>;
|
|
clocks = <&clk26m>, <&clk26m>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usb30 {
|
|
phys = <&u2port1 PHY_TYPE_USB2>;
|
|
vusb33-supply = <&mt6359_vusb_reg>;
|
|
vbus-supply = <&usb_p1_vbus>;
|
|
mediatek,u3p-dis-msk = <0x1>;
|
|
mediatek,runtime-support;
|
|
mediatek,frame-cnt;
|
|
wakeup-source;
|
|
status = "okay";
|
|
};
|
|
|
|
#include "mediatek/cust_mt8195_camera_v4l2.dtsi"
|