/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2020 MediaTek Inc. */ #ifndef __APUSYS_SECURE_H__ #define __APUSYS_SECURE_H__ #include #include enum mtk_apusys_kernel_op { MTK_APUSYS_KERNEL_OP_REVISER_SET_BOUNDARY = 0, MTK_APUSYS_KERNEL_OP_SET_AO_DBG_SEL, MTK_APUSYS_KERNEL_OP_REVISER_CHK_VALUE, MTK_APUSYS_KERNEL_OP_REVISER_SET_DEFAULT_IOVA, MTK_APUSYS_KERNEL_OP_REVISER_GET_INTERRUPT_STATUS, MTK_APUSYS_KERNEL_OP_REVISER_SET_CONTEXT_ID, MTK_APUSYS_KERNEL_OP_REVISER_SET_REMAP_TABLE, MTK_APUSYS_KERNEL_OP_DEVAPC_INIT_RCX, MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_REVISER, MTK_APUSYS_KERNEL_OP_APUSYS_RV_RESET_MP, MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_BOOT, MTK_APUSYS_KERNEL_OP_APUSYS_RV_START_MP, MTK_APUSYS_KERNEL_OP_APUSYS_RV_STOP_MP, MTK_APUSYS_KERNEL_OP_APUSYS_RV_DISABLE_WDT_ISR, MTK_APUSYS_KERNEL_OP_APUSYS_RV_CLEAR_WDT_ISR, MTK_APUSYS_KERNEL_OP_APUSYS_RV_CG_GATING, MTK_APUSYS_KERNEL_OP_APUSYS_RV_CG_UNGATING, MTK_APUSYS_KERNEL_OP_APUSYS_RV_COREDUMP_SHADOW_COPY, MTK_APUSYS_KERNEL_OP_APUSYS_RV_TCMDUMP, MTK_APUSYS_KERNEL_OP_APUSYS_RV_RAMDUMP, MTK_APUSYS_KERNEL_OP_APUSYS_RV_TBUFDUMP, MTK_APUSYS_KERNEL_OP_APUSYS_RV_CACHEDUMP, MTK_APUSYS_KERNEL_OP_APUSYS_RV_DBG_APB_ATTACH, MTK_APUSYS_KERNEL_OP_APUSYS_RV_REGDUMP, MTK_APUSYS_KERNEL_OP_APUSYS_PWR_DUMP, MTK_APUSYS_KERNEL_OP_APUSYS_REGDUMP, MTK_APUSYS_KERNEL_OP_APUSYS_PWR_RCX, MTK_APUSYS_KERNEL_OP_NUM }; #endif