// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause /* * Copyright (c) 2022 MediaTek Inc. */ #include &spmi { mt6685_mfd: mt6685_mfd { compatible = "mediatek,mt6685"; reg = <0x9 SPMI_USID>; mt6685_clock_buffer: mt6685_clock_buffer { compatible = "mediatek,clock_buffer"; mediatek,xo-mode-num = <3>; mediatek,xo-buf-allow-control = <0 1 1 1 1>, <1 1 1>, <1 1 1>, <1 1>; mediatek,xo-buf-name = "XO_BBCK1", "XO_BBCK2", "XO_BBCK3", "XO_BBCK4", "XO_BBCK5", "XO_RFCK1A", "XO_RFCK1B", "XO_RFCK1C", "XO_RFCK2A", "XO_RFCK2B", "XO_RFCK2C", "XO_CONCK1", "XO_CONCK2"; mediatek,dcxo-de-sense-support; mediatek,dcxo-impedance-support; }; mt6685_rtc: mt6685_rtc { status = "disabled"; compatible = "mediatek,mt6685-rtc"; interrupts = <0x9 IRQ_TYPE_NONE>; interrupt-names = "rtc"; base = <0x580>; #address-cells = <1>; #size-cells = <1>; fg_init: fg_init { reg = <0 0x1>; }; fg_soc: fg_soc { reg = <1 0x1>; }; ext_32k: ext_32k { reg = <2 0x1>; bits = <6 1>; }; }; }; };