// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Copyright (C) 2022 MediaTek Inc.
 */
/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/pinctrl/mt6835-pinfunc.h>
#include "mediatek/mt6835_6377.dtsi"
#include "mediatek/cust_mt6835_camera.dtsi"

&mtk_leds {
	compatible = "mediatek,mtk-leds";

	backlight {
		led_mode = <6>;
	};
};

&pio {
	mtkfb_pins_lcm_led_en1: lcm_led_en1_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO150__FUNC_GPIO150>;
			slew-rate = <1>;
			output-high;
		};
	};

	mtkfb_pins_lcm_led_en0: lcm_led_en0_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO150__FUNC_GPIO150>;
			slew-rate = <1>;
			output-low;
		};
	};

	mtkfb_pins_lcm_rst_out1_gpio: lcm_rst_out1_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO86__FUNC_GPIO86>;
			slew-rate = <1>;
			output-high;
		};
	};

	mtkfb_pins_lcm_rst_out0_gpio: lcm_rst_out0_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO86__FUNC_GPIO86>;
			slew-rate = <1>;
			output-low;
		};
	};

	mtkfb_pins_lcm_dsi_te: lcm_dsi_te {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO85__FUNC_DSI_TE>;
		};
	};

	mtkfb_pins_lcm_cphy_out_gpio: lcm_cphy_out_gpio {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO133__FUNC_GPIO133>;
			slew-rate = <1>;
			output-high;
		};
	};
};

&mtkfb {
	pinctrl-names = "lcm_led_en1_gpio", "lcm_led_en0_gpio",
		"lcm_rst_out1_gpio", "lcm_rst_out0_gpio",
		"mode_te_te", "lcm_cphy_out_gpio";
	pinctrl-0 = <&mtkfb_pins_lcm_led_en1>;
	pinctrl-1 = <&mtkfb_pins_lcm_led_en0>;
	pinctrl-2 = <&mtkfb_pins_lcm_rst_out1_gpio>;
	pinctrl-3 = <&mtkfb_pins_lcm_rst_out0_gpio>;
	pinctrl-4 = <&mtkfb_pins_lcm_dsi_te>;
	pinctrl-5 = <&mtkfb_pins_lcm_cphy_out_gpio>;
	status = "okay";
};

&dispsys_config {
	pinctrl-names =
		"lcm_rst_out1_gpio", "lcm_rst_out0_gpio",
		"mode_te_te", "lcm_cphy_out_gpio";
	pinctrl-0 = <&mtkfb_pins_lcm_rst_out1_gpio>;
	pinctrl-1 = <&mtkfb_pins_lcm_rst_out0_gpio>;
	pinctrl-2 = <&mtkfb_pins_lcm_dsi_te>;
	pinctrl-3 = <&mtkfb_pins_lcm_cphy_out_gpio>;
	status = "okay";
};
&dsi0 {
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;
	switch-fps = <0>;
	switch-mode = "vfp";
	panel1@0 {
		compatible = "jdi,nt36672e,vdo,120hz,hfp";
		reg = <0>;
		pm-enable-gpios = <&pio 150 0>;
		reset-gpios = <&pio 86 0>;
		cphy-sel-gpios = <&pio 133 0>;
		gate-ic = <4831>;
		pinctrl-names = "default";
		port {
			panel_in1: endpoint {
				remote-endpoint = <&dsi_out>;
			};
		};
	};
	panel2@1 {
		compatible = "jdi,nt36672e,vdo,60hz";
		reg = <1>;
		pm-enable-gpios = <&pio 150 0>;
		reset-gpios = <&pio 86 0>;
		cphy-sel-gpios = <&pio 133 0>;
		gate-ic = <4831>;
		pinctrl-names = "default";
		port {
			panel_in2: endpoint {
				remote-endpoint = <&dsi_out2>;
			};
		};
	};
	panel3@2 {
		compatible = "jdi,nt36672e,cphy,vdo,no,dsc";
		reg = <2>;
		pm-enable-gpios = <&pio 150 0>;
		reset-gpios = <&pio 86 0>;
		cphy-sel-gpios = <&pio 133 0>;
		gate-ic = <4831>;
		pinctrl-names = "default";
		port {
			panel_in3: endpoint {
				remote-endpoint = <&dsi_out3>;
			};
		};
	};
	ports {
		port {
			dsi_out: endpoint {
				remote-endpoint = <&panel_in1>;
			};
			dsi_out2: endpoint2 {
				remote-endpoint = <&panel_in2>;
			};
			dsi_out3: endpoint3 {
				remote-endpoint = <&panel_in3>;
			};
		};
	};
};

/* usb typec mux start */
&pio {
	sel_up: sel_high {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO54__FUNC_GPIO54>;
			output-high;
		};
	};

	sel_down: sel_low  {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO54__FUNC_GPIO54>;
			output-low;
		};
	};

	sw_enable: sw_enable {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO30__FUNC_GPIO30>;
			output-high;
		};
	};

	sw_disable: sw_disable {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO30__FUNC_GPIO30>;
			output-high;
		};
	};

	ps_enable: ps_enable {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO141__FUNC_GPIO141>;
			output-low;
		};
	};

	ps_disable: ps_disable {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO141__FUNC_GPIO141>;
			output-low;
		};
	};
};

&ps5169 {
	pinctrl-names = "enable", "disable";
	pinctrl-0 = <&ps_enable>;
	pinctrl-1 = <&ps_disable>;
	status = "okay";
};

&fusb304 {
	pinctrl-names = "sel_up", "sel_down",
		"enable", "disable";
	pinctrl-0 = <&sel_up>;
	pinctrl-1 = <&sel_down>;
	pinctrl-2 = <&sw_enable>;
	pinctrl-3 = <&sw_disable>;
	status = "okay";
};

&mt6375_typec {
	port {
		tcpc_typec_usb: endpoint@0 {
			remote-endpoint = <&ssusb_mux>;
		};
	};
};

&typec_mux_switch {
	orientation-switch;
	mode-switch;
	accessory;
	port {
		ssusb_mux: endpoint@0 {
			remote-endpoint = <&tcpc_typec_usb>;
		};
	};
};
/* usb typec mux end*/

/* GPS GPIO standardization start */
&pio {
	gps_pins_default: gps_default {
	};
	gps_l1_lna_pins_ol: gps_l1_lna@0 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO123__FUNC_GPIO123>;
			output-low;
		};
	};
	gps_l1_lna_pins_dsp_ctrl: gps_l1_lna@1 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO123__FUNC_GPS_L1_ELNA_EN>;
		};
	};
	gps_l1_lna_pins_oh: gps_l1_lna@2 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO123__FUNC_GPIO123>;
			output-high;
		};
	};
	gps_l5_lna_pins_ol: gps_l5_lna@0 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO124__FUNC_GPIO124>;
			output-low;
		};
	};
	gps_l5_lna_pins_dsp_ctrl: gps_l5_lna@1 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO124__FUNC_GPS_L5_ELNA_EN>;
		};
	};
	gps_l5_lna_pins_oh: gps_l5_lna@2 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO124__FUNC_GPIO124>;
			output-high;
		};
	};
};

&gps {
	pinctrl-names = "default",
		"gps_l1_lna_disable",
		"gps_l1_lna_dsp_ctrl",
		"gps_l1_lna_enable",
		"gps_l5_lna_disable",
		"gps_l5_lna_dsp_ctrl",
		"gps_l5_lna_enable";
	pinctrl-0 = <&gps_pins_default>;
	pinctrl-1 = <&gps_l1_lna_pins_ol>;
	pinctrl-2 = <&gps_l1_lna_pins_dsp_ctrl>;
	pinctrl-3 = <&gps_l1_lna_pins_oh>;
	pinctrl-4 = <&gps_l5_lna_pins_ol>;
	pinctrl-5 = <&gps_l5_lna_pins_dsp_ctrl>;
	pinctrl-6 = <&gps_l5_lna_pins_oh>;
	status = "okay";
};
/* GPS GPIO standardization end */

&i2c6 {
	spk: speaker_amp@5c {
		compatible = "richtek,rt5512";
		#sound-dai-cells = <0>;
		reg = <0x5c>;
		status = "okay";
		sound-name-prefix = "Left";
	};
};

&sound {
	mediatek,spk-i2s = <3 0>;
	mediatek,speaker-codec {
		sound-dai = <&spk>;
	};
};

&scp {
	reg =	<0 0x1c400000 0 0x100000>, /* tcm */
			<0 0x1c724000 0 0x1000>, /* cfg */
			<0 0x1c721000 0 0x1000>, /* clk*/
			<0 0x1c730000 0 0x1000>, /* cfg core0 */
			<0 0x1c740000 0 0x1000>, /* cfg core1 */
			<0 0x1c752000 0 0x1000>, /* bus tracker */
			<0 0x1c760000 0 0x40000>, /* llc */
			<0 0x1c7a5000 0 0x4>, /* cfg_sec */
			<0 0x1c7fb000 0 0x100>, /* mbox0 base */
			<0 0x1c7fb100 0 0x4>, /* mbox0 set */
			<0 0x1c7fb10c 0 0x4>, /* mbox0 clr */
			<0 0x1c7a5020 0 0x4>, /* mbox0 init */
			<0 0x1c7fc000 0 0x100>, /* mbox1 base */
			<0 0x1c7fc100 0 0x4>, /* mbox1 set */
			<0 0x1c7fc10c 0 0x4>, /* mbox1 clr */
			<0 0x1c7a5024 0 0x4>, /* mbox1 init */
			<0 0x1c7fd000 0 0x100>, /* mbox2 base */
			<0 0x1c7fd100 0 0x4>, /* mbox2 set */
			<0 0x1c7fd10c 0 0x4>, /* mbox2 clr */
			<0 0x1c7a5028 0 0x4>, /* mbox2 init */
			<0 0x1c7fe000 0 0x100>, /* mbox3 base */
			<0 0x1c7fe100 0 0x4>, /* mbox3 set */
			<0 0x1c7fe10c 0 0x4>, /* mbox3 clr */
			<0 0x1c7a502c 0 0x4>, /* mbox3 init */
			<0 0x1c7ff000 0 0x100>, /* mbox4 base */
			<0 0x1c7ff100 0 0x4>, /* mbox4 set */
			<0 0x1c7ff10c 0 0x4>, /* mbox4 clr */
			<0 0x1c7a5030 0 0x4>; /* mbox4 init */
	scp-sramsize = <0x100000>;
	secure-dump-size = <0x500000>;
	memorydump = <0x100000>, /* l2tcm */
				     <0x03c000>, /* l1c */
				     <0x003c00>, /* regdump */
				     <0x000400>, /* trace buffer */
				     <0x300000>; /* dram */
};
/*End of this file, DO NOT ADD ANYTHING HERE*/

#include "mediatek/cust_mt6835_camera_6377_v4l2.dtsi"
#include "mediatek/cust_mt6835_touch_6377_1080x2400.dtsi"
#include "mediatek/cust_evb6835.dtsi"