// SPDX-License-Identifier: GPL-2.0
/* Copyright (c) 2020 MediaTek Inc. */

#include <dt-bindings/clock/mt6985-clk.h>

&i2c6 {
	#address-cells = <1>;
	#size-cells = <0>;
	lm3643:lm3643@63 {
		compatible = "mediatek,lm3643";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x63>;
		#cooling-cells = <2>;
		pinctrl-names = "default", "hwen-high", "hwen-low";
		pinctrl-0 = <&lm3643_pins_default>;
		pinctrl-1 = <&lm3643_pins_hwen_high>;
		pinctrl-2 = <&lm3643_pins_hwen_low>;
		status = "okay";
		flash@0{
			reg = <0>;
			type = <0>;
			ct = <0>;
			part = <0>;
			port {
				fl_core_0: endpoint {
					remote-endpoint = <&flashlight_0>;
				};
			};
		};
		flash@1{
			reg = <1>;
			type = <0>;
			ct = <1>;
			part = <0>;
			port {
				fl_core_1: endpoint {
					remote-endpoint = <&flashlight_1>;
				};
			};
		};
	};
};

&pio {
	lm3643_pins_default: default {
	};

	lm3643_pins_hwen_high: hwen-high {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO31__FUNC_GPIO31>;
			slew-rate = <1>;
			output-high;
		};
	};

	lm3643_pins_hwen_low: hwen-low {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO31__FUNC_GPIO31>;
			slew-rate = <1>;
			output-low;
		};
	};
};

&mtk_composite_v4l2_1 {
	#address-cells = <1>;
	#size-cells = <0>;
	port@0 {
		reg = <0>;
		flashlight_0: endpoint {
			remote-endpoint = <&fl_core_0>;
		};
	};
	port@1 {
		reg = <1>;
		flashlight_1: endpoint {
			remote-endpoint = <&fl_core_1>;
		};
	};
};

&seninf_top {
		seninf_csi_port_0: seninf_csi_port_0 {
			compatible = "mediatek,seninf";
			csi-port = "0";
			dphy_settle_delay_dt = <17>;
			nvmem-cells = <&csi_efuse0>;
			nvmem-cell-names = "rg_csi";

			port {
				seninf_csi_port_0_in: endpoint {
					remote-endpoint = <&sensor1_out>;
				};
			};
		};

		seninf_csi_port_1: seninf_csi_port_1 {
			compatible = "mediatek,seninf";
			csi-port = "1";
			hs_trail_parameter = <0x20>;
			nvmem-cells = <&csi_efuse1>;
			nvmem-cell-names = "rg_csi";

			port {
				seninf_csi_port_1_in: endpoint {
					remote-endpoint = <&sensor2_out>;
				};
			};
		};

		seninf_csi_port_2: seninf_csi_port_2 {
			compatible = "mediatek,seninf";
			csi-port = "2";
			hs_trail_parameter = <0x20>;
			nvmem-cells = <&csi_efuse2>;
			nvmem-cell-names = "rg_csi";

			port {
				seninf_csi_port_2_in: endpoint {
					remote-endpoint = <&sensor4_out>;
				};
			};
		};
		seninf_csi_port_3: seninf_csi_port_3 {
			compatible = "mediatek,seninf";
			csi-port = "3";
			nvmem-cells = <&csi_efuse3>;
			nvmem-cell-names = "rg_csi";

			port {
				seninf_csi_port_3_in: endpoint {
					remote-endpoint = <&sensor0_out>;
				};
			};
		};
};

/* CAMERA GPIO standardization */
&pio {
	camera_pins_cam0_mclk_off: camera_pins_cam0_mclk_off {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO198__FUNC_GPIO198>;
			drive-strength = <1>;
		};
	};
	camera_pins_cam0_mclk_2ma: camera_pins_cam0_mclk_2ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO198__FUNC_CMMCLK2>;
			drive-strength = <0>;
		};
	};
	camera_pins_cam0_mclk_4ma: camera_pins_cam0_mclk_4ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO198__FUNC_CMMCLK2>;
			drive-strength = <1>;
		};
	};
	camera_pins_cam0_mclk_6ma: camera_pins_cam0_mclk_6ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO198__FUNC_CMMCLK2>;
			drive-strength = <2>;
		};
	};
	camera_pins_cam0_mclk_8ma: camera_pins_cam0_mclk_8ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO198__FUNC_CMMCLK2>;
			drive-strength = <3>;
		};
	};
	camera_pins_cam0_rst_0: cam2@0 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO201__FUNC_GPIO201>;
			slew-rate = <1>;
			output-low;
		};
	};
	camera_pins_cam0_rst_1: cam2@1 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO201__FUNC_GPIO201>;
			slew-rate = <1>;
			output-high;
		};
	};
	camera_pins_cam0_avdd1_0: cam2@2 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO15__FUNC_GPIO15>;
			slew-rate = <1>;
			output-low;
		};
	};
	camera_pins_cam0_avdd1_1: cam2@3 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO15__FUNC_GPIO15>;
			slew-rate = <1>;
			output-high;
		};
	};
	camera_pins_cam1_mclk_off: camera_pins_cam1_mclk_off {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO209__FUNC_GPIO209>;
			drive-strength = <1>;
		};
	};
	camera_pins_cam1_mclk_2ma: camera_pins_cam1_mclk_2ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO209__FUNC_CMMCLK4>;
			drive-strength = <0>;
		};
	};
	camera_pins_cam1_mclk_4ma: camera_pins_cam1_mclk_4ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO209__FUNC_CMMCLK4>;
			drive-strength = <1>;
		};
	};
	camera_pins_cam1_mclk_6ma: camera_pins_cam1_mclk_6ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO209__FUNC_CMMCLK4>;
			drive-strength = <2>;
		};
	};
	camera_pins_cam1_mclk_8ma: camera_pins_cam1_mclk_8ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO209__FUNC_CMMCLK4>;
			drive-strength = <3>;
		};
	};
	camera_pins_cam1_rst_0: cam1@0 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO199__FUNC_GPIO199>;
			slew-rate = <1>;
			output-low;
		};
	};
	camera_pins_cam1_rst_1: cam1@1 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO199__FUNC_GPIO199>;
			slew-rate = <1>;
			output-high;
		};
	};
	camera_pins_cam2_mclk_off: camera_pins_cam2_mclk_off {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO208__FUNC_GPIO208>;
			drive-strength = <1>;
		};
	};
	camera_pins_cam2_mclk_2ma: camera_pins_cam2_mclk_2ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO208__FUNC_CMMCLK3>;
			drive-strength = <0>;
		};
	};
	camera_pins_cam2_mclk_4ma: camera_pins_cam2_mclk_4ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO208__FUNC_CMMCLK3>;
			drive-strength = <1>;
		};
	};
	camera_pins_cam2_mclk_6ma: camera_pins_cam2_mclk_6ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO208__FUNC_CMMCLK3>;
			drive-strength = <2>;
		};
	};
	camera_pins_cam2_mclk_8ma: camera_pins_cam2_mclk_8ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO208__FUNC_CMMCLK3>;
			drive-strength = <3>;
		};
	};
	camera_pins_cam2_rst_0: cam0@0 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO202__FUNC_GPIO202>;
			slew-rate = <1>;
			output-low;
		};
	};
	camera_pins_cam2_rst_1: cam0@1 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO202__FUNC_GPIO202>;
			slew-rate = <1>;
			output-high;
		};
	};
	camera_pins_cam2_mclk1_off: camera_pins_cam2_mclk1_off {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO196__FUNC_GPIO196>;
			drive-strength = <1>;
		};
	};
	camera_pins_cam2_mclk1_2ma: camera_pins_cam2_mclk1_2ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO196__FUNC_CMMCLK0>;
			drive-strength = <0>;
		};
	};
	camera_pins_cam2_mclk1_4ma: camera_pins_cam2_mclk1_4ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO196__FUNC_CMMCLK0>;
			drive-strength = <1>;
		};
	};
	camera_pins_cam2_mclk1_6ma: camera_pins_cam2_mclk1_6ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO196__FUNC_CMMCLK0>;
			drive-strength = <2>;
		};
	};
	camera_pins_cam2_mclk1_8ma: camera_pins_cam2_mclk1_8ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO196__FUNC_CMMCLK0>;
			drive-strength = <3>;
		};
	};
	camera_pins_cam2_rst1_0: cam0@2 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO14__FUNC_GPIO14>;
			slew-rate = <1>;
			output-low;
		};
	};
	camera_pins_cam2_rst1_1: cam0@3 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO14__FUNC_GPIO14>;
			slew-rate = <1>;
			output-high;
		};
	};
	camera_pins_cam2_ponv_0: cam0@4 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO15__FUNC_GPIO15>;
			slew-rate = <1>;
			output-low;
		};
	};
	camera_pins_cam2_ponv_1: cam0@5 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO15__FUNC_GPIO15>;
			slew-rate = <1>;
			output-high;
		};
	};
	camera_pins_cam2_scl_ap: cam0@6 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO183__FUNC_SCL4>;
		};
	};
	camera_pins_cam2_scl_scp: cam0@7 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO183__FUNC_SCP_SCL7>;
		};
	};
	camera_pins_cam2_sda_ap: cam0@8 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO184__FUNC_SDA4>;
		};
	};
	camera_pins_cam2_sda_scp: cam0@9 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO184__FUNC_SCP_SDA7>;
		};
	};
	camera_pins_cam2_avdd1_0: cam0@10 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO14__FUNC_GPIO14>;
			slew-rate = <1>;
			output-low;
		};
	};
	camera_pins_cam2_avdd1_1: cam0@11 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO14__FUNC_GPIO14>;
			slew-rate = <1>;
			output-high;
		};
	};
	camera_pins_cam0_eint: cam0@12 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO7__FUNC_GPIO7>;
			bias-pull-up;
			input-enable;
		};
	};
	camera_pins_cam4_mclk_off: camera_pins_cam4_mclk_off {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO197__FUNC_GPIO197>;
			drive-strength = <1>;
		};
	};
	camera_pins_cam4_mclk_2ma: camera_pins_cam4_mclk_2ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO197__FUNC_CMMCLK1>;
			drive-strength = <0>;
		};
	};
	camera_pins_cam4_mclk_4ma: camera_pins_cam4_mclk_4ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO197__FUNC_CMMCLK1>;
			drive-strength = <1>;
		};
	};
	camera_pins_cam4_mclk_6ma: camera_pins_cam4_mclk_6ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO197__FUNC_CMMCLK1>;
			drive-strength = <2>;
		};
	};
	camera_pins_cam4_mclk_8ma: camera_pins_cam4_mclk_8ma {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO197__FUNC_CMMCLK1>;
			drive-strength = <3>;
		};
	};
	camera_pins_cam4_rst_0: cam4@0 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO200__FUNC_GPIO200>;
			slew-rate = <1>;
			output-low;
		};
	};
	camera_pins_cam4_rst_1: cam4@1 {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO200__FUNC_GPIO200>;
			slew-rate = <1>;
			output-high;
		};
	};
	camera_pins_default: camdefault {
	};
};
/* CAMERA GPIO end */

&mtk_composite_v4l2_2 {
	#address-cells = <1>;
	#size-cells = <0>;
	port@0 {
		reg = <0>;
		main_af_endpoint: endpoint {
			remote-endpoint = <&main_af>;
		};
	};
	port@1 {
		reg = <1>;
		main_af_cam1_endpoint: endpoint {
			remote-endpoint = <&main_af_cam1>;
		};
	};
	port@2 {
		reg = <2>;
		main_af_cam2_endpoint: endpoint {
			remote-endpoint = <&main_af_cam2>;
		};
	};
	port@3 {
		reg = <3>;
		main_af_cam3_endpoint: endpoint {
			remote-endpoint = <&main_af_cam3>;
		};
	};
	port@4 {
		reg = <4>;
		main_af_cam4_endpoint: endpoint {
			remote-endpoint = <&main_af_cam4>;
		};
	};
	port@5 {
		reg = <5>;
		main_af_cam5_endpoint: endpoint {
			remote-endpoint = <&main_af_cam5>;
		};
	};
	port@6 {
		reg = <6>;
		main_af_cam6_endpoint: endpoint {
			remote-endpoint = <&main_af_cam6>;
		};
	};
	port@7 {
		reg = <7>;
		main_af_cam7_endpoint: endpoint {
			remote-endpoint = <&main_af_cam7>;
		};
	};
};

&i2c2 {
	status = "okay";
	clock-frequency = <400000>;
	#address-cells = <1>;
	#size-cells = <0>;

	sensor1: sensor1@10 {
		compatible = "mediatek,imgsensor";
		sensor-names = "s5k3p9sp_mipi_raw";
		reg = <0x10>;
		#thermal-sensor-cells = <0>;

		pinctrl-names = "mclk_off",
				"mclk_2mA",
				"mclk_4mA",
				"mclk_6mA",
				"mclk_8mA",
				"rst_low",
				"rst_high";
		pinctrl-0 = <&camera_pins_cam1_mclk_off>;
		pinctrl-1 = <&camera_pins_cam1_mclk_2ma>;
		pinctrl-2 = <&camera_pins_cam1_mclk_4ma>;
		pinctrl-3 = <&camera_pins_cam1_mclk_6ma>;
		pinctrl-4 = <&camera_pins_cam1_mclk_8ma>;
		pinctrl-5 = <&camera_pins_cam1_rst_0>;
		pinctrl-6 = <&camera_pins_cam1_rst_1>;

		avdd-supply = <&rt5133_ldo6>;
		dvdd-supply = <&rt5133_ldo7>;
		dovdd-supply = <&rt5133_ldo1>;
		afvdd-supply = <&rt5133_ldo2>;

		clocks = <&topckgen_clk CLK_TOP_UNIVPLL2_192M_D32>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_192M_D16>,
			<&topckgen_clk CLK_TOP_F26M_CK_D2>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_192M_D10>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_192M_D8>,
			<&topckgen_clk CLK_TOP_TCK_26M_MX9>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_D6_D8>,
			<&topckgen_clk CLK_TOP_CAMTG5_SEL>;
		clock-names = "6", "12", "13", "19.2", "24", "26", "52", "mclk";

		status = "okay";

		port {
			sensor1_out: endpoint {
				remote-endpoint = <&seninf_csi_port_0_in>;
			};
		};
	};

	mtk_camera_eeprom1:camera_eeprom1@50 {
		compatible = "mediatek,camera_eeprom";
		reg = <0x50>;
		status = "okay";
	};
};

&i2c4 {
	status = "okay";
	clock-frequency = <400000>;
	#address-cells = <1>;
	#size-cells = <0>;

	camera-af-main-three@e {
		compatible = "mediatek,gt9772b";
		reg = <0x0e>;
		vin-supply = <&rt5133_gpio1>;
		port {
			main_af_cam3: endpoint {
				remote-endpoint = <&main_af_cam3_endpoint>;
			};
		};
	};

	camera-af-main-three@2b {
		compatible = "mediatek,ak7377a";
		reg = <0x2b>;
		vin-supply = <&rt5133_gpio1>;
		port {
			main_af_cam5: endpoint {
				remote-endpoint = <&main_af_cam5_endpoint>;
			};
		};
	};

	sensor2: sensor2@10 {
		compatible = "mediatek,imgsensor";
		sensor-names = "imx709_mipi_raw",
				"imx766_mipi_raw",
				"imx866_mipi_raw";
		reg = <0x10>;
		#thermal-sensor-cells = <0>;

		/* reindex sensor if match sensor list */
		reindex-match = "imx766_mipi_raw",
				"imx709_mipi_raw",
				"imx866_mipi_raw";
		reindex-to = <0>;

		pinctrl-names = "mclk_off",
				"mclk_2mA",
				"mclk_4mA",
				"mclk_6mA",
				"mclk_8mA",
				"rst_low",
				"rst_high",
				"mclk1_off",
				"mclk1_2mA",
				"mclk1_4mA",
				"mclk1_6mA",
				"mclk1_8mA",
				"rst1_low",
				"rst1_high",
				"ponv_low",
				"ponv_high",
				"scl_ap",
				"scl_scp",
				"sda_ap",
				"sda_scp",
				"avdd1_off",
				"avdd1_on",
				"eint";
		pinctrl-0 = <&camera_pins_cam2_mclk_off>;
		pinctrl-1 = <&camera_pins_cam2_mclk_2ma>;
		pinctrl-2 = <&camera_pins_cam2_mclk_4ma>;
		pinctrl-3 = <&camera_pins_cam2_mclk_6ma>;
		pinctrl-4 = <&camera_pins_cam2_mclk_8ma>;
		pinctrl-5 = <&camera_pins_cam2_rst_0>;
		pinctrl-6 = <&camera_pins_cam2_rst_1>;
		pinctrl-7 = <&camera_pins_cam2_mclk1_off>;
		pinctrl-8 = <&camera_pins_cam2_mclk1_2ma>;
		pinctrl-9 = <&camera_pins_cam2_mclk1_4ma>;
		pinctrl-10 = <&camera_pins_cam2_mclk1_6ma>;
		pinctrl-11 = <&camera_pins_cam2_mclk1_8ma>;
		pinctrl-12 = <&camera_pins_cam2_rst1_0>;
		pinctrl-13 = <&camera_pins_cam2_rst1_1>;
		pinctrl-14 = <&camera_pins_cam2_ponv_0>;
		pinctrl-15 = <&camera_pins_cam2_ponv_1>;
		pinctrl-16 = <&camera_pins_cam2_scl_ap>;
		pinctrl-17 = <&camera_pins_cam2_scl_scp>;
		pinctrl-18 = <&camera_pins_cam2_sda_ap>;
		pinctrl-19 = <&camera_pins_cam2_sda_scp>;
		pinctrl-20 = <&camera_pins_cam2_avdd1_0>;
		pinctrl-21 = <&camera_pins_cam2_avdd1_1>;
		pinctrl-22 = <&camera_pins_cam0_eint>;

		avdd2-supply = <&rt5133_gpio2>;
		dvdd-supply = <&rt5133_ldo7>;
		dovdd-supply = <&rt5133_ldo1>;
		afvdd1-supply = <&rt5133_gpio1>;
		dvdd1-supply = <&rt5133_ldo8>;

		clocks = <&topckgen_clk CLK_TOP_UNIVPLL2_192M_D32>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_192M_D16>,
			<&topckgen_clk CLK_TOP_F26M_CK_D2>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_192M_D10>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_192M_D8>,
			<&topckgen_clk CLK_TOP_TCK_26M_MX9>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_D6_D8>,
			<&topckgen_clk CLK_TOP_CAMTG4_SEL>,
			<&topckgen_clk CLK_TOP_UNIVPLL_192M_D32>,
			<&topckgen_clk CLK_TOP_UNIVPLL_192M_D16>,
			<&topckgen_clk CLK_TOP_F26M_CK_D2>,
			<&topckgen_clk CLK_TOP_UNIVPLL_192M_D10>,
			<&topckgen_clk CLK_TOP_UNIVPLL_192M_D8>,
			<&topckgen_clk CLK_TOP_TCK_26M_MX9>,
			<&topckgen_clk CLK_TOP_OSC_D20>,
			<&topckgen_clk CLK_TOP_UNIVPLL_D6_D8>,
			<&vlp_cksys_clk CLK_VLP_CK_CAMTG_VLP_SEL>;
		clock-names = "6", "12", "13", "19.2", "24", "26", "52", "mclk",
			      "clk1_6", "clk1_12", "clk1_13", "clk1_19.2",
			      "clk1_24", "clk1_26", "clk1_26_ulposc", "clk1_52", "clk1_mclk1";

		status = "okay";

		port {
			sensor2_out: endpoint {
				remote-endpoint = <&seninf_csi_port_1_in>;
			};
		};
	};

	mtk_camera_eeprom2:camera_eeprom2@50 {
		compatible = "mediatek,camera_eeprom";
		reg = <0x50>;
		status = "okay";
	};
};

&i2c8 {
	status = "okay";
	clock-frequency = <400000>;
	#address-cells = <1>;
	#size-cells = <0>;

	camera-af-main@72 {
		compatible = "mediatek,lc898229";
		reg = <0x72>;
		vin-supply = <&rt5133_ldo3>;
		port {
			main_af: endpoint {
				remote-endpoint = <&main_af_endpoint>;
			};
		};
	};

	camera-af-main@c {
		compatible = "mediatek,gt9764";
		reg = <0x0c>;
		vin-supply = <&rt5133_ldo3>;
		port {
			main_af_cam1: endpoint {
				remote-endpoint = <&main_af_cam1_endpoint>;
			};
		};
	};

	camera-af-main@f {
		compatible = "mediatek,dw9800w";
		reg = <0x0f>;
		vin-supply = <&rt5133_ldo3>;
		port {
			main_af_cam4: endpoint {
				remote-endpoint = <&main_af_cam4_endpoint>;
			};
		};
	};

	camera-af-main@a {
		compatible = "mediatek,ak7375c";
		reg = <0x0a>;
		vin-supply = <&rt5133_ldo3>;
		port {
			main_af_cam6: endpoint {
				remote-endpoint = <&main_af_cam6_endpoint>;
			};
		};
	};

	sensor0: sensor0@1a {
		compatible = "mediatek,imgsensor";
		sensor-names = "ov48b_mipi_raw",
				"imx766dual_mipi_raw",
				"imx519_mipi_raw",
				"imx499_mipi_raw";
		reg = <0x1a>;
		#thermal-sensor-cells = <0>;

		/* reindex sensor if match sensor list */
		reindex-match = "imx766dual_mipi_raw";
		reindex-to = <2>;

		pinctrl-names = "mclk_off",
				"mclk_2mA",
				"mclk_4mA",
				"mclk_6mA",
				"mclk_8mA",
				"rst_low",
				"rst_high",
				"avdd1_off",
				"avdd1_on";
		pinctrl-0 = <&camera_pins_cam0_mclk_off>;
		pinctrl-1 = <&camera_pins_cam0_mclk_2ma>;
		pinctrl-2 = <&camera_pins_cam0_mclk_4ma>;
		pinctrl-3 = <&camera_pins_cam0_mclk_6ma>;
		pinctrl-4 = <&camera_pins_cam0_mclk_8ma>;
		pinctrl-5 = <&camera_pins_cam0_rst_0>;
		pinctrl-6 = <&camera_pins_cam0_rst_1>;
		pinctrl-7 = <&camera_pins_cam0_avdd1_0>;
		pinctrl-8 = <&camera_pins_cam0_avdd1_1>;

		avdd-supply = <&rt5133_ldo4>;
		dvdd-supply = <&rt5133_ldo8>;
		dovdd-supply = <&rt5133_ldo1>;
		afvdd-supply = <&rt5133_ldo3>;

		clocks = <&topckgen_clk CLK_TOP_UNIVPLL2_192M_D32>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_192M_D16>,
			<&topckgen_clk CLK_TOP_F26M_CK_D2>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_192M_D10>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_192M_D8>,
			<&topckgen_clk CLK_TOP_TCK_26M_MX9>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_D6_D8>,
			<&topckgen_clk CLK_TOP_CAMTG3_SEL>;
		clock-names = "6", "12", "13", "19.2", "24", "26", "52", "mclk";

		status = "okay";

		port {
			sensor0_out: endpoint {
				remote-endpoint = <&seninf_csi_port_3_in>;
			};
		};
	};

	mtk_camera_eeprom0:camera_eeprom0@50 {
		compatible = "mediatek,camera_eeprom";
		reg = <0x50>;
		status = "okay";
	};
};

&i2c9 {
	status = "okay";
	clock-frequency = <400000>;
	#address-cells = <1>;
	#size-cells = <0>;

	camera-af-main-two@d {
		compatible = "mediatek,gt9772a";
		reg = <0x0d>;
		vin-supply = <&rt5133_ldo2>;
		port {
			main_af_cam2: endpoint {
				remote-endpoint = <&main_af_cam2_endpoint>;
			};
		};
	};

	camera-af-main-two@2a {
		compatible = "mediatek,bu64253gwz";
		reg = <0x2a>;
		vin-supply = <&rt5133_ldo2>;
		port {
			main_af_cam7: endpoint {
				remote-endpoint = <&main_af_cam7_endpoint>;
			};
		};
	};

	sensor4: sensor4@10 {
		compatible = "mediatek,imgsensor";
		sensor-names = "s5k3m5sx_mipi_raw";
		reg = <0x10>;
		#thermal-sensor-cells = <0>;
		pinctrl-names = "mclk_off",
				"mclk_2mA",
				"mclk_4mA",
				"mclk_6mA",
				"mclk_8mA",
				"rst_low",
				"rst_high";
		pinctrl-0 = <&camera_pins_cam4_mclk_off>;
		pinctrl-1 = <&camera_pins_cam4_mclk_2ma>;
		pinctrl-2 = <&camera_pins_cam4_mclk_4ma>;
		pinctrl-3 = <&camera_pins_cam4_mclk_6ma>;
		pinctrl-4 = <&camera_pins_cam4_mclk_8ma>;
		pinctrl-5 = <&camera_pins_cam4_rst_0>;
		pinctrl-6 = <&camera_pins_cam4_rst_1>;

		avdd-supply = <&rt5133_ldo6>;
		dvdd-supply = <&rt5133_gpio3>;
		dovdd-supply = <&rt5133_ldo1>;
		afvdd-supply = <&rt5133_ldo2>;

		clocks = <&topckgen_clk CLK_TOP_UNIVPLL2_192M_D32>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_192M_D16>,
			<&topckgen_clk CLK_TOP_F26M_CK_D2>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_192M_D10>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_192M_D8>,
			<&topckgen_clk CLK_TOP_TCK_26M_MX9>,
			<&topckgen_clk CLK_TOP_UNIVPLL2_D6_D8>,
			<&topckgen_clk CLK_TOP_CAMTG2_SEL>;
		clock-names = "6", "12", "13", "19.2", "24", "26", "52", "mclk";

		status = "okay";

		port {
			sensor4_out: endpoint {
				remote-endpoint = <&seninf_csi_port_2_in>;
			};
		};
	};

	mtk_camera_eeprom4:camera_eeprom4@50 {
		compatible = "mediatek,camera_eeprom";
		reg = <0x50>;
		status = "okay";
	};
};

&thermal_zones {
	camera0: camera0 {
		polling-delay = <0>; /* milliseconds */
		polling-delay-passive = <0>; /* milliseconds */
		thermal-sensors = <&sensor0>;
	};
	camera1: camera1 {
		polling-delay = <0>; /* milliseconds */
		polling-delay-passive = <0>; /* milliseconds */
		thermal-sensors = <&sensor1>;
	};
	camera2: camera2 {
		polling-delay = <0>; /* milliseconds */
		polling-delay-passive = <0>; /* milliseconds */
		thermal-sensors = <&sensor2>;
	};
	camera4: camera4 {
		polling-delay = <0>; /* milliseconds */
		polling-delay-passive = <0>; /* milliseconds */
		thermal-sensors = <&sensor4>;
	};
};