/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2021 MediaTek Inc.
 */

#ifndef __MDP_BASE_H__
#define __MDP_BASE_H__

#define MDP_HW_CHECK

static const phys_addr_t mdp_base[ENGBASE_COUNT] = {
	[ENGBASE_MMSYS_CONFIG] = 0x1f000000,
	[ENGBASE_MMSYS_MUTEX] = 0x1f001000,
	[ENGBASE_MDP_RDMA0] = 0x1f003000,
	[ENGBASE_MDP_RDMA1] = 0x1f004000,
	[ENGBASE_MDP_RDMA2] = 0x1f011000,
	[ENGBASE_MDP_RDMA3] = 0x1f012000,
	[ENGBASE_MDP_HDR0] = 0x1f005000,
	[ENGBASE_MDP_HDR1] = 0x1f006000,
	[ENGBASE_MDP_AAL0] = 0x1f007000,
	[ENGBASE_MDP_AAL1] = 0x1f008000,
	[ENGBASE_MDP_RSZ0] = 0x1f009000,
	[ENGBASE_MDP_RSZ1] = 0x1f00a000,
	[ENGBASE_MDP_BIRSZ0] = 0x1f018000,
	[ENGBASE_MDP_BIRSZ1] = 0x1f019000,
	[ENGBASE_MDP_TDSHP0] = 0x1f00b000,
	[ENGBASE_MDP_TDSHP1] = 0x1f00c000,
	[ENGBASE_MDP_COLOR0] = 0x1f00d000,
	[ENGBASE_MDP_COLOR1] = 0x1f00e000,
	[ENGBASE_MDP_WROT0] = 0x1f00f000,
	[ENGBASE_MDP_WROT1] = 0x1f010000,
};

#endif