// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2022 MediaTek Inc.
 */
/********************************************
 * MT6886 MSDC DTSI File
 ********************************************/
#include <dt-bindings/gpio/gpio.h>

&mmc1 {
	host-index = <1>;
	status = "okay";
	pinctrl-names = "default", "state_uhs";
	pinctrl-0 = <&mmc1_pins_default>;
	pinctrl-1 = <&mmc1_pins_uhs>;
	bus-width = <4>;
	max-frequency = <200000000>;
	ocr-voltage = <0x00070000>;
	cap-sd-highspeed;
	sd-uhs-sdr12;
	sd-uhs-sdr25;
	sd-uhs-sdr50;
	sd-uhs-sdr104;
	sd-uhs-ddr50;
	cd-debounce-delay-ms = <0>;
	cd-gpios = <&pio 0 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&mt6368_vmch_eint_high>;
	vqmmc-supply = <&mt6368_vmc>;
	no-mmc;
	no-sdio;
	dvfsrc-vcore-supply = <&dvfsrc_vcore>;
	req-vcore = <575000>;
};

&pio {
	mmc1_pins_default: mmc1default {
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO129__FUNC_MSDC1_DAT0>,
				<PINMUX_GPIO130__FUNC_MSDC1_DAT1>,
				<PINMUX_GPIO131__FUNC_MSDC1_DAT2>,
				<PINMUX_GPIO132__FUNC_MSDC1_DAT3>,
				<PINMUX_GPIO128__FUNC_MSDC1_CMD>;
			input-enable;
			drive-strength = <3>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};

		pins_clk {
			pinmux = <PINMUX_GPIO127__FUNC_MSDC1_CLK>;
			drive-strength = <3>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};
	};
	mmc1_pins_uhs: mmc1@0{
		pins_cmd_dat {
			pinmux = <PINMUX_GPIO129__FUNC_MSDC1_DAT0>,
				<PINMUX_GPIO130__FUNC_MSDC1_DAT1>,
				<PINMUX_GPIO131__FUNC_MSDC1_DAT2>,
				<PINMUX_GPIO132__FUNC_MSDC1_DAT3>,
				<PINMUX_GPIO128__FUNC_MSDC1_CMD>;
			input-enable;
			drive-strength = <3>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};

		pins_clk {
			pinmux = <PINMUX_GPIO127__FUNC_MSDC1_CLK>;
			drive-strength = <3>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};
	};
};