/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2020 MediaTek Inc.
 */


#ifndef __DT_BINDINGS_INTERCONNECT_MTK_MT6873_EMI_H
#define __DT_BINDINGS_INTERCONNECT_MTK_MT6873_EMI_H

#define MT6873_SLAVE_DDR_EMI		0
#define MT6873_MASTER_MCUSYS		1
#define MT6873_MASTER_MCU_0		2
#define MT6873_MASTER_MCU_1		3
#define MT6873_MASTER_MCU_2		4
#define MT6873_MASTER_MCU_3		5
#define MT6873_MASTER_MCU_4		6
#define MT6873_MASTER_GPUSYS		7
#define MT6873_MASTER_MMSYS		8
#define MT6873_MASTER_MM_VPU		9
#define MT6873_MASTER_MM_DISP		10
#define MT6873_MASTER_MM_VDEC		11
#define MT6873_MASTER_MM_VENC		12
#define MT6873_MASTER_MM_CAM		13
#define MT6873_MASTER_MM_IMG		14
#define MT6873_MASTER_MM_MDP		15
#define MT6873_MASTER_VPUSYS		16
#define MT6873_MASTER_VPU_0		17
#define MT6873_MASTER_VPU_1		18
#define MT6873_MASTER_MDLASYS		19
#define MT6873_MASTER_MDLA_0		20
#define MT6873_MASTER_UFS		21
#define MT6873_MASTER_PCIE		22
#define MT6873_MASTER_USB		23
#define MT6873_MASTER_DBGIF		24
#define MT6873_SLAVE_HRT_DDR_EMI	25
#define MT6873_MASTER_HRT_MMSYS		26
#define MT6873_MASTER_HRT_MM_DISP	27
#define MT6873_MASTER_HRT_MM_VDEC	28
#define MT6873_MASTER_HRT_MM_VENC	29
#define MT6873_MASTER_HRT_MM_CAM	30
#define MT6873_MASTER_HRT_MM_IMG	31
#define MT6873_MASTER_HRT_MM_MDP	32
#define MT6873_MASTER_HRT_DBGIF		33
#define MT6873_MASTER_WIFI		34
#define MT6873_MASTER_BT		35
#define MT6873_MASTER_NETSYS		36
#endif