// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2016 MediaTek Inc.
 * Author: PC Chen <pc.chen@mediatek.com>
 *         Tiffany Lin <tiffany.lin@mediatek.com>
 */

#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/slab.h>

#include "vdec_drv_if.h"
#include "mtk_vcodec_dec.h"
#include "vdec_drv_base.h"
#include "mtk_vcodec_dec_pm.h"
#include "mtk_vcodec_dec_pm_plat.h"

#if IS_ENABLED(CONFIG_VIDEO_MEDIATEK_VCU)
#include "mtk_vcu.h"
const struct vdec_common_if *get_dec_vcu_if(void);
#endif

#if IS_ENABLED(CONFIG_MTK_TINYSYS_VCP_SUPPORT)
const struct vdec_common_if *get_dec_vcp_if(void);
#endif


static const struct vdec_common_if *get_data_path_ptr(void)
{
#if IS_ENABLED(CONFIG_VIDEO_MEDIATEK_VCU)
	if (VCU_FPTR(vcu_get_plat_device)) {
#if IS_ENABLED(CONFIG_MTK_TINYSYS_VCP_SUPPORT)
		if (mtk_vcodec_is_vcp(MTK_INST_DECODER))
			return get_dec_vcp_if();
#endif
		return get_dec_vcu_if();
	}
#endif
#if IS_ENABLED(CONFIG_MTK_TINYSYS_VCP_SUPPORT)
	return get_dec_vcp_if();
#else
	return NULL;
#endif
}

int vdec_if_init(struct mtk_vcodec_ctx *ctx, unsigned int fourcc)
{
	int ret = 0;
	mtk_dec_init_ctx_pm(ctx);

	switch (fourcc) {
	case V4L2_PIX_FMT_H264:
	case V4L2_PIX_FMT_H265:
	case V4L2_PIX_FMT_HEIF:
	case V4L2_PIX_FMT_MPEG1:
	case V4L2_PIX_FMT_MPEG2:
	case V4L2_PIX_FMT_MPEG4:
	case V4L2_PIX_FMT_H263:
	case V4L2_PIX_FMT_VP8:
	case V4L2_PIX_FMT_VP9:
	case V4L2_PIX_FMT_WMV1:
	case V4L2_PIX_FMT_WMV2:
	case V4L2_PIX_FMT_WMV3:
	case V4L2_PIX_FMT_WVC1:
	case V4L2_PIX_FMT_WMVA:
	case V4L2_PIX_FMT_RV30:
	case V4L2_PIX_FMT_RV40:
	case V4L2_PIX_FMT_AV1:
		ctx->dec_if = get_data_path_ptr();
		break;
	default:
		return -EINVAL;
	}

	if (ctx->dec_if == NULL)
		return -EINVAL;

	ret = ctx->dec_if->init(ctx, &ctx->drv_handle);

	return ret;
}

int vdec_if_decode(struct mtk_vcodec_ctx *ctx, struct mtk_vcodec_mem *bs,
				   struct vdec_fb *fb, unsigned int *src_chg)
{
	int ret = 0;
	unsigned int i = 0;

	if (bs && !ctx->dec_params.svp_mode) {
		if ((bs->dma_addr & 63UL) != 0UL) {
			mtk_v4l2_err("bs dma_addr should 64 byte align");
			return -EINVAL;
		}
	}

	if (fb && !ctx->dec_params.svp_mode) {
		for (i = 0; i < fb->num_planes; i++) {
			if ((fb->fb_base[i].dma_addr & 511UL) != 0UL) {
				mtk_v4l2_err("fb addr should 512 byte align");
				return -EINVAL;
			}
		}
	}

	if (ctx->drv_handle == 0)
		return -EIO;

	//vcodec_trace_begin
	ret = ctx->dec_if->decode(ctx->drv_handle, bs, fb, src_chg);
	//vcodec_trace_end();

	return ret;
}

int vdec_if_get_param(struct mtk_vcodec_ctx *ctx, enum vdec_get_param_type type,
					  void *out)
{
	struct vdec_inst *inst = NULL;
	int ret = 0;
	bool drv_handle_exist = true;
	bool is_query_cap = (type == GET_PARAM_VDEC_CAP_SUPPORTED_FORMATS ||
			     type == GET_PARAM_VDEC_CAP_FRAME_SIZES);

	if (!ctx->drv_handle && is_query_cap) {
		inst = kzalloc(sizeof(struct vdec_inst), GFP_KERNEL);
		if (inst == NULL)
			return -ENOMEM;
		inst->ctx = ctx;
		inst->vcu.ctx = ctx;
		ctx->drv_handle = (unsigned long)(inst);
		ctx->dec_if = get_data_path_ptr();
		mtk_vcodec_add_ctx_list(ctx);
		drv_handle_exist = false;
	}

	if (ctx->dec_if && ctx->drv_handle)
		ret = ctx->dec_if->get_param(ctx->drv_handle, type, out);
	else
		ret = -EINVAL;

	if (!drv_handle_exist) {
		inst->vcu.abort = true;
		mtk_vcodec_del_ctx_list(ctx);
		if (ctx->drv_handle == (unsigned long)inst)
			ctx->drv_handle = 0;
		kfree(inst);
	}

	return ret;
}

int vdec_if_set_param(struct mtk_vcodec_ctx *ctx, enum vdec_set_param_type type,
					  void *in)
{
	struct vdec_inst *inst = NULL;
	int ret = 0;
	bool drv_handle_exist = true;
	bool is_set_prop = (type == SET_PARAM_VDEC_PROPERTY ||
			    type == SET_PARAM_VDEC_VCP_LOG_INFO ||
			    type == SET_PARAM_VDEC_VCU_VPUD_LOG);

	if (!ctx->drv_handle && is_set_prop) {
		inst = kzalloc(sizeof(struct vdec_inst), GFP_KERNEL);
		if (inst == NULL)
			return -ENOMEM;
		inst->ctx = ctx;
		inst->vcu.ctx = ctx;
		ctx->drv_handle = (unsigned long)(inst);
		ctx->dec_if = get_data_path_ptr();
		mtk_vcodec_add_ctx_list(ctx);
		drv_handle_exist = false;
	}

	if (ctx->dec_if && ctx->drv_handle)
		ret = ctx->dec_if->set_param(ctx->drv_handle, type, in);
	else
		ret = -EINVAL;

	if (!drv_handle_exist) {
		inst->vcu.abort = true;
		mtk_vcodec_del_ctx_list(ctx);
		if (ctx->drv_handle == (unsigned long)inst)
			ctx->drv_handle = 0;
		kfree(inst);
	}

	return ret;
}

void vdec_if_deinit(struct mtk_vcodec_ctx *ctx)
{
	if (ctx->drv_handle == 0)
		return;

	ctx->dec_if->deinit(ctx->drv_handle);

	ctx->drv_handle = 0;
}

int vdec_if_flush(struct mtk_vcodec_ctx *ctx, struct mtk_vcodec_mem *bs,
				   struct vdec_fb *fb, enum vdec_flush_type type)
{
	if (ctx->drv_handle == 0)
		return -EIO;

	if (ctx->dec_if->flush == NULL) {
		unsigned int src_chg;

		return vdec_if_decode(ctx, bs, fb, &src_chg);
	}

	return ctx->dec_if->flush(ctx->drv_handle, fb, type);
}

void vdec_decode_prepare(void *ctx_prepare,
	unsigned int hw_id)
{
	struct mtk_vcodec_ctx *ctx = (struct mtk_vcodec_ctx *)ctx_prepare;
	int ret;

	if (ctx == NULL || hw_id >= MTK_VDEC_HW_NUM)
		return;

	mutex_lock(&ctx->hw_status);
	ret = mtk_vdec_lock(ctx, hw_id);
	mtk_vcodec_set_curr_ctx(ctx->dev, ctx, hw_id);

	mutex_lock(&ctx->dev->dec_always_on_mutex);
	if (ctx->dev->dec_always_on[hw_id] == 0)
		mtk_vcodec_dec_clock_on(&ctx->dev->pm, hw_id);
#if IS_ENABLED(CONFIG_MTK_TINYSYS_VCP_SUPPORT)
	if (ctx->power_type[hw_id] == VDEC_POWER_NORMAL) {
		if (ctx->dec_params.operating_rate >= MTK_VDEC_ALWAYS_ON_OP_RATE)
			ctx->power_type[hw_id] = VDEC_POWER_ALWAYS_OP;
		if (ctx->power_type[hw_id] >= VDEC_POWER_ALWAYS) {
			ctx->dev->dec_always_on[hw_id]++;
			mtk_v4l2_debug(0, "[%d] hw_id %d power type %d always on %d", ctx->id,
				hw_id, ctx->power_type[hw_id], ctx->dev->dec_always_on[hw_id]);
		}
	}
#endif
	mutex_unlock(&ctx->dev->dec_always_on_mutex);

	if (ret == 0 && !mtk_vcodec_is_vcp(MTK_INST_DECODER) &&
	    ctx->power_type[hw_id] != VDEC_POWER_RELEASE)
		enable_irq(ctx->dev->dec_irq[hw_id]);
	mtk_vdec_dvfs_begin_frame(ctx, hw_id);
	mtk_vdec_pmqos_begin_frame(ctx);
	if (hw_id == MTK_VDEC_CORE)
		vcodec_trace_count("VDEC_HW_CORE", 1);
	else
		vcodec_trace_count("VDEC_HW_LAT", 1);
	mutex_unlock(&ctx->hw_status);
}

void vdec_decode_unprepare(void *ctx_unprepare,
	unsigned int hw_id)
{
	struct mtk_vcodec_ctx *ctx = (struct mtk_vcodec_ctx *)ctx_unprepare;

	if (ctx == NULL || hw_id >= MTK_VDEC_HW_NUM)
		return;

	mutex_lock(&ctx->hw_status);
	if (ctx->dev->vdec_reg) // per frame mmdvfs in AP
		mtk_vdec_dvfs_end_frame(ctx, hw_id);
	mtk_vdec_pmqos_end_frame(ctx);
	if (ctx->dev->dec_sem[hw_id].count != 0) {
		mtk_v4l2_debug(0, "HW not prepared, dec_sem[%d].count = %d",
			hw_id, ctx->dev->dec_sem[hw_id].count);
		mutex_unlock(&ctx->hw_status);
		return;
	}
	if (hw_id == MTK_VDEC_CORE)
		vcodec_trace_count("VDEC_HW_CORE", 0);
	else
		vcodec_trace_count("VDEC_HW_LAT", 0);

	if (!mtk_vcodec_is_vcp(MTK_INST_DECODER) &&
	    ctx->power_type[hw_id] != VDEC_POWER_RELEASE)
		disable_irq(ctx->dev->dec_irq[hw_id]);

	mutex_lock(&ctx->dev->dec_always_on_mutex);
	if (ctx->power_type[hw_id] == VDEC_POWER_RELEASE) {
		mtk_v4l2_debug(0, "[%d] hw_id %d power type %d off always on %d", ctx->id,
			hw_id, ctx->power_type[hw_id], ctx->dev->dec_always_on[hw_id]);
		ctx->dev->dec_always_on[hw_id]--;
		ctx->power_type[hw_id] = VDEC_POWER_NORMAL;
	}
	if (ctx->dev->dec_always_on[hw_id] == 0 && !ctx->dev->dec_is_suspend_off &&
	    ctx == mtk_vcodec_get_curr_ctx(ctx->dev, hw_id))
		mtk_vcodec_dec_clock_off(&ctx->dev->pm, hw_id);
	mutex_unlock(&ctx->dev->dec_always_on_mutex);

	mtk_vcodec_set_curr_ctx(ctx->dev, NULL, hw_id);
	mtk_vdec_unlock(ctx, hw_id);
	mutex_unlock(&ctx->hw_status);

}

void vdec_check_release_lock(void *ctx_check)
{
	struct mtk_vcodec_ctx *ctx = (struct mtk_vcodec_ctx *)ctx_check;
	int i;
	bool is_always_on;

	for (i = 0; i < MTK_VDEC_HW_NUM; i++) {
		is_always_on = false;
		mutex_lock(&ctx->hw_status);
		if (ctx->power_type[i] >= VDEC_POWER_ALWAYS) {
			is_always_on = true;
			ctx->power_type[i] = VDEC_POWER_RELEASE;
			if (ctx->hw_locked[i] == 0) {
				mtk_vdec_lock(ctx, i);
				mtk_vcodec_set_curr_ctx(ctx->dev, ctx, i);
			}
		}
		mutex_unlock(&ctx->hw_status);
		if (ctx->hw_locked[i] == 1) {
			vdec_decode_unprepare(ctx, i);
			ctx->power_type[i] = VDEC_POWER_NORMAL;
			if (is_always_on)
				mtk_v4l2_debug(2, "[%d] always power on inst clk off hw_id %d",
					ctx->id, i);
			else
				mtk_v4l2_err("[%d] daemon killed when holding lock %d",
					ctx->id, i);
		}
	}
	if (ctx->dev->dec_cnt == 1) {
		for (i = 0; i < MTK_VDEC_HW_NUM; i++)
			if (atomic_read(&ctx->dev->dec_clk_ref_cnt[i]))
				mtk_v4l2_err("[%d] hw_id %d: dec_clk_ref_cnt %d, dec_always_on %d, dec_is_suspend_off %d",
					ctx->id, i, atomic_read(&ctx->dev->dec_clk_ref_cnt[i]),
					ctx->dev->dec_always_on[i], ctx->dev->dec_is_suspend_off);
		if (atomic_read(&ctx->dev->dec_larb_ref_cnt))
			mtk_v4l2_err("[%d] dec_larb_ref_cnt %d",
				ctx->id, atomic_read(&ctx->dev->dec_larb_ref_cnt));
	}
}

void vdec_suspend_power(struct mtk_vcodec_dev *dev)
{
	int hw_id;

	mutex_lock(&dev->dec_always_on_mutex);
	if (dev->dec_is_suspend_off) {
		mutex_unlock(&dev->dec_always_on_mutex);
		return;
	}
	for (hw_id = 0; hw_id < MTK_VDEC_HW_NUM; hw_id++) {
		if (dev->dec_always_on[hw_id] > 0) {
			mtk_v4l2_debug(0, "hw_id %d clock off for is always on %d",
				hw_id, dev->dec_always_on[hw_id]);
			mtk_vcodec_dec_clock_off(&dev->pm, hw_id);
		}
	}
	dev->dec_is_suspend_off = true;
	mutex_unlock(&dev->dec_always_on_mutex);
}

void vdec_resume_power(struct mtk_vcodec_dev *dev)
{
	int hw_id;

	mutex_lock(&dev->dec_always_on_mutex);
	if (dev->dec_is_suspend_off == false) {
		mutex_unlock(&dev->dec_always_on_mutex);
		return;
	}
	for (hw_id = 0; hw_id < MTK_VDEC_HW_NUM; hw_id++) {
		if (dev->dec_always_on[hw_id] > 0) {
			mtk_v4l2_debug(0, "hw_id %d clock on for is always on %d",
				hw_id, dev->dec_always_on[hw_id]);
			mtk_vcodec_dec_clock_on(&dev->pm, hw_id);
		}
	}
	dev->dec_is_suspend_off = false;
	mutex_unlock(&dev->dec_always_on_mutex);
}